]> git.proxmox.com Git - mirror_ubuntu-focal-kernel.git/blame - arch/arm64/kernel/traps.c
arm64: consolidate signal injection on emulation errors
[mirror_ubuntu-focal-kernel.git] / arch / arm64 / kernel / traps.c
CommitLineData
60ffc30d
CM
1/*
2 * Based on arch/arm/kernel/traps.c
3 *
4 * Copyright (C) 1995-2009 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
9fb7410f 20#include <linux/bug.h>
60ffc30d
CM
21#include <linux/signal.h>
22#include <linux/personality.h>
23#include <linux/kallsyms.h>
24#include <linux/spinlock.h>
25#include <linux/uaccess.h>
26#include <linux/hardirq.h>
27#include <linux/kdebug.h>
28#include <linux/module.h>
29#include <linux/kexec.h>
30#include <linux/delay.h>
31#include <linux/init.h>
32#include <linux/sched.h>
33#include <linux/syscalls.h>
34
35#include <asm/atomic.h>
9fb7410f 36#include <asm/bug.h>
1442b6ed 37#include <asm/debug-monitors.h>
60a1f02c 38#include <asm/esr.h>
9fb7410f 39#include <asm/insn.h>
60ffc30d
CM
40#include <asm/traps.h>
41#include <asm/stacktrace.h>
42#include <asm/exception.h>
43#include <asm/system_misc.h>
44
45static const char *handler[]= {
46 "Synchronous Abort",
47 "IRQ",
48 "FIQ",
49 "Error"
50};
51
52int show_unhandled_signals = 1;
53
54/*
7ceb3a10 55 * Dump out the contents of some kernel memory nicely...
60ffc30d
CM
56 */
57static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
7ceb3a10 58 unsigned long top)
60ffc30d
CM
59{
60 unsigned long first;
61 mm_segment_t fs;
62 int i;
63
64 /*
65 * We need to switch to kernel mode so that we can use __get_user
c5cea06b 66 * to safely read from kernel space.
60ffc30d
CM
67 */
68 fs = get_fs();
69 set_fs(KERNEL_DS);
70
71 printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
72
73 for (first = bottom & ~31; first < top; first += 32) {
74 unsigned long p;
75 char str[sizeof(" 12345678") * 8 + 1];
76
77 memset(str, ' ', sizeof(str));
78 str[sizeof(str) - 1] = '\0';
79
7ceb3a10
MR
80 for (p = first, i = 0; i < (32 / 8)
81 && p < top; i++, p += 8) {
60ffc30d 82 if (p >= bottom && p < top) {
e147ae6d
RT
83 unsigned long val;
84
7ceb3a10
MR
85 if (__get_user(val, (unsigned long *)p) == 0)
86 sprintf(str + i * 17, " %016lx", val);
87 else
88 sprintf(str + i * 17, " ????????????????");
60ffc30d
CM
89 }
90 }
91 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
92 }
93
94 set_fs(fs);
95}
96
9f93f3e9 97static void dump_backtrace_entry(unsigned long where)
60ffc30d 98{
9f93f3e9
JL
99 /*
100 * Note that 'where' can have a physical address, but it's not handled.
101 */
60ffc30d 102 print_ip_sym(where);
60ffc30d
CM
103}
104
c5cea06b 105static void __dump_instr(const char *lvl, struct pt_regs *regs)
60ffc30d
CM
106{
107 unsigned long addr = instruction_pointer(regs);
60ffc30d
CM
108 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
109 int i;
110
60ffc30d
CM
111 for (i = -4; i < 1; i++) {
112 unsigned int val, bad;
113
114 bad = __get_user(val, &((u32 *)addr)[i]);
115
116 if (!bad)
117 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
118 else {
119 p += sprintf(p, "bad PC value");
120 break;
121 }
122 }
123 printk("%sCode: %s\n", lvl, str);
c5cea06b 124}
60ffc30d 125
c5cea06b
MR
126static void dump_instr(const char *lvl, struct pt_regs *regs)
127{
128 if (!user_mode(regs)) {
129 mm_segment_t fs = get_fs();
130 set_fs(KERNEL_DS);
131 __dump_instr(lvl, regs);
132 set_fs(fs);
133 } else {
134 __dump_instr(lvl, regs);
135 }
60ffc30d
CM
136}
137
138static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
139{
140 struct stackframe frame;
a80a0eb7 141 unsigned long irq_stack_ptr;
20380bb3 142 int skip;
60ffc30d 143
a80a0eb7
YS
144 /*
145 * Switching between stacks is valid when tracing current and in
146 * non-preemptible context.
147 */
148 if (tsk == current && !preemptible())
149 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
150 else
151 irq_stack_ptr = 0;
152
60ffc30d
CM
153 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
154
155 if (!tsk)
156 tsk = current;
157
20380bb3 158 if (tsk == current) {
60ffc30d 159 frame.fp = (unsigned long)__builtin_frame_address(0);
2128df14 160 frame.sp = current_stack_pointer;
60ffc30d
CM
161 frame.pc = (unsigned long)dump_backtrace;
162 } else {
163 /*
164 * task blocked in __switch_to
165 */
166 frame.fp = thread_saved_fp(tsk);
167 frame.sp = thread_saved_sp(tsk);
168 frame.pc = thread_saved_pc(tsk);
169 }
20380bb3
AT
170#ifdef CONFIG_FUNCTION_GRAPH_TRACER
171 frame.graph = tsk->curr_ret_stack;
172#endif
60ffc30d 173
20380bb3 174 skip = !!regs;
c9cd0ed9 175 printk("Call trace:\n");
60ffc30d
CM
176 while (1) {
177 unsigned long where = frame.pc;
9f93f3e9 178 unsigned long stack;
60ffc30d
CM
179 int ret;
180
20380bb3
AT
181 /* skip until specified stack frame */
182 if (!skip) {
183 dump_backtrace_entry(where);
184 } else if (frame.fp == regs->regs[29]) {
185 skip = 0;
186 /*
187 * Mostly, this is the case where this function is
188 * called in panic/abort. As exception handler's
189 * stack frame does not contain the corresponding pc
190 * at which an exception has taken place, use regs->pc
191 * instead.
192 */
193 dump_backtrace_entry(regs->pc);
194 }
fe13f95b 195 ret = unwind_frame(tsk, &frame);
60ffc30d
CM
196 if (ret < 0)
197 break;
9f93f3e9 198 stack = frame.sp;
132cd887
AT
199 if (in_exception_text(where)) {
200 /*
201 * If we switched to the irq_stack before calling this
202 * exception handler, then the pt_regs will be on the
203 * task stack. The easiest way to tell is if the large
204 * pt_regs would overlap with the end of the irq_stack.
205 */
206 if (stack < irq_stack_ptr &&
207 (stack + sizeof(struct pt_regs)) > irq_stack_ptr)
208 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
209
9f93f3e9 210 dump_mem("", "Exception stack", stack,
7ceb3a10 211 stack + sizeof(struct pt_regs));
132cd887 212 }
60ffc30d
CM
213 }
214}
215
60ffc30d
CM
216void show_stack(struct task_struct *tsk, unsigned long *sp)
217{
218 dump_backtrace(NULL, tsk);
219 barrier();
220}
221
222#ifdef CONFIG_PREEMPT
223#define S_PREEMPT " PREEMPT"
224#else
225#define S_PREEMPT ""
226#endif
60ffc30d 227#define S_SMP " SMP"
60ffc30d
CM
228
229static int __die(const char *str, int err, struct thread_info *thread,
230 struct pt_regs *regs)
231{
232 struct task_struct *tsk = thread->task;
233 static int die_counter;
234 int ret;
235
236 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
237 str, err, ++die_counter);
238
239 /* trap and error numbers are mostly meaningless on ARM */
240 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
241 if (ret == NOTIFY_STOP)
242 return ret;
243
244 print_modules();
245 __show_regs(regs);
246 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
247 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1);
248
7ceb3a10 249 if (!user_mode(regs)) {
60ffc30d 250 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
7ceb3a10 251 THREAD_SIZE + (unsigned long)task_stack_page(tsk));
60ffc30d
CM
252 dump_backtrace(regs, tsk);
253 dump_instr(KERN_EMERG, regs);
254 }
255
256 return ret;
257}
258
259static DEFINE_RAW_SPINLOCK(die_lock);
260
261/*
262 * This function is protected against re-entrancy.
263 */
264void die(const char *str, struct pt_regs *regs, int err)
265{
266 struct thread_info *thread = current_thread_info();
267 int ret;
268
269 oops_enter();
270
271 raw_spin_lock_irq(&die_lock);
272 console_verbose();
273 bust_spinlocks(1);
274 ret = __die(str, err, thread, regs);
275
276 if (regs && kexec_should_crash(thread->task))
277 crash_kexec(regs);
278
279 bust_spinlocks(0);
373d4d09 280 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
60ffc30d
CM
281 raw_spin_unlock_irq(&die_lock);
282 oops_exit();
283
284 if (in_interrupt())
285 panic("Fatal exception in interrupt");
286 if (panic_on_oops)
287 panic("Fatal exception");
288 if (ret != NOTIFY_STOP)
289 do_exit(SIGSEGV);
290}
291
292void arm64_notify_die(const char *str, struct pt_regs *regs,
293 struct siginfo *info, int err)
294{
9141300a
CM
295 if (user_mode(regs)) {
296 current->thread.fault_address = 0;
297 current->thread.fault_code = err;
60ffc30d 298 force_sig_info(info->si_signo, info, current);
9141300a 299 } else {
60ffc30d 300 die(str, regs, err);
9141300a 301 }
60ffc30d
CM
302}
303
9b79f52d
PA
304static LIST_HEAD(undef_hook);
305static DEFINE_RAW_SPINLOCK(undef_lock);
306
307void register_undef_hook(struct undef_hook *hook)
308{
309 unsigned long flags;
310
311 raw_spin_lock_irqsave(&undef_lock, flags);
312 list_add(&hook->node, &undef_hook);
313 raw_spin_unlock_irqrestore(&undef_lock, flags);
314}
315
316void unregister_undef_hook(struct undef_hook *hook)
317{
318 unsigned long flags;
319
320 raw_spin_lock_irqsave(&undef_lock, flags);
321 list_del(&hook->node);
322 raw_spin_unlock_irqrestore(&undef_lock, flags);
323}
324
325static int call_undef_hook(struct pt_regs *regs)
326{
327 struct undef_hook *hook;
328 unsigned long flags;
329 u32 instr;
330 int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
331 void __user *pc = (void __user *)instruction_pointer(regs);
332
333 if (!user_mode(regs))
334 return 1;
335
336 if (compat_thumb_mode(regs)) {
337 /* 16-bit Thumb instruction */
338 if (get_user(instr, (u16 __user *)pc))
339 goto exit;
340 instr = le16_to_cpu(instr);
341 if (aarch32_insn_is_wide(instr)) {
342 u32 instr2;
343
344 if (get_user(instr2, (u16 __user *)(pc + 2)))
345 goto exit;
346 instr2 = le16_to_cpu(instr2);
347 instr = (instr << 16) | instr2;
348 }
349 } else {
350 /* 32-bit ARM instruction */
351 if (get_user(instr, (u32 __user *)pc))
352 goto exit;
353 instr = le32_to_cpu(instr);
354 }
355
356 raw_spin_lock_irqsave(&undef_lock, flags);
357 list_for_each_entry(hook, &undef_hook, node)
358 if ((instr & hook->instr_mask) == hook->instr_val &&
359 (regs->pstate & hook->pstate_mask) == hook->pstate_val)
360 fn = hook->fn;
361
362 raw_spin_unlock_irqrestore(&undef_lock, flags);
363exit:
364 return fn ? fn(regs, instr) : 1;
365}
366
390bf177
AP
367static void force_signal_inject(int signal, int code, struct pt_regs *regs,
368 unsigned long address)
60ffc30d
CM
369{
370 siginfo_t info;
371 void __user *pc = (void __user *)instruction_pointer(regs);
390bf177
AP
372 const char *desc;
373
374 switch (signal) {
375 case SIGILL:
376 desc = "undefined instruction";
377 break;
378 case SIGSEGV:
379 desc = "illegal memory access";
380 break;
381 default:
382 desc = "bad mode";
383 break;
384 }
385
386 if (unhandled_signal(current, signal) &&
387 show_unhandled_signals_ratelimited()) {
388 pr_info("%s[%d]: %s: pc=%p\n",
389 current->comm, task_pid_nr(current), desc, pc);
390 dump_instr(KERN_INFO, regs);
391 }
392
393 info.si_signo = signal;
394 info.si_errno = 0;
395 info.si_code = code;
396 info.si_addr = pc;
397
398 arm64_notify_die(desc, regs, &info, 0);
399}
400
401/*
402 * Set up process info to signal segmentation fault - called on access error.
403 */
404void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
405{
406 int code;
407
408 down_read(&current->mm->mmap_sem);
409 if (find_vma(current->mm, addr) == NULL)
410 code = SEGV_MAPERR;
411 else
412 code = SEGV_ACCERR;
413 up_read(&current->mm->mmap_sem);
60ffc30d 414
390bf177
AP
415 force_signal_inject(SIGSEGV, code, regs, addr);
416}
417
418asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
419{
60ffc30d 420 /* check for AArch32 breakpoint instructions */
1442b6ed 421 if (!aarch32_break_handler(regs))
60ffc30d 422 return;
60ffc30d 423
9b79f52d
PA
424 if (call_undef_hook(regs) == 0)
425 return;
426
390bf177 427 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
60ffc30d
CM
428}
429
430long compat_arm_syscall(struct pt_regs *regs);
431
432asmlinkage long do_ni_syscall(struct pt_regs *regs)
433{
434#ifdef CONFIG_COMPAT
435 long ret;
436 if (is_compat_task()) {
437 ret = compat_arm_syscall(regs);
438 if (ret != -ENOSYS)
439 return ret;
440 }
441#endif
442
86dca36e 443 if (show_unhandled_signals_ratelimited()) {
60ffc30d
CM
444 pr_info("%s[%d]: syscall %d\n", current->comm,
445 task_pid_nr(current), (int)regs->syscallno);
446 dump_instr("", regs);
447 if (user_mode(regs))
448 __show_regs(regs);
449 }
450
451 return sys_ni_syscall();
452}
453
60a1f02c
MR
454static const char *esr_class_str[] = {
455 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
456 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
457 [ESR_ELx_EC_WFx] = "WFI/WFE",
458 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
459 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
460 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
461 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
462 [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
463 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
464 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
465 [ESR_ELx_EC_ILL] = "PSTATE.IL",
466 [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
467 [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
468 [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
469 [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
470 [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
471 [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
472 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
473 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
474 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
475 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
476 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
477 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
478 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
479 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
480 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
481 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
482 [ESR_ELx_EC_SERROR] = "SError",
483 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
484 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
485 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
486 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
487 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
488 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
489 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
490 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
491 [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
492};
493
494const char *esr_get_class_string(u32 esr)
495{
275f344b 496 return esr_class_str[ESR_ELx_EC(esr)];
60a1f02c
MR
497}
498
60ffc30d
CM
499/*
500 * bad_mode handles the impossible case in the exception vector.
501 */
502asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
503{
9955ac47
MR
504 siginfo_t info;
505 void __user *pc = (void __user *)instruction_pointer(regs);
60ffc30d
CM
506 console_verbose();
507
8051f4d1
MR
508 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
509 handler[reason], smp_processor_id(), esr,
510 esr_get_class_string(esr));
9955ac47
MR
511 __show_regs(regs);
512
513 info.si_signo = SIGILL;
514 info.si_errno = 0;
515 info.si_code = ILL_ILLOPC;
516 info.si_addr = pc;
60ffc30d 517
9955ac47 518 arm64_notify_die("Oops - bad mode", regs, &info, 0);
60ffc30d
CM
519}
520
521void __pte_error(const char *file, int line, unsigned long val)
522{
c9cd0ed9 523 pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
60ffc30d
CM
524}
525
526void __pmd_error(const char *file, int line, unsigned long val)
527{
c9cd0ed9 528 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
60ffc30d
CM
529}
530
c79b954b
JL
531void __pud_error(const char *file, int line, unsigned long val)
532{
c9cd0ed9 533 pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
c79b954b
JL
534}
535
60ffc30d
CM
536void __pgd_error(const char *file, int line, unsigned long val)
537{
c9cd0ed9 538 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
60ffc30d
CM
539}
540
9fb7410f
DM
541/* GENERIC_BUG traps */
542
543int is_valid_bugaddr(unsigned long addr)
544{
545 /*
546 * bug_handler() only called for BRK #BUG_BRK_IMM.
547 * So the answer is trivial -- any spurious instances with no
548 * bug table entry will be rejected by report_bug() and passed
549 * back to the debug-monitors code and handled as a fatal
550 * unexpected debug exception.
551 */
552 return 1;
553}
554
555static int bug_handler(struct pt_regs *regs, unsigned int esr)
556{
557 if (user_mode(regs))
558 return DBG_HOOK_ERROR;
559
560 switch (report_bug(regs->pc, regs)) {
561 case BUG_TRAP_TYPE_BUG:
562 die("Oops - BUG", regs, 0);
563 break;
564
565 case BUG_TRAP_TYPE_WARN:
a4653228
DM
566 /* Ideally, report_bug() should backtrace for us... but no. */
567 dump_backtrace(regs, NULL);
9fb7410f
DM
568 break;
569
570 default:
571 /* unknown/unrecognised bug trap type */
572 return DBG_HOOK_ERROR;
573 }
574
575 /* If thread survives, skip over the BUG instruction and continue: */
576 regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */
577 return DBG_HOOK_HANDLED;
578}
579
580static struct break_hook bug_break_hook = {
581 .esr_val = 0xf2000000 | BUG_BRK_IMM,
582 .esr_mask = 0xffffffff,
583 .fn = bug_handler,
584};
585
586/*
587 * Initial handler for AArch64 BRK exceptions
588 * This handler only used until debug_traps_init().
589 */
590int __init early_brk64(unsigned long addr, unsigned int esr,
591 struct pt_regs *regs)
592{
593 return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
594}
595
596/* This registration must happen early, before debug_traps_init(). */
60ffc30d
CM
597void __init trap_init(void)
598{
9fb7410f 599 register_break_hook(&bug_break_hook);
60ffc30d 600}