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Commit | Line | Data |
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60ffc30d CM |
1 | /* |
2 | * Based on arch/arm/kernel/traps.c | |
3 | * | |
4 | * Copyright (C) 1995-2009 Russell King | |
5 | * Copyright (C) 2012 ARM Ltd. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
9fb7410f | 20 | #include <linux/bug.h> |
60ffc30d CM |
21 | #include <linux/signal.h> |
22 | #include <linux/personality.h> | |
23 | #include <linux/kallsyms.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <linux/uaccess.h> | |
26 | #include <linux/hardirq.h> | |
27 | #include <linux/kdebug.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/kexec.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/init.h> | |
3f07c014 | 32 | #include <linux/sched/signal.h> |
b17b0153 | 33 | #include <linux/sched/debug.h> |
60ffc30d CM |
34 | #include <linux/syscalls.h> |
35 | ||
36 | #include <asm/atomic.h> | |
9fb7410f | 37 | #include <asm/bug.h> |
1442b6ed | 38 | #include <asm/debug-monitors.h> |
60a1f02c | 39 | #include <asm/esr.h> |
9fb7410f | 40 | #include <asm/insn.h> |
60ffc30d | 41 | #include <asm/traps.h> |
a9ea0017 | 42 | #include <asm/stack_pointer.h> |
60ffc30d CM |
43 | #include <asm/stacktrace.h> |
44 | #include <asm/exception.h> | |
45 | #include <asm/system_misc.h> | |
7dd01aef | 46 | #include <asm/sysreg.h> |
60ffc30d CM |
47 | |
48 | static const char *handler[]= { | |
49 | "Synchronous Abort", | |
50 | "IRQ", | |
51 | "FIQ", | |
52 | "Error" | |
53 | }; | |
54 | ||
55 | int show_unhandled_signals = 1; | |
56 | ||
57 | /* | |
7ceb3a10 | 58 | * Dump out the contents of some kernel memory nicely... |
60ffc30d CM |
59 | */ |
60 | static void dump_mem(const char *lvl, const char *str, unsigned long bottom, | |
7ceb3a10 | 61 | unsigned long top) |
60ffc30d CM |
62 | { |
63 | unsigned long first; | |
64 | mm_segment_t fs; | |
65 | int i; | |
66 | ||
67 | /* | |
68 | * We need to switch to kernel mode so that we can use __get_user | |
c5cea06b | 69 | * to safely read from kernel space. |
60ffc30d CM |
70 | */ |
71 | fs = get_fs(); | |
72 | set_fs(KERNEL_DS); | |
73 | ||
74 | printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top); | |
75 | ||
76 | for (first = bottom & ~31; first < top; first += 32) { | |
77 | unsigned long p; | |
78 | char str[sizeof(" 12345678") * 8 + 1]; | |
79 | ||
80 | memset(str, ' ', sizeof(str)); | |
81 | str[sizeof(str) - 1] = '\0'; | |
82 | ||
7ceb3a10 MR |
83 | for (p = first, i = 0; i < (32 / 8) |
84 | && p < top; i++, p += 8) { | |
60ffc30d | 85 | if (p >= bottom && p < top) { |
e147ae6d RT |
86 | unsigned long val; |
87 | ||
7ceb3a10 MR |
88 | if (__get_user(val, (unsigned long *)p) == 0) |
89 | sprintf(str + i * 17, " %016lx", val); | |
90 | else | |
91 | sprintf(str + i * 17, " ????????????????"); | |
60ffc30d CM |
92 | } |
93 | } | |
94 | printk("%s%04lx:%s\n", lvl, first & 0xffff, str); | |
95 | } | |
96 | ||
97 | set_fs(fs); | |
98 | } | |
99 | ||
9f93f3e9 | 100 | static void dump_backtrace_entry(unsigned long where) |
60ffc30d | 101 | { |
9f93f3e9 JL |
102 | /* |
103 | * Note that 'where' can have a physical address, but it's not handled. | |
104 | */ | |
60ffc30d | 105 | print_ip_sym(where); |
60ffc30d CM |
106 | } |
107 | ||
c5cea06b | 108 | static void __dump_instr(const char *lvl, struct pt_regs *regs) |
60ffc30d CM |
109 | { |
110 | unsigned long addr = instruction_pointer(regs); | |
60ffc30d CM |
111 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; |
112 | int i; | |
113 | ||
60ffc30d CM |
114 | for (i = -4; i < 1; i++) { |
115 | unsigned int val, bad; | |
116 | ||
117 | bad = __get_user(val, &((u32 *)addr)[i]); | |
118 | ||
119 | if (!bad) | |
120 | p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); | |
121 | else { | |
122 | p += sprintf(p, "bad PC value"); | |
123 | break; | |
124 | } | |
125 | } | |
126 | printk("%sCode: %s\n", lvl, str); | |
c5cea06b | 127 | } |
60ffc30d | 128 | |
c5cea06b MR |
129 | static void dump_instr(const char *lvl, struct pt_regs *regs) |
130 | { | |
131 | if (!user_mode(regs)) { | |
132 | mm_segment_t fs = get_fs(); | |
133 | set_fs(KERNEL_DS); | |
134 | __dump_instr(lvl, regs); | |
135 | set_fs(fs); | |
136 | } else { | |
137 | __dump_instr(lvl, regs); | |
138 | } | |
60ffc30d CM |
139 | } |
140 | ||
141 | static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) | |
142 | { | |
143 | struct stackframe frame; | |
a80a0eb7 | 144 | unsigned long irq_stack_ptr; |
20380bb3 | 145 | int skip; |
60ffc30d | 146 | |
b5e7307d MR |
147 | pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); |
148 | ||
149 | if (!tsk) | |
150 | tsk = current; | |
151 | ||
9bbd4c56 MR |
152 | if (!try_get_task_stack(tsk)) |
153 | return; | |
154 | ||
a80a0eb7 YS |
155 | /* |
156 | * Switching between stacks is valid when tracing current and in | |
157 | * non-preemptible context. | |
158 | */ | |
159 | if (tsk == current && !preemptible()) | |
160 | irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id()); | |
161 | else | |
162 | irq_stack_ptr = 0; | |
163 | ||
20380bb3 | 164 | if (tsk == current) { |
60ffc30d | 165 | frame.fp = (unsigned long)__builtin_frame_address(0); |
2128df14 | 166 | frame.sp = current_stack_pointer; |
60ffc30d CM |
167 | frame.pc = (unsigned long)dump_backtrace; |
168 | } else { | |
169 | /* | |
170 | * task blocked in __switch_to | |
171 | */ | |
172 | frame.fp = thread_saved_fp(tsk); | |
173 | frame.sp = thread_saved_sp(tsk); | |
174 | frame.pc = thread_saved_pc(tsk); | |
175 | } | |
20380bb3 AT |
176 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
177 | frame.graph = tsk->curr_ret_stack; | |
178 | #endif | |
60ffc30d | 179 | |
20380bb3 | 180 | skip = !!regs; |
c9cd0ed9 | 181 | printk("Call trace:\n"); |
60ffc30d CM |
182 | while (1) { |
183 | unsigned long where = frame.pc; | |
9f93f3e9 | 184 | unsigned long stack; |
60ffc30d CM |
185 | int ret; |
186 | ||
20380bb3 AT |
187 | /* skip until specified stack frame */ |
188 | if (!skip) { | |
189 | dump_backtrace_entry(where); | |
190 | } else if (frame.fp == regs->regs[29]) { | |
191 | skip = 0; | |
192 | /* | |
193 | * Mostly, this is the case where this function is | |
194 | * called in panic/abort. As exception handler's | |
195 | * stack frame does not contain the corresponding pc | |
196 | * at which an exception has taken place, use regs->pc | |
197 | * instead. | |
198 | */ | |
199 | dump_backtrace_entry(regs->pc); | |
200 | } | |
fe13f95b | 201 | ret = unwind_frame(tsk, &frame); |
60ffc30d CM |
202 | if (ret < 0) |
203 | break; | |
9f93f3e9 | 204 | stack = frame.sp; |
132cd887 AT |
205 | if (in_exception_text(where)) { |
206 | /* | |
207 | * If we switched to the irq_stack before calling this | |
208 | * exception handler, then the pt_regs will be on the | |
209 | * task stack. The easiest way to tell is if the large | |
210 | * pt_regs would overlap with the end of the irq_stack. | |
211 | */ | |
212 | if (stack < irq_stack_ptr && | |
213 | (stack + sizeof(struct pt_regs)) > irq_stack_ptr) | |
214 | stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr); | |
215 | ||
9f93f3e9 | 216 | dump_mem("", "Exception stack", stack, |
7ceb3a10 | 217 | stack + sizeof(struct pt_regs)); |
132cd887 | 218 | } |
60ffc30d | 219 | } |
9bbd4c56 MR |
220 | |
221 | put_task_stack(tsk); | |
60ffc30d CM |
222 | } |
223 | ||
60ffc30d CM |
224 | void show_stack(struct task_struct *tsk, unsigned long *sp) |
225 | { | |
226 | dump_backtrace(NULL, tsk); | |
227 | barrier(); | |
228 | } | |
229 | ||
230 | #ifdef CONFIG_PREEMPT | |
231 | #define S_PREEMPT " PREEMPT" | |
232 | #else | |
233 | #define S_PREEMPT "" | |
234 | #endif | |
60ffc30d | 235 | #define S_SMP " SMP" |
60ffc30d | 236 | |
876e7a38 | 237 | static int __die(const char *str, int err, struct pt_regs *regs) |
60ffc30d | 238 | { |
876e7a38 | 239 | struct task_struct *tsk = current; |
60ffc30d CM |
240 | static int die_counter; |
241 | int ret; | |
242 | ||
243 | pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", | |
244 | str, err, ++die_counter); | |
245 | ||
246 | /* trap and error numbers are mostly meaningless on ARM */ | |
247 | ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV); | |
248 | if (ret == NOTIFY_STOP) | |
249 | return ret; | |
250 | ||
251 | print_modules(); | |
252 | __show_regs(regs); | |
253 | pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n", | |
876e7a38 MR |
254 | TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), |
255 | end_of_stack(tsk)); | |
60ffc30d | 256 | |
7ceb3a10 | 257 | if (!user_mode(regs)) { |
60ffc30d | 258 | dump_mem(KERN_EMERG, "Stack: ", regs->sp, |
7ceb3a10 | 259 | THREAD_SIZE + (unsigned long)task_stack_page(tsk)); |
60ffc30d CM |
260 | dump_backtrace(regs, tsk); |
261 | dump_instr(KERN_EMERG, regs); | |
262 | } | |
263 | ||
264 | return ret; | |
265 | } | |
266 | ||
267 | static DEFINE_RAW_SPINLOCK(die_lock); | |
268 | ||
269 | /* | |
270 | * This function is protected against re-entrancy. | |
271 | */ | |
272 | void die(const char *str, struct pt_regs *regs, int err) | |
273 | { | |
60ffc30d CM |
274 | int ret; |
275 | ||
276 | oops_enter(); | |
277 | ||
278 | raw_spin_lock_irq(&die_lock); | |
279 | console_verbose(); | |
280 | bust_spinlocks(1); | |
876e7a38 | 281 | ret = __die(str, err, regs); |
60ffc30d | 282 | |
876e7a38 | 283 | if (regs && kexec_should_crash(current)) |
60ffc30d CM |
284 | crash_kexec(regs); |
285 | ||
286 | bust_spinlocks(0); | |
373d4d09 | 287 | add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); |
60ffc30d CM |
288 | raw_spin_unlock_irq(&die_lock); |
289 | oops_exit(); | |
290 | ||
291 | if (in_interrupt()) | |
292 | panic("Fatal exception in interrupt"); | |
293 | if (panic_on_oops) | |
294 | panic("Fatal exception"); | |
295 | if (ret != NOTIFY_STOP) | |
296 | do_exit(SIGSEGV); | |
297 | } | |
298 | ||
299 | void arm64_notify_die(const char *str, struct pt_regs *regs, | |
300 | struct siginfo *info, int err) | |
301 | { | |
9141300a CM |
302 | if (user_mode(regs)) { |
303 | current->thread.fault_address = 0; | |
304 | current->thread.fault_code = err; | |
60ffc30d | 305 | force_sig_info(info->si_signo, info, current); |
9141300a | 306 | } else { |
60ffc30d | 307 | die(str, regs, err); |
9141300a | 308 | } |
60ffc30d CM |
309 | } |
310 | ||
9b79f52d PA |
311 | static LIST_HEAD(undef_hook); |
312 | static DEFINE_RAW_SPINLOCK(undef_lock); | |
313 | ||
314 | void register_undef_hook(struct undef_hook *hook) | |
315 | { | |
316 | unsigned long flags; | |
317 | ||
318 | raw_spin_lock_irqsave(&undef_lock, flags); | |
319 | list_add(&hook->node, &undef_hook); | |
320 | raw_spin_unlock_irqrestore(&undef_lock, flags); | |
321 | } | |
322 | ||
323 | void unregister_undef_hook(struct undef_hook *hook) | |
324 | { | |
325 | unsigned long flags; | |
326 | ||
327 | raw_spin_lock_irqsave(&undef_lock, flags); | |
328 | list_del(&hook->node); | |
329 | raw_spin_unlock_irqrestore(&undef_lock, flags); | |
330 | } | |
331 | ||
332 | static int call_undef_hook(struct pt_regs *regs) | |
333 | { | |
334 | struct undef_hook *hook; | |
335 | unsigned long flags; | |
336 | u32 instr; | |
337 | int (*fn)(struct pt_regs *regs, u32 instr) = NULL; | |
338 | void __user *pc = (void __user *)instruction_pointer(regs); | |
339 | ||
340 | if (!user_mode(regs)) | |
341 | return 1; | |
342 | ||
343 | if (compat_thumb_mode(regs)) { | |
344 | /* 16-bit Thumb instruction */ | |
345 | if (get_user(instr, (u16 __user *)pc)) | |
346 | goto exit; | |
347 | instr = le16_to_cpu(instr); | |
348 | if (aarch32_insn_is_wide(instr)) { | |
349 | u32 instr2; | |
350 | ||
351 | if (get_user(instr2, (u16 __user *)(pc + 2))) | |
352 | goto exit; | |
353 | instr2 = le16_to_cpu(instr2); | |
354 | instr = (instr << 16) | instr2; | |
355 | } | |
356 | } else { | |
357 | /* 32-bit ARM instruction */ | |
358 | if (get_user(instr, (u32 __user *)pc)) | |
359 | goto exit; | |
360 | instr = le32_to_cpu(instr); | |
361 | } | |
362 | ||
363 | raw_spin_lock_irqsave(&undef_lock, flags); | |
364 | list_for_each_entry(hook, &undef_hook, node) | |
365 | if ((instr & hook->instr_mask) == hook->instr_val && | |
366 | (regs->pstate & hook->pstate_mask) == hook->pstate_val) | |
367 | fn = hook->fn; | |
368 | ||
369 | raw_spin_unlock_irqrestore(&undef_lock, flags); | |
370 | exit: | |
371 | return fn ? fn(regs, instr) : 1; | |
372 | } | |
373 | ||
390bf177 AP |
374 | static void force_signal_inject(int signal, int code, struct pt_regs *regs, |
375 | unsigned long address) | |
60ffc30d CM |
376 | { |
377 | siginfo_t info; | |
378 | void __user *pc = (void __user *)instruction_pointer(regs); | |
390bf177 AP |
379 | const char *desc; |
380 | ||
381 | switch (signal) { | |
382 | case SIGILL: | |
383 | desc = "undefined instruction"; | |
384 | break; | |
385 | case SIGSEGV: | |
386 | desc = "illegal memory access"; | |
387 | break; | |
388 | default: | |
389 | desc = "bad mode"; | |
390 | break; | |
391 | } | |
392 | ||
393 | if (unhandled_signal(current, signal) && | |
394 | show_unhandled_signals_ratelimited()) { | |
395 | pr_info("%s[%d]: %s: pc=%p\n", | |
396 | current->comm, task_pid_nr(current), desc, pc); | |
397 | dump_instr(KERN_INFO, regs); | |
398 | } | |
399 | ||
400 | info.si_signo = signal; | |
401 | info.si_errno = 0; | |
402 | info.si_code = code; | |
403 | info.si_addr = pc; | |
404 | ||
405 | arm64_notify_die(desc, regs, &info, 0); | |
406 | } | |
407 | ||
408 | /* | |
409 | * Set up process info to signal segmentation fault - called on access error. | |
410 | */ | |
411 | void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr) | |
412 | { | |
413 | int code; | |
414 | ||
415 | down_read(¤t->mm->mmap_sem); | |
416 | if (find_vma(current->mm, addr) == NULL) | |
417 | code = SEGV_MAPERR; | |
418 | else | |
419 | code = SEGV_ACCERR; | |
420 | up_read(¤t->mm->mmap_sem); | |
60ffc30d | 421 | |
390bf177 AP |
422 | force_signal_inject(SIGSEGV, code, regs, addr); |
423 | } | |
424 | ||
425 | asmlinkage void __exception do_undefinstr(struct pt_regs *regs) | |
426 | { | |
60ffc30d | 427 | /* check for AArch32 breakpoint instructions */ |
1442b6ed | 428 | if (!aarch32_break_handler(regs)) |
60ffc30d | 429 | return; |
60ffc30d | 430 | |
9b79f52d PA |
431 | if (call_undef_hook(regs) == 0) |
432 | return; | |
433 | ||
390bf177 | 434 | force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); |
60ffc30d CM |
435 | } |
436 | ||
2a6dcb2b | 437 | int cpu_enable_cache_maint_trap(void *__unused) |
7dd01aef AP |
438 | { |
439 | config_sctlr_el1(SCTLR_EL1_UCI, 0); | |
2a6dcb2b | 440 | return 0; |
7dd01aef AP |
441 | } |
442 | ||
443 | #define __user_cache_maint(insn, address, res) \ | |
39bc88e5 | 444 | if (untagged_addr(address) >= user_addr_max()) { \ |
87261d19 | 445 | res = -EFAULT; \ |
39bc88e5 CM |
446 | } else { \ |
447 | uaccess_ttbr0_enable(); \ | |
87261d19 AP |
448 | asm volatile ( \ |
449 | "1: " insn ", %1\n" \ | |
450 | " mov %w0, #0\n" \ | |
451 | "2:\n" \ | |
452 | " .pushsection .fixup,\"ax\"\n" \ | |
453 | " .align 2\n" \ | |
454 | "3: mov %w0, %w2\n" \ | |
455 | " b 2b\n" \ | |
456 | " .popsection\n" \ | |
457 | _ASM_EXTABLE(1b, 3b) \ | |
458 | : "=r" (res) \ | |
39bc88e5 CM |
459 | : "r" (address), "i" (-EFAULT)); \ |
460 | uaccess_ttbr0_disable(); \ | |
461 | } | |
7dd01aef | 462 | |
9dbd5bb2 | 463 | static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs) |
7dd01aef AP |
464 | { |
465 | unsigned long address; | |
9dbd5bb2 SP |
466 | int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; |
467 | int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT; | |
468 | int ret = 0; | |
7dd01aef | 469 | |
8b6e70fc | 470 | address = pt_regs_read_reg(regs, rt); |
7dd01aef | 471 | |
9dbd5bb2 SP |
472 | switch (crm) { |
473 | case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */ | |
474 | __user_cache_maint("dc civac", address, ret); | |
475 | break; | |
476 | case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */ | |
477 | __user_cache_maint("dc civac", address, ret); | |
478 | break; | |
479 | case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */ | |
480 | __user_cache_maint("dc civac", address, ret); | |
481 | break; | |
482 | case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */ | |
483 | __user_cache_maint("ic ivau", address, ret); | |
484 | break; | |
485 | default: | |
7dd01aef AP |
486 | force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); |
487 | return; | |
488 | } | |
489 | ||
490 | if (ret) | |
491 | arm64_notify_segfault(regs, address); | |
492 | else | |
493 | regs->pc += 4; | |
494 | } | |
495 | ||
116c81f4 SP |
496 | static void ctr_read_handler(unsigned int esr, struct pt_regs *regs) |
497 | { | |
498 | int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; | |
8b6e70fc MR |
499 | unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0); |
500 | ||
501 | pt_regs_write_reg(regs, rt, val); | |
116c81f4 | 502 | |
116c81f4 SP |
503 | regs->pc += 4; |
504 | } | |
505 | ||
9dbd5bb2 SP |
506 | struct sys64_hook { |
507 | unsigned int esr_mask; | |
508 | unsigned int esr_val; | |
509 | void (*handler)(unsigned int esr, struct pt_regs *regs); | |
510 | }; | |
511 | ||
512 | static struct sys64_hook sys64_hooks[] = { | |
513 | { | |
514 | .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK, | |
515 | .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL, | |
516 | .handler = user_cache_maint_handler, | |
517 | }, | |
116c81f4 SP |
518 | { |
519 | /* Trap read access to CTR_EL0 */ | |
520 | .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, | |
521 | .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ, | |
522 | .handler = ctr_read_handler, | |
523 | }, | |
9dbd5bb2 SP |
524 | {}, |
525 | }; | |
526 | ||
527 | asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs) | |
528 | { | |
529 | struct sys64_hook *hook; | |
530 | ||
531 | for (hook = sys64_hooks; hook->handler; hook++) | |
532 | if ((hook->esr_mask & esr) == hook->esr_val) { | |
533 | hook->handler(esr, regs); | |
534 | return; | |
535 | } | |
536 | ||
49f6cba6 MR |
537 | /* |
538 | * New SYS instructions may previously have been undefined at EL0. Fall | |
539 | * back to our usual undefined instruction handler so that we handle | |
540 | * these consistently. | |
541 | */ | |
542 | do_undefinstr(regs); | |
9dbd5bb2 SP |
543 | } |
544 | ||
60ffc30d CM |
545 | long compat_arm_syscall(struct pt_regs *regs); |
546 | ||
547 | asmlinkage long do_ni_syscall(struct pt_regs *regs) | |
548 | { | |
549 | #ifdef CONFIG_COMPAT | |
550 | long ret; | |
551 | if (is_compat_task()) { | |
552 | ret = compat_arm_syscall(regs); | |
553 | if (ret != -ENOSYS) | |
554 | return ret; | |
555 | } | |
556 | #endif | |
557 | ||
86dca36e | 558 | if (show_unhandled_signals_ratelimited()) { |
60ffc30d CM |
559 | pr_info("%s[%d]: syscall %d\n", current->comm, |
560 | task_pid_nr(current), (int)regs->syscallno); | |
561 | dump_instr("", regs); | |
562 | if (user_mode(regs)) | |
563 | __show_regs(regs); | |
564 | } | |
565 | ||
566 | return sys_ni_syscall(); | |
567 | } | |
568 | ||
60a1f02c MR |
569 | static const char *esr_class_str[] = { |
570 | [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC", | |
571 | [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized", | |
572 | [ESR_ELx_EC_WFx] = "WFI/WFE", | |
573 | [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC", | |
574 | [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC", | |
575 | [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC", | |
576 | [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC", | |
577 | [ESR_ELx_EC_FP_ASIMD] = "ASIMD", | |
578 | [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS", | |
579 | [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC", | |
580 | [ESR_ELx_EC_ILL] = "PSTATE.IL", | |
581 | [ESR_ELx_EC_SVC32] = "SVC (AArch32)", | |
582 | [ESR_ELx_EC_HVC32] = "HVC (AArch32)", | |
583 | [ESR_ELx_EC_SMC32] = "SMC (AArch32)", | |
584 | [ESR_ELx_EC_SVC64] = "SVC (AArch64)", | |
585 | [ESR_ELx_EC_HVC64] = "HVC (AArch64)", | |
586 | [ESR_ELx_EC_SMC64] = "SMC (AArch64)", | |
587 | [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)", | |
588 | [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF", | |
589 | [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)", | |
590 | [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)", | |
591 | [ESR_ELx_EC_PC_ALIGN] = "PC Alignment", | |
592 | [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)", | |
593 | [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)", | |
594 | [ESR_ELx_EC_SP_ALIGN] = "SP Alignment", | |
595 | [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)", | |
596 | [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)", | |
597 | [ESR_ELx_EC_SERROR] = "SError", | |
598 | [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)", | |
599 | [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)", | |
600 | [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)", | |
601 | [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)", | |
602 | [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)", | |
603 | [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)", | |
604 | [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)", | |
605 | [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)", | |
606 | [ESR_ELx_EC_BRK64] = "BRK (AArch64)", | |
607 | }; | |
608 | ||
609 | const char *esr_get_class_string(u32 esr) | |
610 | { | |
275f344b | 611 | return esr_class_str[ESR_ELx_EC(esr)]; |
60a1f02c MR |
612 | } |
613 | ||
60ffc30d | 614 | /* |
7d9e8f71 MR |
615 | * bad_mode handles the impossible case in the exception vector. This is always |
616 | * fatal. | |
60ffc30d CM |
617 | */ |
618 | asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) | |
619 | { | |
620 | console_verbose(); | |
621 | ||
8051f4d1 MR |
622 | pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n", |
623 | handler[reason], smp_processor_id(), esr, | |
624 | esr_get_class_string(esr)); | |
7d9e8f71 MR |
625 | |
626 | die("Oops - bad mode", regs, 0); | |
627 | local_irq_disable(); | |
628 | panic("bad mode"); | |
629 | } | |
630 | ||
631 | /* | |
632 | * bad_el0_sync handles unexpected, but potentially recoverable synchronous | |
633 | * exceptions taken from EL0. Unlike bad_mode, this returns. | |
634 | */ | |
635 | asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr) | |
636 | { | |
637 | siginfo_t info; | |
638 | void __user *pc = (void __user *)instruction_pointer(regs); | |
639 | console_verbose(); | |
640 | ||
641 | pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n", | |
642 | smp_processor_id(), esr, esr_get_class_string(esr)); | |
9955ac47 MR |
643 | __show_regs(regs); |
644 | ||
645 | info.si_signo = SIGILL; | |
646 | info.si_errno = 0; | |
647 | info.si_code = ILL_ILLOPC; | |
648 | info.si_addr = pc; | |
60ffc30d | 649 | |
7d9e8f71 MR |
650 | current->thread.fault_address = 0; |
651 | current->thread.fault_code = 0; | |
652 | ||
653 | force_sig_info(info.si_signo, &info, current); | |
60ffc30d CM |
654 | } |
655 | ||
656 | void __pte_error(const char *file, int line, unsigned long val) | |
657 | { | |
c9cd0ed9 | 658 | pr_err("%s:%d: bad pte %016lx.\n", file, line, val); |
60ffc30d CM |
659 | } |
660 | ||
661 | void __pmd_error(const char *file, int line, unsigned long val) | |
662 | { | |
c9cd0ed9 | 663 | pr_err("%s:%d: bad pmd %016lx.\n", file, line, val); |
60ffc30d CM |
664 | } |
665 | ||
c79b954b JL |
666 | void __pud_error(const char *file, int line, unsigned long val) |
667 | { | |
c9cd0ed9 | 668 | pr_err("%s:%d: bad pud %016lx.\n", file, line, val); |
c79b954b JL |
669 | } |
670 | ||
60ffc30d CM |
671 | void __pgd_error(const char *file, int line, unsigned long val) |
672 | { | |
c9cd0ed9 | 673 | pr_err("%s:%d: bad pgd %016lx.\n", file, line, val); |
60ffc30d CM |
674 | } |
675 | ||
9fb7410f DM |
676 | /* GENERIC_BUG traps */ |
677 | ||
678 | int is_valid_bugaddr(unsigned long addr) | |
679 | { | |
680 | /* | |
681 | * bug_handler() only called for BRK #BUG_BRK_IMM. | |
682 | * So the answer is trivial -- any spurious instances with no | |
683 | * bug table entry will be rejected by report_bug() and passed | |
684 | * back to the debug-monitors code and handled as a fatal | |
685 | * unexpected debug exception. | |
686 | */ | |
687 | return 1; | |
688 | } | |
689 | ||
690 | static int bug_handler(struct pt_regs *regs, unsigned int esr) | |
691 | { | |
692 | if (user_mode(regs)) | |
693 | return DBG_HOOK_ERROR; | |
694 | ||
695 | switch (report_bug(regs->pc, regs)) { | |
696 | case BUG_TRAP_TYPE_BUG: | |
697 | die("Oops - BUG", regs, 0); | |
698 | break; | |
699 | ||
700 | case BUG_TRAP_TYPE_WARN: | |
a4653228 DM |
701 | /* Ideally, report_bug() should backtrace for us... but no. */ |
702 | dump_backtrace(regs, NULL); | |
9fb7410f DM |
703 | break; |
704 | ||
705 | default: | |
706 | /* unknown/unrecognised bug trap type */ | |
707 | return DBG_HOOK_ERROR; | |
708 | } | |
709 | ||
710 | /* If thread survives, skip over the BUG instruction and continue: */ | |
711 | regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */ | |
712 | return DBG_HOOK_HANDLED; | |
713 | } | |
714 | ||
715 | static struct break_hook bug_break_hook = { | |
716 | .esr_val = 0xf2000000 | BUG_BRK_IMM, | |
717 | .esr_mask = 0xffffffff, | |
718 | .fn = bug_handler, | |
719 | }; | |
720 | ||
721 | /* | |
722 | * Initial handler for AArch64 BRK exceptions | |
723 | * This handler only used until debug_traps_init(). | |
724 | */ | |
725 | int __init early_brk64(unsigned long addr, unsigned int esr, | |
726 | struct pt_regs *regs) | |
727 | { | |
728 | return bug_handler(regs, esr) != DBG_HOOK_HANDLED; | |
729 | } | |
730 | ||
731 | /* This registration must happen early, before debug_traps_init(). */ | |
60ffc30d CM |
732 | void __init trap_init(void) |
733 | { | |
9fb7410f | 734 | register_break_hook(&bug_break_hook); |
60ffc30d | 735 | } |