[mirror_ubuntu-artful-kernel.git] / arch / arm64 / kvm / guest.c

/*
 * Copyright (C) 2012,2013 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * Derived from arch/arm/kvm/guest.c:
 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/errno.h>
#include <linux/err.h>
#include <linux/kvm_host.h>
#include <linux/module.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <asm/cputype.h>
#include <asm/uaccess.h>
#include <asm/kvm.h>
#include <asm/kvm_asm.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_coproc.h>

#include "trace.h"

struct kvm_stats_debugfs_item debugfs_entries[] = {
	{ NULL }
};

int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
{
	return 0;
}

static u64 core_reg_offset_from_id(u64 id)
{
	return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE);
}

static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	/*
	 * Because the kvm_regs structure is a mix of 32, 64 and
	 * 128bit fields, we index it as if it was a 32bit
	 * array. Hence below, nr_regs is the number of entries, and
	 * off the index in the "array".
	 */
	__u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	int nr_regs = sizeof(*regs) / sizeof(__u32);
	u32 off;

	/* Our ID is an index into the kvm_regs struct. */
	off = core_reg_offset_from_id(reg->id);
	if (off >= nr_regs ||
	    (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
		return -ENOENT;

	if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id)))
		return -EFAULT;

	return 0;
}

static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	__u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	int nr_regs = sizeof(*regs) / sizeof(__u32);
	__uint128_t tmp;
	void *valp = &tmp;
	u64 off;
	int err = 0;

	/* Our ID is an index into the kvm_regs struct. */
	off = core_reg_offset_from_id(reg->id);
	if (off >= nr_regs ||
	    (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
		return -ENOENT;

	if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
		return -EINVAL;

	if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
		err = -EFAULT;
		goto out;
	}

	if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
		u32 mode = (*(u32 *)valp) & COMPAT_PSR_MODE_MASK;
		switch (mode) {
		case COMPAT_PSR_MODE_USR:
		case COMPAT_PSR_MODE_FIQ:
		case COMPAT_PSR_MODE_IRQ:
		case COMPAT_PSR_MODE_SVC:
		case COMPAT_PSR_MODE_ABT:
		case COMPAT_PSR_MODE_UND:
		case PSR_MODE_EL0t:
		case PSR_MODE_EL1t:
		case PSR_MODE_EL1h:
			break;
		default:
			err = -EINVAL;
			goto out;
		}
	}

	memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
out:
	return err;
}

int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
	return -EINVAL;
}

static unsigned long num_core_regs(void)
{
	return sizeof(struct kvm_regs) / sizeof(__u32);
}

/**
 * ARM64 versions of the TIMER registers, always available on arm64
 */

#define NUM_TIMER_REGS 3

static bool is_timer_reg(u64 index)
{
	switch (index) {
	case KVM_REG_ARM_TIMER_CTL:
	case KVM_REG_ARM_TIMER_CNT:
	case KVM_REG_ARM_TIMER_CVAL:
		return true;
	}
	return false;
}

static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
{
	if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
		return -EFAULT;
	uindices++;
	if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
		return -EFAULT;
	uindices++;
	if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
		return -EFAULT;

	return 0;
}

static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	void __user *uaddr = (void __user *)(long)reg->addr;
	u64 val;
	int ret;

	ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
	if (ret != 0)
		return -EFAULT;

	return kvm_arm_timer_set_reg(vcpu, reg->id, val);
}

static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	void __user *uaddr = (void __user *)(long)reg->addr;
	u64 val;

	val = kvm_arm_timer_get_reg(vcpu, reg->id);
	return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id));
}

/**
 * kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
 *
 * This is for all registers.
 */
unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
{
	return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
                + NUM_TIMER_REGS;
}

/**
 * kvm_arm_copy_reg_indices - get indices of all registers.
 *
 * We do core registers right here, then we apppend system regs.
 */
int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
{
	unsigned int i;
	const u64 core_reg = KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE;
	int ret;

	for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
		if (put_user(core_reg | i, uindices))
			return -EFAULT;
		uindices++;
	}

	ret = copy_timer_indices(vcpu, uindices);
	if (ret)
		return ret;
	uindices += NUM_TIMER_REGS;

	return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
}

int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	/* We currently use nothing arch-specific in upper 32 bits */
	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
		return -EINVAL;

	/* Register group 16 means we want a core register. */
	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
		return get_core_reg(vcpu, reg);

	if (is_timer_reg(reg->id))
		return get_timer_reg(vcpu, reg);

	return kvm_arm_sys_reg_get_reg(vcpu, reg);
}

int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	/* We currently use nothing arch-specific in upper 32 bits */
	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
		return -EINVAL;

	/* Register group 16 means we set a core register. */
	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
		return set_core_reg(vcpu, reg);

	if (is_timer_reg(reg->id))
		return set_timer_reg(vcpu, reg);

	return kvm_arm_sys_reg_set_reg(vcpu, reg);
}

int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
				  struct kvm_sregs *sregs)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
				  struct kvm_sregs *sregs)
{
	return -EINVAL;
}

int __attribute_const__ kvm_target_cpu(void)
{
	unsigned long implementor = read_cpuid_implementor();
	unsigned long part_number = read_cpuid_part_number();

	switch (implementor) {
	case ARM_CPU_IMP_ARM:
		switch (part_number) {
		case ARM_CPU_PART_AEM_V8:
			return KVM_ARM_TARGET_AEM_V8;
		case ARM_CPU_PART_FOUNDATION:
			return KVM_ARM_TARGET_FOUNDATION_V8;
		case ARM_CPU_PART_CORTEX_A53:
			return KVM_ARM_TARGET_CORTEX_A53;
		case ARM_CPU_PART_CORTEX_A57:
			return KVM_ARM_TARGET_CORTEX_A57;
		};
		break;
	case ARM_CPU_IMP_APM:
		switch (part_number) {
		case APM_CPU_PART_POTENZA:
			return KVM_ARM_TARGET_XGENE_POTENZA;
		};
		break;
	};

	return -EINVAL;
}

int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
{
	int target = kvm_target_cpu();

	if (target < 0)
		return -ENODEV;

	memset(init, 0, sizeof(*init));

	/*
	 * For now, we don't return any features.
	 * In future, we might use features to return target
	 * specific features available for the preferred
	 * target type.
	 */
	init->target = (__u32)target;

	return 0;
}

int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
				  struct kvm_translation *tr)
{
	return -EINVAL;
}

#define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE |    \
			    KVM_GUESTDBG_USE_SW_BP | \
			    KVM_GUESTDBG_USE_HW | \
			    KVM_GUESTDBG_SINGLESTEP)

/**
 * kvm_arch_vcpu_ioctl_set_guest_debug - set up guest debugging
 * @kvm:	pointer to the KVM struct
 * @kvm_guest_debug: the ioctl data buffer
 *
 * This sets up and enables the VM for guest debugging. Userspace
 * passes in a control flag to enable different debug types and
 * potentially other architecture specific information in the rest of
 * the structure.
 */
int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
					struct kvm_guest_debug *dbg)
{
	trace_kvm_set_guest_debug(vcpu, dbg->control);

	if (dbg->control & ~KVM_GUESTDBG_VALID_MASK)
		return -EINVAL;

	if (dbg->control & KVM_GUESTDBG_ENABLE) {
		vcpu->guest_debug = dbg->control;

		/* Hardware assisted Break and Watch points */
		if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
			vcpu->arch.external_debug_state = dbg->arch;
		}

	} else {
		/* If not enabled clear all flags */
		vcpu->guest_debug = 0;
	}
	return 0;
}
Commit	Line	Data
2f4a07c5 MZ	1	/*
	2	* Copyright (C) 2012,2013 - ARM Ltd
	3	* Author: Marc Zyngier <marc.zyngier@arm.com>
	4	*
	5	* Derived from arch/arm/kvm/guest.c:
	6	* Copyright (C) 2012 - Virtual Open Systems and Columbia University
	7	* Author: Christoffer Dall <c.dall@virtualopensystems.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#include <linux/errno.h>
	23	#include <linux/err.h>
	24	#include <linux/kvm_host.h>
	25	#include <linux/module.h>
	26	#include <linux/vmalloc.h>
	27	#include <linux/fs.h>
	28	#include <asm/cputype.h>
	29	#include <asm/uaccess.h>
	30	#include <asm/kvm.h>
	31	#include <asm/kvm_asm.h>
	32	#include <asm/kvm_emulate.h>
	33	#include <asm/kvm_coproc.h>
	34
eef8c85a AB	35	#include "trace.h"
eef8c85a AB	36
2f4a07c5 MZ	37	struct kvm_stats_debugfs_item debugfs_entries[] = {
	38	{ NULL }
	39	};
	40
	41	int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
	42	{
2f4a07c5 MZ	43	return 0;
	44	}
	45
	46	static u64 core_reg_offset_from_id(u64 id)
	47	{
	48	return id & ~(KVM_REG_ARCH_MASK \| KVM_REG_SIZE_MASK \| KVM_REG_ARM_CORE);
	49	}
	50
	51	static int get_core_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	52	{
	53	/*
	54	* Because the kvm_regs structure is a mix of 32, 64 and
	55	* 128bit fields, we index it as if it was a 32bit
	56	* array. Hence below, nr_regs is the number of entries, and
	57	* off the index in the "array".
	58	*/
	59	__u32 __user uaddr = (__u32 __user )(unsigned long)reg->addr;
	60	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	61	int nr_regs = sizeof(*regs) / sizeof(__u32);
	62	u32 off;
	63
	64	/* Our ID is an index into the kvm_regs struct. */
	65	off = core_reg_offset_from_id(reg->id);
	66	if (off >= nr_regs \|\|
	67	(off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
	68	return -ENOENT;
	69
	70	if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id)))
	71	return -EFAULT;
	72
	73	return 0;
	74	}
	75
	76	static int set_core_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	77	{
	78	__u32 __user uaddr = (__u32 __user )(unsigned long)reg->addr;
	79	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	80	int nr_regs = sizeof(*regs) / sizeof(__u32);
	81	__uint128_t tmp;
	82	void *valp = &tmp;
	83	u64 off;
	84	int err = 0;
	85
	86	/* Our ID is an index into the kvm_regs struct. */
	87	off = core_reg_offset_from_id(reg->id);
	88	if (off >= nr_regs \|\|
	89	(off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
	90	return -ENOENT;
	91
	92	if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
	93	return -EINVAL;
	94
	95	if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
	96	err = -EFAULT;
	97	goto out;
	98	}
	99
	100	if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
	101	u32 mode = ((u32 )valp) & COMPAT_PSR_MODE_MASK;
	102	switch (mode) {
0d854a60 MZ	103	case COMPAT_PSR_MODE_USR:
	104	case COMPAT_PSR_MODE_FIQ:
	105	case COMPAT_PSR_MODE_IRQ:
	106	case COMPAT_PSR_MODE_SVC:
	107	case COMPAT_PSR_MODE_ABT:
	108	case COMPAT_PSR_MODE_UND:
2f4a07c5 MZ	109	case PSR_MODE_EL0t:
	110	case PSR_MODE_EL1t:
	111	case PSR_MODE_EL1h:
	112	break;
	113	default:
	114	err = -EINVAL;
	115	goto out;
	116	}
	117	}
	118
	119	memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
	120	out:
	121	return err;
	122	}
	123
	124	int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu vcpu, struct kvm_regs regs)
	125	{
	126	return -EINVAL;
	127	}
	128
	129	int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu vcpu, struct kvm_regs regs)
	130	{
	131	return -EINVAL;
	132	}
	133
	134	static unsigned long num_core_regs(void)
	135	{
	136	return sizeof(struct kvm_regs) / sizeof(__u32);
	137	}
	138
1df08ba0 AB	139	/**
	140	* ARM64 versions of the TIMER registers, always available on arm64
	141	*/
	142
	143	#define NUM_TIMER_REGS 3
	144
	145	static bool is_timer_reg(u64 index)
	146	{
	147	switch (index) {
	148	case KVM_REG_ARM_TIMER_CTL:
	149	case KVM_REG_ARM_TIMER_CNT:
	150	case KVM_REG_ARM_TIMER_CVAL:
	151	return true;
	152	}
	153	return false;
	154	}
	155
	156	static int copy_timer_indices(struct kvm_vcpu vcpu, u64 __user uindices)
	157	{
	158	if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
	159	return -EFAULT;
	160	uindices++;
	161	if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
	162	return -EFAULT;
	163	uindices++;
	164	if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
	165	return -EFAULT;
	166
	167	return 0;
	168	}
	169
	170	static int set_timer_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	171	{
	172	void __user uaddr = (void __user )(long)reg->addr;
	173	u64 val;
	174	int ret;
	175
	176	ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
	177	if (ret != 0)
bd218bce	178	return -EFAULT;
1df08ba0 AB	179
	180	return kvm_arm_timer_set_reg(vcpu, reg->id, val);
	181	}
	182
	183	static int get_timer_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	184	{
	185	void __user uaddr = (void __user )(long)reg->addr;
	186	u64 val;
	187
	188	val = kvm_arm_timer_get_reg(vcpu, reg->id);
	189	return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id));
	190	}
	191
2f4a07c5 MZ	192	/**
	193	* kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
	194	*
	195	* This is for all registers.
	196	*/
	197	unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
	198	{
1df08ba0 AB	199	return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
1df08ba0 AB	200	+ NUM_TIMER_REGS;
2f4a07c5 MZ	201	}
	202
	203	/**
	204	* kvm_arm_copy_reg_indices - get indices of all registers.
	205	*
	206	* We do core registers right here, then we apppend system regs.
	207	*/
	208	int kvm_arm_copy_reg_indices(struct kvm_vcpu vcpu, u64 __user uindices)
	209	{
	210	unsigned int i;
	211	const u64 core_reg = KVM_REG_ARM64 \| KVM_REG_SIZE_U64 \| KVM_REG_ARM_CORE;
1df08ba0	212	int ret;
2f4a07c5 MZ	213
	214	for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
	215	if (put_user(core_reg \| i, uindices))
	216	return -EFAULT;
	217	uindices++;
	218	}
	219
1df08ba0 AB	220	ret = copy_timer_indices(vcpu, uindices);
	221	if (ret)
	222	return ret;
	223	uindices += NUM_TIMER_REGS;
	224
2f4a07c5 MZ	225	return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
	226	}
	227
	228	int kvm_arm_get_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	229	{
	230	/* We currently use nothing arch-specific in upper 32 bits */
	231	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
	232	return -EINVAL;
	233
	234	/* Register group 16 means we want a core register. */
	235	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
	236	return get_core_reg(vcpu, reg);
	237
1df08ba0 AB	238	if (is_timer_reg(reg->id))
	239	return get_timer_reg(vcpu, reg);
	240
2f4a07c5 MZ	241	return kvm_arm_sys_reg_get_reg(vcpu, reg);
	242	}
	243
	244	int kvm_arm_set_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	245	{
	246	/* We currently use nothing arch-specific in upper 32 bits */
	247	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
	248	return -EINVAL;
	249
	250	/* Register group 16 means we set a core register. */
	251	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
	252	return set_core_reg(vcpu, reg);
	253
1df08ba0 AB	254	if (is_timer_reg(reg->id))
	255	return set_timer_reg(vcpu, reg);
	256
2f4a07c5 MZ	257	return kvm_arm_sys_reg_set_reg(vcpu, reg);
	258	}
	259
	260	int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
	261	struct kvm_sregs *sregs)
	262	{
	263	return -EINVAL;
	264	}
	265
	266	int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
	267	struct kvm_sregs *sregs)
	268	{
	269	return -EINVAL;
	270	}
	271
	272	int __attribute_const__ kvm_target_cpu(void)
	273	{
	274	unsigned long implementor = read_cpuid_implementor();
	275	unsigned long part_number = read_cpuid_part_number();
	276
e28100bd AP	277	switch (implementor) {
	278	case ARM_CPU_IMP_ARM:
	279	switch (part_number) {
	280	case ARM_CPU_PART_AEM_V8:
	281	return KVM_ARM_TARGET_AEM_V8;
	282	case ARM_CPU_PART_FOUNDATION:
	283	return KVM_ARM_TARGET_FOUNDATION_V8;
1252b331 MZ	284	case ARM_CPU_PART_CORTEX_A53:
1252b331 MZ	285	return KVM_ARM_TARGET_CORTEX_A53;
e28100bd AP	286	case ARM_CPU_PART_CORTEX_A57:
	287	return KVM_ARM_TARGET_CORTEX_A57;
	288	};
	289	break;
	290	case ARM_CPU_IMP_APM:
	291	switch (part_number) {
	292	case APM_CPU_PART_POTENZA:
	293	return KVM_ARM_TARGET_XGENE_POTENZA;
	294	};
	295	break;
	296	};
2f4a07c5	297
e28100bd	298	return -EINVAL;
2f4a07c5 MZ	299	}
2f4a07c5 MZ	300
473bdc0e AP	301	int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
	302	{
	303	int target = kvm_target_cpu();
	304
	305	if (target < 0)
	306	return -ENODEV;
	307
	308	memset(init, 0, sizeof(*init));
	309
	310	/*
	311	* For now, we don't return any features.
	312	* In future, we might use features to return target
	313	* specific features available for the preferred
	314	* target type.
	315	*/
	316	init->target = (__u32)target;
	317
	318	return 0;
	319	}
	320
2f4a07c5 MZ	321	int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu vcpu, struct kvm_fpu fpu)
	322	{
	323	return -EINVAL;
	324	}
	325
	326	int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu vcpu, struct kvm_fpu fpu)
	327	{
	328	return -EINVAL;
	329	}
	330
	331	int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
	332	struct kvm_translation *tr)
	333	{
	334	return -EINVAL;
	335	}
0e6f07f2	336
337b99bf AB	337	#define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE \| \
337b99bf AB	338	KVM_GUESTDBG_USE_SW_BP \| \
834bf887	339	KVM_GUESTDBG_USE_HW \| \
337b99bf	340	KVM_GUESTDBG_SINGLESTEP)
0e6f07f2 AB	341
	342	/**
	343	* kvm_arch_vcpu_ioctl_set_guest_debug - set up guest debugging
	344	* @kvm: pointer to the KVM struct
	345	* @kvm_guest_debug: the ioctl data buffer
	346	*
	347	* This sets up and enables the VM for guest debugging. Userspace
	348	* passes in a control flag to enable different debug types and
	349	* potentially other architecture specific information in the rest of
	350	* the structure.
	351	*/
	352	int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
	353	struct kvm_guest_debug *dbg)
	354	{
eef8c85a AB	355	trace_kvm_set_guest_debug(vcpu, dbg->control);
eef8c85a AB	356
0e6f07f2 AB	357	if (dbg->control & ~KVM_GUESTDBG_VALID_MASK)
	358	return -EINVAL;
	359
	360	if (dbg->control & KVM_GUESTDBG_ENABLE) {
	361	vcpu->guest_debug = dbg->control;
834bf887 AB	362
	363	/* Hardware assisted Break and Watch points */
	364	if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
	365	vcpu->arch.external_debug_state = dbg->arch;
	366	}
	367
0e6f07f2 AB	368	} else {
	369	/* If not enabled clear all flags */
	370	vcpu->guest_debug = 0;
	371	}
	372	return 0;
	373	}