]>
Commit | Line | Data |
---|---|---|
caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
b990a9d3 MZ |
2 | /* |
3 | * Copyright (C) 2012,2013 - ARM Ltd | |
4 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
5 | * | |
6 | * Based on arch/arm/kvm/coproc_a15.c: | |
7 | * Copyright (C) 2012 - Virtual Open Systems and Columbia University | |
8 | * Authors: Rusty Russell <rusty@rustcorp.au> | |
9 | * Christoffer Dall <c.dall@virtualopensystems.com> | |
b990a9d3 MZ |
10 | */ |
11 | #include <linux/kvm_host.h> | |
12 | #include <asm/cputype.h> | |
13 | #include <asm/kvm_arm.h> | |
14 | #include <asm/kvm_asm.h> | |
15 | #include <asm/kvm_host.h> | |
16 | #include <asm/kvm_emulate.h> | |
17 | #include <asm/kvm_coproc.h> | |
1f3d8699 | 18 | #include <asm/sysreg.h> |
b990a9d3 MZ |
19 | #include <linux/init.h> |
20 | ||
21 | #include "sys_regs.h" | |
22 | ||
23 | static bool access_actlr(struct kvm_vcpu *vcpu, | |
3fec037d | 24 | struct sys_reg_params *p, |
b990a9d3 MZ |
25 | const struct sys_reg_desc *r) |
26 | { | |
27 | if (p->is_write) | |
28 | return ignore_write(vcpu, p); | |
29 | ||
8d404c4c | 30 | p->regval = vcpu_read_sys_reg(vcpu, ACTLR_EL1); |
b990a9d3 MZ |
31 | return true; |
32 | } | |
33 | ||
34 | static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) | |
35 | { | |
8d404c4c | 36 | __vcpu_sys_reg(vcpu, ACTLR_EL1) = read_sysreg(actlr_el1); |
b990a9d3 MZ |
37 | } |
38 | ||
39 | /* | |
40 | * Implementation specific sys-reg registers. | |
41 | * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2 | |
42 | */ | |
43 | static const struct sys_reg_desc genericv8_sys_regs[] = { | |
851050a5 | 44 | { SYS_DESC(SYS_ACTLR_EL1), access_actlr, reset_actlr, ACTLR_EL1 }, |
b990a9d3 MZ |
45 | }; |
46 | ||
06c7654d MZ |
47 | static const struct sys_reg_desc genericv8_cp15_regs[] = { |
48 | /* ACTLR */ | |
49 | { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), | |
50 | access_actlr }, | |
51 | }; | |
52 | ||
b990a9d3 MZ |
53 | static struct kvm_sys_reg_target_table genericv8_target_table = { |
54 | .table64 = { | |
55 | .table = genericv8_sys_regs, | |
56 | .num = ARRAY_SIZE(genericv8_sys_regs), | |
57 | }, | |
06c7654d MZ |
58 | .table32 = { |
59 | .table = genericv8_cp15_regs, | |
60 | .num = ARRAY_SIZE(genericv8_cp15_regs), | |
61 | }, | |
b990a9d3 MZ |
62 | }; |
63 | ||
64 | static int __init sys_reg_genericv8_init(void) | |
65 | { | |
66 | unsigned int i; | |
67 | ||
68 | for (i = 1; i < ARRAY_SIZE(genericv8_sys_regs); i++) | |
69 | BUG_ON(cmp_sys_reg(&genericv8_sys_regs[i-1], | |
70 | &genericv8_sys_regs[i]) >= 0); | |
71 | ||
72 | kvm_register_target_sys_reg_table(KVM_ARM_TARGET_AEM_V8, | |
73 | &genericv8_target_table); | |
74 | kvm_register_target_sys_reg_table(KVM_ARM_TARGET_FOUNDATION_V8, | |
75 | &genericv8_target_table); | |
1252b331 MZ |
76 | kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A53, |
77 | &genericv8_target_table); | |
b990a9d3 MZ |
78 | kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57, |
79 | &genericv8_target_table); | |
e28100bd AP |
80 | kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA, |
81 | &genericv8_target_table); | |
bca556ac SP |
82 | kvm_register_target_sys_reg_table(KVM_ARM_TARGET_GENERIC_V8, |
83 | &genericv8_target_table); | |
e28100bd | 84 | |
b990a9d3 MZ |
85 | return 0; |
86 | } | |
87 | late_initcall(sys_reg_genericv8_init); |