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[mirror_ubuntu-hirsute-kernel.git] / arch / arm64 / mm / mmu.c
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caab277b 1// SPDX-License-Identifier: GPL-2.0-only
c1cc1552
CM
2/*
3 * Based on arch/arm/mm/mmu.c
4 *
5 * Copyright (C) 1995-2005 Russell King
6 * Copyright (C) 2012 ARM Ltd.
c1cc1552
CM
7 */
8
5a9e3e15 9#include <linux/cache.h>
c1cc1552
CM
10#include <linux/export.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/init.h>
98d2e153
TA
14#include <linux/ioport.h>
15#include <linux/kexec.h>
61bd93ce 16#include <linux/libfdt.h>
c1cc1552
CM
17#include <linux/mman.h>
18#include <linux/nodemask.h>
19#include <linux/memblock.h>
20#include <linux/fs.h>
2475ff9d 21#include <linux/io.h>
2077be67 22#include <linux/mm.h>
6efd8499 23#include <linux/vmalloc.h>
c1cc1552 24
21ab99c2 25#include <asm/barrier.h>
c1cc1552 26#include <asm/cputype.h>
af86e597 27#include <asm/fixmap.h>
068a17a5 28#include <asm/kasan.h>
b433dce0 29#include <asm/kernel-pgtable.h>
c1cc1552
CM
30#include <asm/sections.h>
31#include <asm/setup.h>
87dfb311 32#include <linux/sizes.h>
c1cc1552
CM
33#include <asm/tlb.h>
34#include <asm/mmu_context.h>
1404d6f1 35#include <asm/ptdump.h>
ec28bb9c 36#include <asm/tlbflush.h>
c1cc1552 37
c0951366 38#define NO_BLOCK_MAPPINGS BIT(0)
d27cfa1f 39#define NO_CONT_MAPPINGS BIT(1)
c0951366 40
dd006da2 41u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
fa2a8445 42u64 idmap_ptrs_per_pgd = PTRS_PER_PGD;
67e7fdfc 43u64 vabits_user __ro_after_init;
4a1daf29 44EXPORT_SYMBOL(vabits_user);
dd006da2 45
5a9e3e15 46u64 kimage_voffset __ro_after_init;
a7f8de16
AB
47EXPORT_SYMBOL(kimage_voffset);
48
c1cc1552
CM
49/*
50 * Empty_zero_page is a special page that is used for zero-initialized data
51 * and COW.
52 */
5227cfa7 53unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
c1cc1552
CM
54EXPORT_SYMBOL(empty_zero_page);
55
f9040773
AB
56static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
57static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
58static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
59
2330b7ca
JY
60static DEFINE_SPINLOCK(swapper_pgdir_lock);
61
62void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd)
63{
64 pgd_t *fixmap_pgdp;
65
66 spin_lock(&swapper_pgdir_lock);
26a6f87e 67 fixmap_pgdp = pgd_set_fixmap(__pa_symbol(pgdp));
2330b7ca
JY
68 WRITE_ONCE(*fixmap_pgdp, pgd);
69 /*
70 * We need dsb(ishst) here to ensure the page-table-walker sees
71 * our new entry before set_p?d() returns. The fixmap's
72 * flush_tlb_kernel_range() via clear_fixmap() does this for us.
73 */
74 pgd_clear_fixmap();
75 spin_unlock(&swapper_pgdir_lock);
76}
77
c1cc1552
CM
78pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
79 unsigned long size, pgprot_t vma_prot)
80{
81 if (!pfn_valid(pfn))
82 return pgprot_noncached(vma_prot);
83 else if (file->f_flags & O_SYNC)
84 return pgprot_writecombine(vma_prot);
85 return vma_prot;
86}
87EXPORT_SYMBOL(phys_mem_access_prot);
88
90292aca 89static phys_addr_t __init early_pgtable_alloc(int shift)
c1cc1552 90{
7142392d
SP
91 phys_addr_t phys;
92 void *ptr;
93
9a8dd708 94 phys = memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
ecc3e771
MR
95 if (!phys)
96 panic("Failed to allocate page table page\n");
f4710445
MR
97
98 /*
99 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
100 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
101 * any level of table.
102 */
103 ptr = pte_set_fixmap(phys);
104
21ab99c2
MR
105 memset(ptr, 0, PAGE_SIZE);
106
f4710445
MR
107 /*
108 * Implicit barriers also ensure the zeroed page is visible to the page
109 * table walker
110 */
111 pte_clear_fixmap();
112
113 return phys;
c1cc1552
CM
114}
115
e98216b5
AB
116static bool pgattr_change_is_safe(u64 old, u64 new)
117{
118 /*
119 * The following mapping attributes may be updated in live
120 * kernel mappings without the need for break-before-make.
121 */
753e8abc 122 static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG;
e98216b5 123
141d1497
AB
124 /* creating or taking down mappings is always safe */
125 if (old == 0 || new == 0)
126 return true;
127
128 /* live contiguous mappings may not be manipulated at all */
129 if ((old | new) & PTE_CONT)
130 return false;
131
753e8abc
AB
132 /* Transitioning from Non-Global to Global is unsafe */
133 if (old & ~new & PTE_NG)
134 return false;
4e602056 135
141d1497 136 return ((old ^ new) & ~mask) == 0;
e98216b5
AB
137}
138
20a004e7 139static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end,
d27cfa1f 140 phys_addr_t phys, pgprot_t prot)
c1cc1552 141{
20a004e7 142 pte_t *ptep;
c1cc1552 143
20a004e7 144 ptep = pte_set_fixmap_offset(pmdp, addr);
c1cc1552 145 do {
20a004e7 146 pte_t old_pte = READ_ONCE(*ptep);
e98216b5 147
20a004e7 148 set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot));
e98216b5
AB
149
150 /*
151 * After the PTE entry has been populated once, we
152 * only allow updates to the permission attributes.
153 */
20a004e7
WD
154 BUG_ON(!pgattr_change_is_safe(pte_val(old_pte),
155 READ_ONCE(pte_val(*ptep))));
e98216b5 156
e393cf40 157 phys += PAGE_SIZE;
20a004e7 158 } while (ptep++, addr += PAGE_SIZE, addr != end);
f4710445
MR
159
160 pte_clear_fixmap();
c1cc1552
CM
161}
162
20a004e7 163static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,
d27cfa1f
AB
164 unsigned long end, phys_addr_t phys,
165 pgprot_t prot,
90292aca 166 phys_addr_t (*pgtable_alloc)(int),
d27cfa1f 167 int flags)
c1cc1552 168{
c1cc1552 169 unsigned long next;
20a004e7 170 pmd_t pmd = READ_ONCE(*pmdp);
c1cc1552 171
20a004e7
WD
172 BUG_ON(pmd_sect(pmd));
173 if (pmd_none(pmd)) {
d27cfa1f 174 phys_addr_t pte_phys;
132233a7 175 BUG_ON(!pgtable_alloc);
90292aca 176 pte_phys = pgtable_alloc(PAGE_SHIFT);
20a004e7
WD
177 __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE);
178 pmd = READ_ONCE(*pmdp);
c1cc1552 179 }
20a004e7 180 BUG_ON(pmd_bad(pmd));
d27cfa1f
AB
181
182 do {
183 pgprot_t __prot = prot;
184
185 next = pte_cont_addr_end(addr, end);
186
187 /* use a contiguous mapping if the range is suitably aligned */
188 if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) &&
189 (flags & NO_CONT_MAPPINGS) == 0)
190 __prot = __pgprot(pgprot_val(prot) | PTE_CONT);
191
20a004e7 192 init_pte(pmdp, addr, next, phys, __prot);
d27cfa1f
AB
193
194 phys += next - addr;
195 } while (addr = next, addr != end);
196}
197
20a004e7 198static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end,
d27cfa1f 199 phys_addr_t phys, pgprot_t prot,
90292aca 200 phys_addr_t (*pgtable_alloc)(int), int flags)
d27cfa1f
AB
201{
202 unsigned long next;
20a004e7 203 pmd_t *pmdp;
c1cc1552 204
20a004e7 205 pmdp = pmd_set_fixmap_offset(pudp, addr);
c1cc1552 206 do {
20a004e7 207 pmd_t old_pmd = READ_ONCE(*pmdp);
e98216b5 208
c1cc1552 209 next = pmd_addr_end(addr, end);
e98216b5 210
c1cc1552 211 /* try section mapping first */
83863f25 212 if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
c0951366 213 (flags & NO_BLOCK_MAPPINGS) == 0) {
20a004e7 214 pmd_set_huge(pmdp, phys, prot);
e98216b5 215
a55f9929 216 /*
e98216b5
AB
217 * After the PMD entry has been populated once, we
218 * only allow updates to the permission attributes.
a55f9929 219 */
e98216b5 220 BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
20a004e7 221 READ_ONCE(pmd_val(*pmdp))));
a55f9929 222 } else {
20a004e7 223 alloc_init_cont_pte(pmdp, addr, next, phys, prot,
d27cfa1f 224 pgtable_alloc, flags);
e98216b5
AB
225
226 BUG_ON(pmd_val(old_pmd) != 0 &&
20a004e7 227 pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp)));
a55f9929 228 }
c1cc1552 229 phys += next - addr;
20a004e7 230 } while (pmdp++, addr = next, addr != end);
f4710445
MR
231
232 pmd_clear_fixmap();
c1cc1552
CM
233}
234
20a004e7 235static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,
d27cfa1f
AB
236 unsigned long end, phys_addr_t phys,
237 pgprot_t prot,
90292aca 238 phys_addr_t (*pgtable_alloc)(int), int flags)
d27cfa1f
AB
239{
240 unsigned long next;
20a004e7 241 pud_t pud = READ_ONCE(*pudp);
d27cfa1f
AB
242
243 /*
244 * Check for initial section mappings in the pgd/pud.
245 */
20a004e7
WD
246 BUG_ON(pud_sect(pud));
247 if (pud_none(pud)) {
d27cfa1f
AB
248 phys_addr_t pmd_phys;
249 BUG_ON(!pgtable_alloc);
90292aca 250 pmd_phys = pgtable_alloc(PMD_SHIFT);
20a004e7
WD
251 __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE);
252 pud = READ_ONCE(*pudp);
d27cfa1f 253 }
20a004e7 254 BUG_ON(pud_bad(pud));
d27cfa1f
AB
255
256 do {
257 pgprot_t __prot = prot;
258
259 next = pmd_cont_addr_end(addr, end);
260
261 /* use a contiguous mapping if the range is suitably aligned */
262 if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) &&
263 (flags & NO_CONT_MAPPINGS) == 0)
264 __prot = __pgprot(pgprot_val(prot) | PTE_CONT);
265
20a004e7 266 init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags);
d27cfa1f
AB
267
268 phys += next - addr;
269 } while (addr = next, addr != end);
270}
271
da141706
LA
272static inline bool use_1G_block(unsigned long addr, unsigned long next,
273 unsigned long phys)
274{
275 if (PAGE_SHIFT != 12)
276 return false;
277
278 if (((addr | next | phys) & ~PUD_MASK) != 0)
279 return false;
280
281 return true;
282}
283
20a004e7
WD
284static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
285 phys_addr_t phys, pgprot_t prot,
90292aca 286 phys_addr_t (*pgtable_alloc)(int),
20a004e7 287 int flags)
c1cc1552 288{
c1cc1552 289 unsigned long next;
20a004e7
WD
290 pud_t *pudp;
291 pgd_t pgd = READ_ONCE(*pgdp);
c1cc1552 292
20a004e7 293 if (pgd_none(pgd)) {
132233a7
LA
294 phys_addr_t pud_phys;
295 BUG_ON(!pgtable_alloc);
90292aca 296 pud_phys = pgtable_alloc(PUD_SHIFT);
20a004e7
WD
297 __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE);
298 pgd = READ_ONCE(*pgdp);
c79b954b 299 }
20a004e7 300 BUG_ON(pgd_bad(pgd));
c79b954b 301
20a004e7 302 pudp = pud_set_fixmap_offset(pgdp, addr);
c1cc1552 303 do {
20a004e7 304 pud_t old_pud = READ_ONCE(*pudp);
e98216b5 305
c1cc1552 306 next = pud_addr_end(addr, end);
206a2a73
SC
307
308 /*
309 * For 4K granule only, attempt to put down a 1GB block
310 */
c0951366
AB
311 if (use_1G_block(addr, next, phys) &&
312 (flags & NO_BLOCK_MAPPINGS) == 0) {
20a004e7 313 pud_set_huge(pudp, phys, prot);
206a2a73
SC
314
315 /*
e98216b5
AB
316 * After the PUD entry has been populated once, we
317 * only allow updates to the permission attributes.
206a2a73 318 */
e98216b5 319 BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
20a004e7 320 READ_ONCE(pud_val(*pudp))));
206a2a73 321 } else {
20a004e7 322 alloc_init_cont_pmd(pudp, addr, next, phys, prot,
d27cfa1f 323 pgtable_alloc, flags);
e98216b5
AB
324
325 BUG_ON(pud_val(old_pud) != 0 &&
20a004e7 326 pud_val(old_pud) != READ_ONCE(pud_val(*pudp)));
206a2a73 327 }
c1cc1552 328 phys += next - addr;
20a004e7 329 } while (pudp++, addr = next, addr != end);
f4710445
MR
330
331 pud_clear_fixmap();
c1cc1552
CM
332}
333
40f87d31
AB
334static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
335 unsigned long virt, phys_addr_t size,
336 pgprot_t prot,
90292aca 337 phys_addr_t (*pgtable_alloc)(int),
c0951366 338 int flags)
c1cc1552
CM
339{
340 unsigned long addr, length, end, next;
20a004e7 341 pgd_t *pgdp = pgd_offset_raw(pgdir, virt);
c1cc1552 342
cc5d2b3b
MR
343 /*
344 * If the virtual and physical address don't have the same offset
345 * within a page, we cannot map the region as the caller expects.
346 */
347 if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
348 return;
349
9c4e08a3 350 phys &= PAGE_MASK;
c1cc1552
CM
351 addr = virt & PAGE_MASK;
352 length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
353
c1cc1552
CM
354 end = addr + length;
355 do {
356 next = pgd_addr_end(addr, end);
20a004e7 357 alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc,
c0951366 358 flags);
c1cc1552 359 phys += next - addr;
20a004e7 360 } while (pgdp++, addr = next, addr != end);
c1cc1552
CM
361}
362
475ba3fc 363static phys_addr_t __pgd_pgtable_alloc(int shift)
369aaab8 364{
50f11a8a 365 void *ptr = (void *)__get_free_page(GFP_PGTABLE_KERNEL);
369aaab8
YZ
366 BUG_ON(!ptr);
367
368 /* Ensure the zeroed page is visible to the page table walker */
369 dsb(ishst);
370 return __pa(ptr);
371}
372
90292aca 373static phys_addr_t pgd_pgtable_alloc(int shift)
da141706 374{
475ba3fc 375 phys_addr_t pa = __pgd_pgtable_alloc(shift);
90292aca
YZ
376
377 /*
378 * Call proper page table ctor in case later we need to
379 * call core mm functions like apply_to_page_range() on
380 * this pre-allocated page table.
381 *
382 * We don't select ARCH_ENABLE_SPLIT_PMD_PTLOCK if pmd is
383 * folded, and if so pgtable_pmd_page_ctor() becomes nop.
384 */
385 if (shift == PAGE_SHIFT)
475ba3fc 386 BUG_ON(!pgtable_page_ctor(phys_to_page(pa)));
90292aca 387 else if (shift == PMD_SHIFT)
475ba3fc 388 BUG_ON(!pgtable_pmd_page_ctor(phys_to_page(pa)));
21ab99c2 389
475ba3fc 390 return pa;
da141706
LA
391}
392
132233a7
LA
393/*
394 * This function can only be used to modify existing table entries,
395 * without allocating new levels of table. Note that this permits the
396 * creation of new section or page entries.
397 */
398static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
da141706 399 phys_addr_t size, pgprot_t prot)
d7ecbddf
MS
400{
401 if (virt < VMALLOC_START) {
402 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
403 &phys, virt);
404 return;
405 }
d27cfa1f
AB
406 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
407 NO_CONT_MAPPINGS);
d7ecbddf
MS
408}
409
8ce837ce
AB
410void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
411 unsigned long virt, phys_addr_t size,
f14c66ce 412 pgprot_t prot, bool page_mappings_only)
8ce837ce 413{
c0951366
AB
414 int flags = 0;
415
1378dc3d
AB
416 BUG_ON(mm == &init_mm);
417
c0951366 418 if (page_mappings_only)
d27cfa1f 419 flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
c0951366 420
11509a30 421 __create_pgd_mapping(mm->pgd, phys, virt, size, prot,
c0951366 422 pgd_pgtable_alloc, flags);
d7ecbddf
MS
423}
424
aa8c09be
AB
425static void update_mapping_prot(phys_addr_t phys, unsigned long virt,
426 phys_addr_t size, pgprot_t prot)
da141706
LA
427{
428 if (virt < VMALLOC_START) {
aa8c09be 429 pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n",
da141706
LA
430 &phys, virt);
431 return;
432 }
433
d27cfa1f
AB
434 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
435 NO_CONT_MAPPINGS);
aa8c09be
AB
436
437 /* flush the TLBs after updating live kernel mappings */
438 flush_tlb_kernel_range(virt, virt + size);
da141706
LA
439}
440
20a004e7 441static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start,
98d2e153
TA
442 phys_addr_t end, pgprot_t prot, int flags)
443{
20a004e7 444 __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start,
98d2e153
TA
445 prot, early_pgtable_alloc, flags);
446}
447
448void __init mark_linear_text_alias_ro(void)
449{
450 /*
451 * Remove the write permissions from the linear alias of .text/.rodata
452 */
453 update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text),
454 (unsigned long)__init_begin - (unsigned long)_text,
455 PAGE_KERNEL_RO);
456}
457
20a004e7 458static void __init map_mem(pgd_t *pgdp)
da141706 459{
eac8017f
MC
460 phys_addr_t kernel_start = __pa_symbol(_text);
461 phys_addr_t kernel_end = __pa_symbol(__init_begin);
98d2e153 462 struct memblock_region *reg;
c0951366
AB
463 int flags = 0;
464
c55191e9 465 if (rodata_full || debug_pagealloc_enabled())
d27cfa1f 466 flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
068a17a5 467
da141706 468 /*
f9040773
AB
469 * Take care not to create a writable alias for the
470 * read-only text and rodata sections of the kernel image.
98d2e153
TA
471 * So temporarily mark them as NOMAP to skip mappings in
472 * the following for-loop
da141706 473 */
98d2e153
TA
474 memblock_mark_nomap(kernel_start, kernel_end - kernel_start);
475#ifdef CONFIG_KEXEC_CORE
476 if (crashk_res.end)
477 memblock_mark_nomap(crashk_res.start,
478 resource_size(&crashk_res));
479#endif
068a17a5 480
98d2e153
TA
481 /* map all the memory banks */
482 for_each_memblock(memory, reg) {
483 phys_addr_t start = reg->base;
484 phys_addr_t end = start + reg->size;
da141706 485
98d2e153
TA
486 if (start >= end)
487 break;
488 if (memblock_is_nomap(reg))
489 continue;
490
20a004e7 491 __map_memblock(pgdp, start, end, PAGE_KERNEL, flags);
98d2e153 492 }
f9040773
AB
493
494 /*
5ea5306c
AB
495 * Map the linear alias of the [_text, __init_begin) interval
496 * as non-executable now, and remove the write permission in
497 * mark_linear_text_alias_ro() below (which will be called after
498 * alternative patching has completed). This makes the contents
499 * of the region accessible to subsystems such as hibernate,
500 * but protects it from inadvertent modification or execution.
d27cfa1f
AB
501 * Note that contiguous mappings cannot be remapped in this way,
502 * so we should avoid them here.
f9040773 503 */
20a004e7 504 __map_memblock(pgdp, kernel_start, kernel_end,
98d2e153
TA
505 PAGE_KERNEL, NO_CONT_MAPPINGS);
506 memblock_clear_nomap(kernel_start, kernel_end - kernel_start);
da141706 507
98d2e153 508#ifdef CONFIG_KEXEC_CORE
5ea5306c 509 /*
98d2e153
TA
510 * Use page-level mappings here so that we can shrink the region
511 * in page granularity and put back unused memory to buddy system
512 * through /sys/kernel/kexec_crash_size interface.
5ea5306c 513 */
98d2e153 514 if (crashk_res.end) {
20a004e7 515 __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1,
98d2e153
TA
516 PAGE_KERNEL,
517 NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS);
518 memblock_clear_nomap(crashk_res.start,
519 resource_size(&crashk_res));
c1cc1552 520 }
98d2e153 521#endif
c1cc1552
CM
522}
523
da141706
LA
524void mark_rodata_ro(void)
525{
2f39b5f9 526 unsigned long section_size;
f9040773 527
2f39b5f9 528 /*
9fdc14c5
AB
529 * mark .rodata as read only. Use __init_begin rather than __end_rodata
530 * to cover NOTES and EXCEPTION_TABLE.
2f39b5f9 531 */
9fdc14c5 532 section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
aa8c09be 533 update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,
2f39b5f9 534 section_size, PAGE_KERNEL_RO);
e98216b5 535
1404d6f1 536 debug_checkwx();
da141706 537}
da141706 538
20a004e7 539static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end,
d27cfa1f 540 pgprot_t prot, struct vm_struct *vma,
92bbd16e 541 int flags, unsigned long vm_flags)
068a17a5 542{
2077be67 543 phys_addr_t pa_start = __pa_symbol(va_start);
068a17a5
MR
544 unsigned long size = va_end - va_start;
545
546 BUG_ON(!PAGE_ALIGNED(pa_start));
547 BUG_ON(!PAGE_ALIGNED(size));
548
20a004e7 549 __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot,
d27cfa1f 550 early_pgtable_alloc, flags);
f9040773 551
92bbd16e
WD
552 if (!(vm_flags & VM_NO_GUARD))
553 size += PAGE_SIZE;
554
f9040773
AB
555 vma->addr = va_start;
556 vma->phys_addr = pa_start;
557 vma->size = size;
92bbd16e 558 vma->flags = VM_MAP | vm_flags;
f9040773
AB
559 vma->caller = __builtin_return_address(0);
560
561 vm_area_add_early(vma);
068a17a5
MR
562}
563
28b066da
AB
564static int __init parse_rodata(char *arg)
565{
c55191e9
AB
566 int ret = strtobool(arg, &rodata_enabled);
567 if (!ret) {
568 rodata_full = false;
569 return 0;
570 }
571
572 /* permit 'full' in addition to boolean options */
573 if (strcmp(arg, "full"))
574 return -EINVAL;
575
576 rodata_enabled = true;
577 rodata_full = true;
578 return 0;
28b066da
AB
579}
580early_param("rodata", parse_rodata);
581
51a0048b
WD
582#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
583static int __init map_entry_trampoline(void)
584{
51a0048b
WD
585 pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
586 phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start);
587
588 /* The trampoline is always mapped and can therefore be global */
589 pgprot_val(prot) &= ~PTE_NG;
590
591 /* Map only the text into the trampoline page table */
592 memset(tramp_pg_dir, 0, PGD_SIZE);
593 __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE,
475ba3fc 594 prot, __pgd_pgtable_alloc, 0);
51a0048b 595
6c27c408 596 /* Map both the text and data into the kernel page table */
51a0048b 597 __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot);
6c27c408
WD
598 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {
599 extern char __entry_tramp_data_start[];
600
601 __set_fixmap(FIX_ENTRY_TRAMP_DATA,
602 __pa_symbol(__entry_tramp_data_start),
603 PAGE_KERNEL_RO);
604 }
605
51a0048b
WD
606 return 0;
607}
608core_initcall(map_entry_trampoline);
609#endif
610
068a17a5
MR
611/*
612 * Create fine-grained mappings for the kernel.
613 */
20a004e7 614static void __init map_kernel(pgd_t *pgdp)
068a17a5 615{
2ebe088b
AB
616 static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext,
617 vmlinux_initdata, vmlinux_data;
068a17a5 618
28b066da
AB
619 /*
620 * External debuggers may need to write directly to the text
621 * mapping to install SW breakpoints. Allow this (only) when
622 * explicitly requested with rodata=off.
623 */
624 pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
625
d27cfa1f
AB
626 /*
627 * Only rodata will be remapped with different permissions later on,
628 * all other segments are allowed to use contiguous mappings.
629 */
20a004e7 630 map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0,
92bbd16e 631 VM_NO_GUARD);
20a004e7 632 map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL,
92bbd16e 633 &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD);
20a004e7 634 map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot,
92bbd16e 635 &vmlinux_inittext, 0, VM_NO_GUARD);
20a004e7 636 map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL,
92bbd16e 637 &vmlinux_initdata, 0, VM_NO_GUARD);
20a004e7 638 map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0);
068a17a5 639
20a004e7 640 if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) {
f9040773
AB
641 /*
642 * The fixmap falls in a separate pgd to the kernel, and doesn't
643 * live in the carveout for the swapper_pg_dir. We can simply
644 * re-use the existing dir for the fixmap.
645 */
20a004e7
WD
646 set_pgd(pgd_offset_raw(pgdp, FIXADDR_START),
647 READ_ONCE(*pgd_offset_k(FIXADDR_START)));
f9040773
AB
648 } else if (CONFIG_PGTABLE_LEVELS > 3) {
649 /*
650 * The fixmap shares its top level pgd entry with the kernel
651 * mapping. This can really only occur when we are running
652 * with 16k/4 levels, so we can simply reuse the pud level
653 * entry instead.
654 */
655 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
20a004e7
WD
656 pud_populate(&init_mm,
657 pud_set_fixmap_offset(pgdp, FIXADDR_START),
19338304 658 lm_alias(bm_pmd));
f9040773
AB
659 pud_clear_fixmap();
660 } else {
661 BUG();
662 }
068a17a5 663
20a004e7 664 kasan_copy_shadow(pgdp);
068a17a5
MR
665}
666
c1cc1552
CM
667void __init paging_init(void)
668{
2330b7ca 669 pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir));
068a17a5 670
20a004e7
WD
671 map_kernel(pgdp);
672 map_mem(pgdp);
068a17a5 673
068a17a5 674 pgd_clear_fixmap();
068a17a5 675
2077be67 676 cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
2b5548b6 677 init_mm.pgd = swapper_pg_dir;
068a17a5 678
2b5548b6
JY
679 memblock_free(__pa_symbol(init_pg_dir),
680 __pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir));
24cc61d8
AB
681
682 memblock_allow_resize();
c1cc1552
CM
683}
684
c1cc1552
CM
685/*
686 * Check whether a kernel address is valid (derived from arch/x86/).
687 */
688int kern_addr_valid(unsigned long addr)
689{
20a004e7
WD
690 pgd_t *pgdp;
691 pud_t *pudp, pud;
692 pmd_t *pmdp, pmd;
693 pte_t *ptep, pte;
c1cc1552
CM
694
695 if ((((long)addr) >> VA_BITS) != -1UL)
696 return 0;
697
20a004e7
WD
698 pgdp = pgd_offset_k(addr);
699 if (pgd_none(READ_ONCE(*pgdp)))
c1cc1552
CM
700 return 0;
701
20a004e7
WD
702 pudp = pud_offset(pgdp, addr);
703 pud = READ_ONCE(*pudp);
704 if (pud_none(pud))
c1cc1552
CM
705 return 0;
706
20a004e7
WD
707 if (pud_sect(pud))
708 return pfn_valid(pud_pfn(pud));
206a2a73 709
20a004e7
WD
710 pmdp = pmd_offset(pudp, addr);
711 pmd = READ_ONCE(*pmdp);
712 if (pmd_none(pmd))
c1cc1552
CM
713 return 0;
714
20a004e7
WD
715 if (pmd_sect(pmd))
716 return pfn_valid(pmd_pfn(pmd));
da6e4cb6 717
20a004e7
WD
718 ptep = pte_offset_kernel(pmdp, addr);
719 pte = READ_ONCE(*ptep);
720 if (pte_none(pte))
c1cc1552
CM
721 return 0;
722
20a004e7 723 return pfn_valid(pte_pfn(pte));
c1cc1552
CM
724}
725#ifdef CONFIG_SPARSEMEM_VMEMMAP
b433dce0 726#if !ARM64_SWAPPER_USES_SECTION_MAPS
7b73d978
CH
727int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
728 struct vmem_altmap *altmap)
c1cc1552 729{
0aad818b 730 return vmemmap_populate_basepages(start, end, node);
c1cc1552 731}
b433dce0 732#else /* !ARM64_SWAPPER_USES_SECTION_MAPS */
7b73d978
CH
733int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
734 struct vmem_altmap *altmap)
c1cc1552 735{
0aad818b 736 unsigned long addr = start;
c1cc1552 737 unsigned long next;
20a004e7
WD
738 pgd_t *pgdp;
739 pud_t *pudp;
740 pmd_t *pmdp;
c1cc1552
CM
741
742 do {
743 next = pmd_addr_end(addr, end);
744
20a004e7
WD
745 pgdp = vmemmap_pgd_populate(addr, node);
746 if (!pgdp)
c1cc1552
CM
747 return -ENOMEM;
748
20a004e7
WD
749 pudp = vmemmap_pud_populate(pgdp, addr, node);
750 if (!pudp)
c1cc1552
CM
751 return -ENOMEM;
752
20a004e7
WD
753 pmdp = pmd_offset(pudp, addr);
754 if (pmd_none(READ_ONCE(*pmdp))) {
c1cc1552
CM
755 void *p = NULL;
756
757 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
758 if (!p)
759 return -ENOMEM;
760
20a004e7 761 pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL));
c1cc1552 762 } else
20a004e7 763 vmemmap_verify((pte_t *)pmdp, node, addr, next);
c1cc1552
CM
764 } while (addr = next, addr != end);
765
766 return 0;
767}
8e01076a 768#endif /* !ARM64_SWAPPER_USES_SECTION_MAPS */
24b6d416
CH
769void vmemmap_free(unsigned long start, unsigned long end,
770 struct vmem_altmap *altmap)
0197518c
TC
771{
772}
c1cc1552 773#endif /* CONFIG_SPARSEMEM_VMEMMAP */
af86e597 774
af86e597
LA
775static inline pud_t * fixmap_pud(unsigned long addr)
776{
20a004e7
WD
777 pgd_t *pgdp = pgd_offset_k(addr);
778 pgd_t pgd = READ_ONCE(*pgdp);
af86e597 779
20a004e7 780 BUG_ON(pgd_none(pgd) || pgd_bad(pgd));
af86e597 781
20a004e7 782 return pud_offset_kimg(pgdp, addr);
af86e597
LA
783}
784
785static inline pmd_t * fixmap_pmd(unsigned long addr)
786{
20a004e7
WD
787 pud_t *pudp = fixmap_pud(addr);
788 pud_t pud = READ_ONCE(*pudp);
af86e597 789
20a004e7 790 BUG_ON(pud_none(pud) || pud_bad(pud));
af86e597 791
20a004e7 792 return pmd_offset_kimg(pudp, addr);
af86e597
LA
793}
794
795static inline pte_t * fixmap_pte(unsigned long addr)
796{
157962f5 797 return &bm_pte[pte_index(addr)];
af86e597
LA
798}
799
2077be67
LA
800/*
801 * The p*d_populate functions call virt_to_phys implicitly so they can't be used
802 * directly on kernel symbols (bm_p*d). This function is called too early to use
803 * lm_alias so __p*d_populate functions must be used to populate with the
804 * physical address from __pa_symbol.
805 */
af86e597
LA
806void __init early_fixmap_init(void)
807{
20a004e7
WD
808 pgd_t *pgdp, pgd;
809 pud_t *pudp;
810 pmd_t *pmdp;
af86e597
LA
811 unsigned long addr = FIXADDR_START;
812
20a004e7
WD
813 pgdp = pgd_offset_k(addr);
814 pgd = READ_ONCE(*pgdp);
f80fb3a3 815 if (CONFIG_PGTABLE_LEVELS > 3 &&
20a004e7 816 !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) {
f9040773
AB
817 /*
818 * We only end up here if the kernel mapping and the fixmap
819 * share the top level pgd entry, which should only happen on
820 * 16k/4 levels configurations.
821 */
822 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
20a004e7 823 pudp = pud_offset_kimg(pgdp, addr);
f9040773 824 } else {
20a004e7
WD
825 if (pgd_none(pgd))
826 __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE);
827 pudp = fixmap_pud(addr);
f9040773 828 }
20a004e7
WD
829 if (pud_none(READ_ONCE(*pudp)))
830 __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
831 pmdp = fixmap_pmd(addr);
832 __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
af86e597
LA
833
834 /*
835 * The boot-ioremap range spans multiple pmds, for which
157962f5 836 * we are not prepared:
af86e597
LA
837 */
838 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
839 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
840
20a004e7
WD
841 if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
842 || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
af86e597 843 WARN_ON(1);
20a004e7
WD
844 pr_warn("pmdp %p != %p, %p\n",
845 pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
af86e597
LA
846 fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
847 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
848 fix_to_virt(FIX_BTMAP_BEGIN));
849 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
850 fix_to_virt(FIX_BTMAP_END));
851
852 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
853 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
854 }
855}
856
18b4b276
JM
857/*
858 * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we
859 * ever need to use IPIs for TLB broadcasting, then we're in trouble here.
860 */
af86e597
LA
861void __set_fixmap(enum fixed_addresses idx,
862 phys_addr_t phys, pgprot_t flags)
863{
864 unsigned long addr = __fix_to_virt(idx);
20a004e7 865 pte_t *ptep;
af86e597 866
b63dbef9 867 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
af86e597 868
20a004e7 869 ptep = fixmap_pte(addr);
af86e597
LA
870
871 if (pgprot_val(flags)) {
20a004e7 872 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags));
af86e597 873 } else {
20a004e7 874 pte_clear(&init_mm, addr, ptep);
af86e597
LA
875 flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
876 }
877}
61bd93ce 878
f80fb3a3 879void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
61bd93ce
AB
880{
881 const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
f80fb3a3 882 int offset;
61bd93ce
AB
883 void *dt_virt;
884
885 /*
886 * Check whether the physical FDT address is set and meets the minimum
887 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
04a84810
AB
888 * at least 8 bytes so that we can always access the magic and size
889 * fields of the FDT header after mapping the first chunk, double check
890 * here if that is indeed the case.
61bd93ce
AB
891 */
892 BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
893 if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
894 return NULL;
895
896 /*
897 * Make sure that the FDT region can be mapped without the need to
898 * allocate additional translation table pages, so that it is safe
132233a7 899 * to call create_mapping_noalloc() this early.
61bd93ce
AB
900 *
901 * On 64k pages, the FDT will be mapped using PTEs, so we need to
902 * be in the same PMD as the rest of the fixmap.
903 * On 4k pages, we'll use section mappings for the FDT so we only
904 * have to be in the same PUD.
905 */
906 BUILD_BUG_ON(dt_virt_base % SZ_2M);
907
b433dce0
SP
908 BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
909 __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
61bd93ce 910
b433dce0 911 offset = dt_phys % SWAPPER_BLOCK_SIZE;
61bd93ce
AB
912 dt_virt = (void *)dt_virt_base + offset;
913
914 /* map the first chunk so we can read the size from the header */
132233a7
LA
915 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
916 dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
61bd93ce 917
04a84810 918 if (fdt_magic(dt_virt) != FDT_MAGIC)
61bd93ce
AB
919 return NULL;
920
f80fb3a3
AB
921 *size = fdt_totalsize(dt_virt);
922 if (*size > MAX_FDT_SIZE)
61bd93ce
AB
923 return NULL;
924
f80fb3a3 925 if (offset + *size > SWAPPER_BLOCK_SIZE)
132233a7 926 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
f80fb3a3 927 round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
61bd93ce 928
f80fb3a3
AB
929 return dt_virt;
930}
61bd93ce 931
f80fb3a3
AB
932void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
933{
934 void *dt_virt;
935 int size;
936
937 dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
938 if (!dt_virt)
939 return NULL;
940
941 memblock_reserve(dt_phys, size);
61bd93ce
AB
942 return dt_virt;
943}
324420bf
AB
944
945int __init arch_ioremap_pud_supported(void)
946{
7ba36ecc
MR
947 /*
948 * Only 4k granule supports level 1 block mappings.
949 * SW table walks can't handle removal of intermediate entries.
950 */
951 return IS_ENABLED(CONFIG_ARM64_4K_PAGES) &&
952 !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS);
324420bf
AB
953}
954
955int __init arch_ioremap_pmd_supported(void)
956{
7ba36ecc
MR
957 /* See arch_ioremap_pud_supported() */
958 return !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS);
324420bf
AB
959}
960
20a004e7 961int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot)
324420bf 962{
f7f0097a 963 pud_t new_pud = pfn_pud(__phys_to_pfn(phys), mk_pud_sect_prot(prot));
15122ee2 964
82034c23
LA
965 /* Only allow permission changes for now */
966 if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)),
967 pud_val(new_pud)))
15122ee2
WD
968 return 0;
969
87dedf7c 970 VM_BUG_ON(phys & ~PUD_MASK);
82034c23 971 set_pud(pudp, new_pud);
324420bf
AB
972 return 1;
973}
974
20a004e7 975int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot)
324420bf 976{
f7f0097a 977 pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), mk_pmd_sect_prot(prot));
15122ee2 978
82034c23
LA
979 /* Only allow permission changes for now */
980 if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)),
981 pmd_val(new_pmd)))
15122ee2
WD
982 return 0;
983
87dedf7c 984 VM_BUG_ON(phys & ~PMD_MASK);
82034c23 985 set_pmd(pmdp, new_pmd);
324420bf
AB
986 return 1;
987}
988
20a004e7 989int pud_clear_huge(pud_t *pudp)
324420bf 990{
20a004e7 991 if (!pud_sect(READ_ONCE(*pudp)))
324420bf 992 return 0;
20a004e7 993 pud_clear(pudp);
324420bf
AB
994 return 1;
995}
996
20a004e7 997int pmd_clear_huge(pmd_t *pmdp)
324420bf 998{
20a004e7 999 if (!pmd_sect(READ_ONCE(*pmdp)))
324420bf 1000 return 0;
20a004e7 1001 pmd_clear(pmdp);
324420bf
AB
1002 return 1;
1003}
b6bdb751 1004
ec28bb9c 1005int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)
b6bdb751 1006{
ec28bb9c
CP
1007 pte_t *table;
1008 pmd_t pmd;
1009
1010 pmd = READ_ONCE(*pmdp);
1011
fac880c7 1012 if (!pmd_table(pmd)) {
9c006972 1013 VM_WARN_ON(1);
ec28bb9c
CP
1014 return 1;
1015 }
1016
1017 table = pte_offset_kernel(pmdp, addr);
1018 pmd_clear(pmdp);
1019 __flush_tlb_kernel_pgtable(addr);
1020 pte_free_kernel(NULL, table);
1021 return 1;
b6bdb751
TK
1022}
1023
ec28bb9c 1024int pud_free_pmd_page(pud_t *pudp, unsigned long addr)
b6bdb751 1025{
ec28bb9c
CP
1026 pmd_t *table;
1027 pmd_t *pmdp;
1028 pud_t pud;
1029 unsigned long next, end;
1030
1031 pud = READ_ONCE(*pudp);
1032
fac880c7 1033 if (!pud_table(pud)) {
9c006972 1034 VM_WARN_ON(1);
ec28bb9c
CP
1035 return 1;
1036 }
1037
1038 table = pmd_offset(pudp, addr);
1039 pmdp = table;
1040 next = addr;
1041 end = addr + PUD_SIZE;
1042 do {
1043 pmd_free_pte_page(pmdp, next);
1044 } while (pmdp++, next += PMD_SIZE, next != end);
1045
1046 pud_clear(pudp);
1047 __flush_tlb_kernel_pgtable(addr);
1048 pmd_free(NULL, table);
1049 return 1;
b6bdb751 1050}
4ab21506 1051
8e2d4340
WD
1052int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1053{
1054 return 0; /* Don't attempt a block mapping */
1055}
1056
4ab21506 1057#ifdef CONFIG_MEMORY_HOTPLUG
940519f0
MH
1058int arch_add_memory(int nid, u64 start, u64 size,
1059 struct mhp_restrictions *restrictions)
4ab21506
RM
1060{
1061 int flags = 0;
1062
1063 if (rodata_full || debug_pagealloc_enabled())
1064 flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
1065
1066 __create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start),
475ba3fc 1067 size, PAGE_KERNEL, __pgd_pgtable_alloc, flags);
4ab21506
RM
1068
1069 return __add_pages(nid, start >> PAGE_SHIFT, size >> PAGE_SHIFT,
940519f0 1070 restrictions);
4ab21506
RM
1071}
1072#endif