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CommitLineData
c1cc1552
CM
1/*
2 * Based on arch/arm/mm/mmu.c
3 *
4 * Copyright (C) 1995-2005 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
5a9e3e15 20#include <linux/cache.h>
c1cc1552
CM
21#include <linux/export.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/init.h>
61bd93ce 25#include <linux/libfdt.h>
c1cc1552
CM
26#include <linux/mman.h>
27#include <linux/nodemask.h>
28#include <linux/memblock.h>
29#include <linux/fs.h>
2475ff9d 30#include <linux/io.h>
2077be67 31#include <linux/mm.h>
c1cc1552 32
21ab99c2 33#include <asm/barrier.h>
c1cc1552 34#include <asm/cputype.h>
af86e597 35#include <asm/fixmap.h>
068a17a5 36#include <asm/kasan.h>
b433dce0 37#include <asm/kernel-pgtable.h>
c1cc1552
CM
38#include <asm/sections.h>
39#include <asm/setup.h>
40#include <asm/sizes.h>
41#include <asm/tlb.h>
c79b954b 42#include <asm/memblock.h>
c1cc1552 43#include <asm/mmu_context.h>
1404d6f1 44#include <asm/ptdump.h>
c1cc1552 45
dd006da2
AB
46u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
47
5a9e3e15 48u64 kimage_voffset __ro_after_init;
a7f8de16
AB
49EXPORT_SYMBOL(kimage_voffset);
50
c1cc1552
CM
51/*
52 * Empty_zero_page is a special page that is used for zero-initialized data
53 * and COW.
54 */
5227cfa7 55unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
c1cc1552
CM
56EXPORT_SYMBOL(empty_zero_page);
57
f9040773
AB
58static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
59static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
60static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
61
c1cc1552
CM
62pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
63 unsigned long size, pgprot_t vma_prot)
64{
65 if (!pfn_valid(pfn))
66 return pgprot_noncached(vma_prot);
67 else if (file->f_flags & O_SYNC)
68 return pgprot_writecombine(vma_prot);
69 return vma_prot;
70}
71EXPORT_SYMBOL(phys_mem_access_prot);
72
f4710445 73static phys_addr_t __init early_pgtable_alloc(void)
c1cc1552 74{
7142392d
SP
75 phys_addr_t phys;
76 void *ptr;
77
21ab99c2 78 phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
f4710445
MR
79
80 /*
81 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
82 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
83 * any level of table.
84 */
85 ptr = pte_set_fixmap(phys);
86
21ab99c2
MR
87 memset(ptr, 0, PAGE_SIZE);
88
f4710445
MR
89 /*
90 * Implicit barriers also ensure the zeroed page is visible to the page
91 * table walker
92 */
93 pte_clear_fixmap();
94
95 return phys;
c1cc1552
CM
96}
97
e98216b5
AB
98static bool pgattr_change_is_safe(u64 old, u64 new)
99{
100 /*
101 * The following mapping attributes may be updated in live
102 * kernel mappings without the need for break-before-make.
103 */
104 static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE;
105
106 return old == 0 || new == 0 || ((old ^ new) & ~mask) == 0;
107}
108
da141706 109static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
667c2759 110 unsigned long end, unsigned long pfn,
da141706 111 pgprot_t prot,
0bfc445d
AB
112 phys_addr_t (*pgtable_alloc)(void),
113 bool page_mappings_only)
c1cc1552 114{
0bfc445d 115 pgprot_t __prot = prot;
c1cc1552
CM
116 pte_t *pte;
117
4133af6c
CM
118 BUG_ON(pmd_sect(*pmd));
119 if (pmd_none(*pmd)) {
132233a7
LA
120 phys_addr_t pte_phys;
121 BUG_ON(!pgtable_alloc);
122 pte_phys = pgtable_alloc();
f4710445 123 pte = pte_set_fixmap(pte_phys);
f4710445 124 __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE);
f4710445 125 pte_clear_fixmap();
c1cc1552 126 }
a1c76574 127 BUG_ON(pmd_bad(*pmd));
c1cc1552 128
f4710445 129 pte = pte_set_fixmap_offset(pmd, addr);
c1cc1552 130 do {
e98216b5
AB
131 pte_t old_pte = *pte;
132
0bfc445d
AB
133 /*
134 * Set the contiguous bit for the subsequent group of PTEs if
135 * its size and alignment are appropriate.
136 */
137 if (((addr | PFN_PHYS(pfn)) & ~CONT_PTE_MASK) == 0) {
138 if (end - addr >= CONT_PTE_SIZE && !page_mappings_only)
139 __prot = __pgprot(pgprot_val(prot) | PTE_CONT);
140 else
141 __prot = prot;
142 }
143
144 set_pte(pte, pfn_pte(pfn, __prot));
667c2759 145 pfn++;
e98216b5
AB
146
147 /*
148 * After the PTE entry has been populated once, we
149 * only allow updates to the permission attributes.
150 */
151 BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte)));
152
667c2759 153 } while (pte++, addr += PAGE_SIZE, addr != end);
f4710445
MR
154
155 pte_clear_fixmap();
c1cc1552
CM
156}
157
11509a30 158static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
da141706 159 phys_addr_t phys, pgprot_t prot,
53e1b329 160 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 161 bool page_mappings_only)
c1cc1552 162{
0bfc445d 163 pgprot_t __prot = prot;
c1cc1552
CM
164 pmd_t *pmd;
165 unsigned long next;
166
167 /*
168 * Check for initial section mappings in the pgd/pud and remove them.
169 */
4133af6c
CM
170 BUG_ON(pud_sect(*pud));
171 if (pud_none(*pud)) {
132233a7
LA
172 phys_addr_t pmd_phys;
173 BUG_ON(!pgtable_alloc);
174 pmd_phys = pgtable_alloc();
f4710445 175 pmd = pmd_set_fixmap(pmd_phys);
f4710445 176 __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE);
f4710445 177 pmd_clear_fixmap();
c1cc1552 178 }
a1c76574 179 BUG_ON(pud_bad(*pud));
c1cc1552 180
f4710445 181 pmd = pmd_set_fixmap_offset(pud, addr);
c1cc1552 182 do {
e98216b5
AB
183 pmd_t old_pmd = *pmd;
184
c1cc1552 185 next = pmd_addr_end(addr, end);
e98216b5 186
c1cc1552 187 /* try section mapping first */
83863f25 188 if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
f14c66ce 189 !page_mappings_only) {
0bfc445d
AB
190 /*
191 * Set the contiguous bit for the subsequent group of
192 * PMDs if its size and alignment are appropriate.
193 */
194 if (((addr | phys) & ~CONT_PMD_MASK) == 0) {
195 if (end - addr >= CONT_PMD_SIZE)
196 __prot = __pgprot(pgprot_val(prot) |
197 PTE_CONT);
198 else
199 __prot = prot;
200 }
201 pmd_set_huge(pmd, phys, __prot);
e98216b5 202
a55f9929 203 /*
e98216b5
AB
204 * After the PMD entry has been populated once, we
205 * only allow updates to the permission attributes.
a55f9929 206 */
e98216b5
AB
207 BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
208 pmd_val(*pmd)));
a55f9929 209 } else {
667c2759 210 alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys),
0bfc445d
AB
211 prot, pgtable_alloc,
212 page_mappings_only);
e98216b5
AB
213
214 BUG_ON(pmd_val(old_pmd) != 0 &&
215 pmd_val(old_pmd) != pmd_val(*pmd));
a55f9929 216 }
c1cc1552
CM
217 phys += next - addr;
218 } while (pmd++, addr = next, addr != end);
f4710445
MR
219
220 pmd_clear_fixmap();
c1cc1552
CM
221}
222
da141706
LA
223static inline bool use_1G_block(unsigned long addr, unsigned long next,
224 unsigned long phys)
225{
226 if (PAGE_SHIFT != 12)
227 return false;
228
229 if (((addr | next | phys) & ~PUD_MASK) != 0)
230 return false;
231
232 return true;
233}
234
11509a30 235static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
da141706 236 phys_addr_t phys, pgprot_t prot,
53e1b329 237 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 238 bool page_mappings_only)
c1cc1552 239{
c79b954b 240 pud_t *pud;
c1cc1552
CM
241 unsigned long next;
242
c79b954b 243 if (pgd_none(*pgd)) {
132233a7
LA
244 phys_addr_t pud_phys;
245 BUG_ON(!pgtable_alloc);
246 pud_phys = pgtable_alloc();
f4710445 247 __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE);
c79b954b
JL
248 }
249 BUG_ON(pgd_bad(*pgd));
250
f4710445 251 pud = pud_set_fixmap_offset(pgd, addr);
c1cc1552 252 do {
e98216b5
AB
253 pud_t old_pud = *pud;
254
c1cc1552 255 next = pud_addr_end(addr, end);
206a2a73
SC
256
257 /*
258 * For 4K granule only, attempt to put down a 1GB block
259 */
f14c66ce 260 if (use_1G_block(addr, next, phys) && !page_mappings_only) {
c661cb1c 261 pud_set_huge(pud, phys, prot);
206a2a73
SC
262
263 /*
e98216b5
AB
264 * After the PUD entry has been populated once, we
265 * only allow updates to the permission attributes.
206a2a73 266 */
e98216b5
AB
267 BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
268 pud_val(*pud)));
206a2a73 269 } else {
11509a30 270 alloc_init_pmd(pud, addr, next, phys, prot,
f14c66ce 271 pgtable_alloc, page_mappings_only);
e98216b5
AB
272
273 BUG_ON(pud_val(old_pud) != 0 &&
274 pud_val(old_pud) != pud_val(*pud));
206a2a73 275 }
c1cc1552
CM
276 phys += next - addr;
277 } while (pud++, addr = next, addr != end);
f4710445
MR
278
279 pud_clear_fixmap();
c1cc1552
CM
280}
281
40f87d31
AB
282static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
283 unsigned long virt, phys_addr_t size,
284 pgprot_t prot,
285 phys_addr_t (*pgtable_alloc)(void),
f14c66ce 286 bool page_mappings_only)
c1cc1552
CM
287{
288 unsigned long addr, length, end, next;
40f87d31 289 pgd_t *pgd = pgd_offset_raw(pgdir, virt);
c1cc1552 290
cc5d2b3b
MR
291 /*
292 * If the virtual and physical address don't have the same offset
293 * within a page, we cannot map the region as the caller expects.
294 */
295 if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
296 return;
297
9c4e08a3 298 phys &= PAGE_MASK;
c1cc1552
CM
299 addr = virt & PAGE_MASK;
300 length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
301
c1cc1552
CM
302 end = addr + length;
303 do {
304 next = pgd_addr_end(addr, end);
53e1b329 305 alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc,
f14c66ce 306 page_mappings_only);
c1cc1552
CM
307 phys += next - addr;
308 } while (pgd++, addr = next, addr != end);
309}
310
1378dc3d 311static phys_addr_t pgd_pgtable_alloc(void)
da141706 312{
21ab99c2 313 void *ptr = (void *)__get_free_page(PGALLOC_GFP);
1378dc3d
AB
314 if (!ptr || !pgtable_page_ctor(virt_to_page(ptr)))
315 BUG();
21ab99c2
MR
316
317 /* Ensure the zeroed page is visible to the page table walker */
318 dsb(ishst);
f4710445 319 return __pa(ptr);
da141706
LA
320}
321
132233a7
LA
322/*
323 * This function can only be used to modify existing table entries,
324 * without allocating new levels of table. Note that this permits the
325 * creation of new section or page entries.
326 */
327static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
da141706 328 phys_addr_t size, pgprot_t prot)
d7ecbddf
MS
329{
330 if (virt < VMALLOC_START) {
331 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
332 &phys, virt);
333 return;
334 }
f14c66ce 335 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false);
d7ecbddf
MS
336}
337
8ce837ce
AB
338void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
339 unsigned long virt, phys_addr_t size,
f14c66ce 340 pgprot_t prot, bool page_mappings_only)
8ce837ce 341{
1378dc3d
AB
342 BUG_ON(mm == &init_mm);
343
11509a30 344 __create_pgd_mapping(mm->pgd, phys, virt, size, prot,
f14c66ce 345 pgd_pgtable_alloc, page_mappings_only);
d7ecbddf
MS
346}
347
da141706
LA
348static void create_mapping_late(phys_addr_t phys, unsigned long virt,
349 phys_addr_t size, pgprot_t prot)
350{
351 if (virt < VMALLOC_START) {
352 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
353 &phys, virt);
354 return;
355 }
356
11509a30 357 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot,
f14c66ce 358 NULL, debug_pagealloc_enabled());
da141706
LA
359}
360
068a17a5 361static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end)
da141706 362{
2077be67
LA
363 unsigned long kernel_start = __pa_symbol(_text);
364 unsigned long kernel_end = __pa_symbol(__init_begin);
068a17a5 365
da141706 366 /*
f9040773
AB
367 * Take care not to create a writable alias for the
368 * read-only text and rodata sections of the kernel image.
da141706 369 */
068a17a5 370
9fdc14c5 371 /* No overlap with the kernel text/rodata */
068a17a5
MR
372 if (end < kernel_start || start >= kernel_end) {
373 __create_pgd_mapping(pgd, start, __phys_to_virt(start),
374 end - start, PAGE_KERNEL,
53e1b329 375 early_pgtable_alloc,
f14c66ce 376 debug_pagealloc_enabled());
068a17a5 377 return;
da141706
LA
378 }
379
068a17a5 380 /*
9fdc14c5 381 * This block overlaps the kernel text/rodata mappings.
f9040773 382 * Map the portion(s) which don't overlap.
068a17a5
MR
383 */
384 if (start < kernel_start)
385 __create_pgd_mapping(pgd, start,
386 __phys_to_virt(start),
387 kernel_start - start, PAGE_KERNEL,
53e1b329 388 early_pgtable_alloc,
f14c66ce 389 debug_pagealloc_enabled());
068a17a5
MR
390 if (kernel_end < end)
391 __create_pgd_mapping(pgd, kernel_end,
392 __phys_to_virt(kernel_end),
393 end - kernel_end, PAGE_KERNEL,
53e1b329 394 early_pgtable_alloc,
f14c66ce 395 debug_pagealloc_enabled());
f9040773
AB
396
397 /*
9fdc14c5 398 * Map the linear alias of the [_text, __init_begin) interval as
f9040773
AB
399 * read-only/non-executable. This makes the contents of the
400 * region accessible to subsystems such as hibernate, but
401 * protects it from inadvertent modification or execution.
402 */
403 __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start),
404 kernel_end - kernel_start, PAGE_KERNEL_RO,
f14c66ce 405 early_pgtable_alloc, debug_pagealloc_enabled());
da141706 406}
da141706 407
068a17a5 408static void __init map_mem(pgd_t *pgd)
c1cc1552
CM
409{
410 struct memblock_region *reg;
f6bc87c3 411
c1cc1552
CM
412 /* map all the memory banks */
413 for_each_memblock(memory, reg) {
414 phys_addr_t start = reg->base;
415 phys_addr_t end = start + reg->size;
416
417 if (start >= end)
418 break;
68709f45
AB
419 if (memblock_is_nomap(reg))
420 continue;
c1cc1552 421
068a17a5 422 __map_memblock(pgd, start, end);
c1cc1552
CM
423 }
424}
425
da141706
LA
426void mark_rodata_ro(void)
427{
2f39b5f9 428 unsigned long section_size;
f9040773 429
9fdc14c5 430 section_size = (unsigned long)_etext - (unsigned long)_text;
2077be67 431 create_mapping_late(__pa_symbol(_text), (unsigned long)_text,
2f39b5f9
JL
432 section_size, PAGE_KERNEL_ROX);
433 /*
9fdc14c5
AB
434 * mark .rodata as read only. Use __init_begin rather than __end_rodata
435 * to cover NOTES and EXCEPTION_TABLE.
2f39b5f9 436 */
9fdc14c5 437 section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
2077be67 438 create_mapping_late(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,
2f39b5f9 439 section_size, PAGE_KERNEL_RO);
e98216b5
AB
440
441 /* flush the TLBs after updating live kernel mappings */
442 flush_tlb_all();
1404d6f1
LA
443
444 debug_checkwx();
da141706 445}
da141706 446
2c09ec06
AB
447static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end,
448 pgprot_t prot, struct vm_struct *vma)
068a17a5 449{
2077be67 450 phys_addr_t pa_start = __pa_symbol(va_start);
068a17a5
MR
451 unsigned long size = va_end - va_start;
452
453 BUG_ON(!PAGE_ALIGNED(pa_start));
454 BUG_ON(!PAGE_ALIGNED(size));
455
456 __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot,
f14c66ce 457 early_pgtable_alloc, debug_pagealloc_enabled());
f9040773
AB
458
459 vma->addr = va_start;
460 vma->phys_addr = pa_start;
461 vma->size = size;
462 vma->flags = VM_MAP;
463 vma->caller = __builtin_return_address(0);
464
465 vm_area_add_early(vma);
068a17a5
MR
466}
467
468/*
469 * Create fine-grained mappings for the kernel.
470 */
471static void __init map_kernel(pgd_t *pgd)
472{
2f39b5f9 473 static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_init, vmlinux_data;
068a17a5 474
9fdc14c5
AB
475 map_kernel_segment(pgd, _text, _etext, PAGE_KERNEL_EXEC, &vmlinux_text);
476 map_kernel_segment(pgd, __start_rodata, __init_begin, PAGE_KERNEL, &vmlinux_rodata);
2c09ec06
AB
477 map_kernel_segment(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC,
478 &vmlinux_init);
479 map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data);
068a17a5 480
f9040773
AB
481 if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) {
482 /*
483 * The fixmap falls in a separate pgd to the kernel, and doesn't
484 * live in the carveout for the swapper_pg_dir. We can simply
485 * re-use the existing dir for the fixmap.
486 */
487 set_pgd(pgd_offset_raw(pgd, FIXADDR_START),
488 *pgd_offset_k(FIXADDR_START));
489 } else if (CONFIG_PGTABLE_LEVELS > 3) {
490 /*
491 * The fixmap shares its top level pgd entry with the kernel
492 * mapping. This can really only occur when we are running
493 * with 16k/4 levels, so we can simply reuse the pud level
494 * entry instead.
495 */
496 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
497 set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START),
2077be67 498 __pud(__pa_symbol(bm_pmd) | PUD_TYPE_TABLE));
f9040773
AB
499 pud_clear_fixmap();
500 } else {
501 BUG();
502 }
068a17a5
MR
503
504 kasan_copy_shadow(pgd);
505}
506
c1cc1552
CM
507/*
508 * paging_init() sets up the page tables, initialises the zone memory
509 * maps and sets up the zero page.
510 */
511void __init paging_init(void)
512{
068a17a5
MR
513 phys_addr_t pgd_phys = early_pgtable_alloc();
514 pgd_t *pgd = pgd_set_fixmap(pgd_phys);
515
516 map_kernel(pgd);
517 map_mem(pgd);
518
519 /*
520 * We want to reuse the original swapper_pg_dir so we don't have to
521 * communicate the new address to non-coherent secondaries in
522 * secondary_entry, and so cpu_switch_mm can generate the address with
523 * adrp+add rather than a load from some global variable.
524 *
525 * To do this we need to go via a temporary pgd.
526 */
527 cpu_replace_ttbr1(__va(pgd_phys));
528 memcpy(swapper_pg_dir, pgd, PAGE_SIZE);
2077be67 529 cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
068a17a5
MR
530
531 pgd_clear_fixmap();
532 memblock_free(pgd_phys, PAGE_SIZE);
533
534 /*
535 * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd
536 * allocated with it.
537 */
2077be67 538 memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE,
068a17a5 539 SWAPPER_DIR_SIZE - PAGE_SIZE);
c1cc1552
CM
540}
541
c1cc1552
CM
542/*
543 * Check whether a kernel address is valid (derived from arch/x86/).
544 */
545int kern_addr_valid(unsigned long addr)
546{
547 pgd_t *pgd;
548 pud_t *pud;
549 pmd_t *pmd;
550 pte_t *pte;
551
552 if ((((long)addr) >> VA_BITS) != -1UL)
553 return 0;
554
555 pgd = pgd_offset_k(addr);
556 if (pgd_none(*pgd))
557 return 0;
558
559 pud = pud_offset(pgd, addr);
560 if (pud_none(*pud))
561 return 0;
562
206a2a73
SC
563 if (pud_sect(*pud))
564 return pfn_valid(pud_pfn(*pud));
565
c1cc1552
CM
566 pmd = pmd_offset(pud, addr);
567 if (pmd_none(*pmd))
568 return 0;
569
da6e4cb6
DA
570 if (pmd_sect(*pmd))
571 return pfn_valid(pmd_pfn(*pmd));
572
c1cc1552
CM
573 pte = pte_offset_kernel(pmd, addr);
574 if (pte_none(*pte))
575 return 0;
576
577 return pfn_valid(pte_pfn(*pte));
578}
579#ifdef CONFIG_SPARSEMEM_VMEMMAP
b433dce0 580#if !ARM64_SWAPPER_USES_SECTION_MAPS
0aad818b 581int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
c1cc1552 582{
0aad818b 583 return vmemmap_populate_basepages(start, end, node);
c1cc1552 584}
b433dce0 585#else /* !ARM64_SWAPPER_USES_SECTION_MAPS */
0aad818b 586int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
c1cc1552 587{
0aad818b 588 unsigned long addr = start;
c1cc1552
CM
589 unsigned long next;
590 pgd_t *pgd;
591 pud_t *pud;
592 pmd_t *pmd;
593
594 do {
595 next = pmd_addr_end(addr, end);
596
597 pgd = vmemmap_pgd_populate(addr, node);
598 if (!pgd)
599 return -ENOMEM;
600
601 pud = vmemmap_pud_populate(pgd, addr, node);
602 if (!pud)
603 return -ENOMEM;
604
605 pmd = pmd_offset(pud, addr);
606 if (pmd_none(*pmd)) {
607 void *p = NULL;
608
609 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
610 if (!p)
611 return -ENOMEM;
612
a501e324 613 set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL));
c1cc1552
CM
614 } else
615 vmemmap_verify((pte_t *)pmd, node, addr, next);
616 } while (addr = next, addr != end);
617
618 return 0;
619}
620#endif /* CONFIG_ARM64_64K_PAGES */
0aad818b 621void vmemmap_free(unsigned long start, unsigned long end)
0197518c
TC
622{
623}
c1cc1552 624#endif /* CONFIG_SPARSEMEM_VMEMMAP */
af86e597 625
af86e597
LA
626static inline pud_t * fixmap_pud(unsigned long addr)
627{
628 pgd_t *pgd = pgd_offset_k(addr);
629
630 BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd));
631
157962f5 632 return pud_offset_kimg(pgd, addr);
af86e597
LA
633}
634
635static inline pmd_t * fixmap_pmd(unsigned long addr)
636{
637 pud_t *pud = fixmap_pud(addr);
638
639 BUG_ON(pud_none(*pud) || pud_bad(*pud));
640
157962f5 641 return pmd_offset_kimg(pud, addr);
af86e597
LA
642}
643
644static inline pte_t * fixmap_pte(unsigned long addr)
645{
157962f5 646 return &bm_pte[pte_index(addr)];
af86e597
LA
647}
648
2077be67
LA
649/*
650 * The p*d_populate functions call virt_to_phys implicitly so they can't be used
651 * directly on kernel symbols (bm_p*d). This function is called too early to use
652 * lm_alias so __p*d_populate functions must be used to populate with the
653 * physical address from __pa_symbol.
654 */
af86e597
LA
655void __init early_fixmap_init(void)
656{
657 pgd_t *pgd;
658 pud_t *pud;
659 pmd_t *pmd;
660 unsigned long addr = FIXADDR_START;
661
662 pgd = pgd_offset_k(addr);
f80fb3a3 663 if (CONFIG_PGTABLE_LEVELS > 3 &&
2077be67 664 !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa_symbol(bm_pud))) {
f9040773
AB
665 /*
666 * We only end up here if the kernel mapping and the fixmap
667 * share the top level pgd entry, which should only happen on
668 * 16k/4 levels configurations.
669 */
670 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
671 pud = pud_offset_kimg(pgd, addr);
672 } else {
2077be67
LA
673 if (pgd_none(*pgd))
674 __pgd_populate(pgd, __pa_symbol(bm_pud), PUD_TYPE_TABLE);
f9040773
AB
675 pud = fixmap_pud(addr);
676 }
2077be67
LA
677 if (pud_none(*pud))
678 __pud_populate(pud, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
157962f5 679 pmd = fixmap_pmd(addr);
2077be67 680 __pmd_populate(pmd, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
af86e597
LA
681
682 /*
683 * The boot-ioremap range spans multiple pmds, for which
157962f5 684 * we are not prepared:
af86e597
LA
685 */
686 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
687 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
688
689 if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
690 || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
691 WARN_ON(1);
692 pr_warn("pmd %p != %p, %p\n",
693 pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
694 fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
695 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
696 fix_to_virt(FIX_BTMAP_BEGIN));
697 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
698 fix_to_virt(FIX_BTMAP_END));
699
700 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
701 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
702 }
703}
704
705void __set_fixmap(enum fixed_addresses idx,
706 phys_addr_t phys, pgprot_t flags)
707{
708 unsigned long addr = __fix_to_virt(idx);
709 pte_t *pte;
710
b63dbef9 711 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
af86e597
LA
712
713 pte = fixmap_pte(addr);
714
715 if (pgprot_val(flags)) {
716 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
717 } else {
718 pte_clear(&init_mm, addr, pte);
719 flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
720 }
721}
61bd93ce 722
f80fb3a3 723void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
61bd93ce
AB
724{
725 const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
f80fb3a3 726 int offset;
61bd93ce
AB
727 void *dt_virt;
728
729 /*
730 * Check whether the physical FDT address is set and meets the minimum
731 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
04a84810
AB
732 * at least 8 bytes so that we can always access the magic and size
733 * fields of the FDT header after mapping the first chunk, double check
734 * here if that is indeed the case.
61bd93ce
AB
735 */
736 BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
737 if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
738 return NULL;
739
740 /*
741 * Make sure that the FDT region can be mapped without the need to
742 * allocate additional translation table pages, so that it is safe
132233a7 743 * to call create_mapping_noalloc() this early.
61bd93ce
AB
744 *
745 * On 64k pages, the FDT will be mapped using PTEs, so we need to
746 * be in the same PMD as the rest of the fixmap.
747 * On 4k pages, we'll use section mappings for the FDT so we only
748 * have to be in the same PUD.
749 */
750 BUILD_BUG_ON(dt_virt_base % SZ_2M);
751
b433dce0
SP
752 BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
753 __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
61bd93ce 754
b433dce0 755 offset = dt_phys % SWAPPER_BLOCK_SIZE;
61bd93ce
AB
756 dt_virt = (void *)dt_virt_base + offset;
757
758 /* map the first chunk so we can read the size from the header */
132233a7
LA
759 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
760 dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
61bd93ce 761
04a84810 762 if (fdt_magic(dt_virt) != FDT_MAGIC)
61bd93ce
AB
763 return NULL;
764
f80fb3a3
AB
765 *size = fdt_totalsize(dt_virt);
766 if (*size > MAX_FDT_SIZE)
61bd93ce
AB
767 return NULL;
768
f80fb3a3 769 if (offset + *size > SWAPPER_BLOCK_SIZE)
132233a7 770 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
f80fb3a3 771 round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
61bd93ce 772
f80fb3a3
AB
773 return dt_virt;
774}
61bd93ce 775
f80fb3a3
AB
776void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
777{
778 void *dt_virt;
779 int size;
780
781 dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
782 if (!dt_virt)
783 return NULL;
784
785 memblock_reserve(dt_phys, size);
61bd93ce
AB
786 return dt_virt;
787}
324420bf
AB
788
789int __init arch_ioremap_pud_supported(void)
790{
791 /* only 4k granule supports level 1 block mappings */
792 return IS_ENABLED(CONFIG_ARM64_4K_PAGES);
793}
794
795int __init arch_ioremap_pmd_supported(void)
796{
797 return 1;
798}
799
800int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
801{
802 BUG_ON(phys & ~PUD_MASK);
803 set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
804 return 1;
805}
806
807int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
808{
809 BUG_ON(phys & ~PMD_MASK);
810 set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
811 return 1;
812}
813
814int pud_clear_huge(pud_t *pud)
815{
816 if (!pud_sect(*pud))
817 return 0;
818 pud_clear(pud);
819 return 1;
820}
821
822int pmd_clear_huge(pmd_t *pmd)
823{
824 if (!pmd_sect(*pmd))
825 return 0;
826 pmd_clear(pmd);
827 return 1;
828}