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Commit | Line | Data |
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5f97f7f9 HS |
1 | /* |
2 | * Atomic operations that C can't guarantee us. Useful for | |
3 | * resource counting etc. | |
4 | * | |
5 | * But use these as seldom as possible since they are slower than | |
6 | * regular operations. | |
7 | * | |
8 | * Copyright (C) 2004-2006 Atmel Corporation | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | #ifndef __ASM_AVR32_ATOMIC_H | |
15 | #define __ASM_AVR32_ATOMIC_H | |
16 | ||
ea435467 | 17 | #include <linux/types.h> |
ae473946 | 18 | #include <asm/cmpxchg.h> |
5f97f7f9 | 19 | |
5f97f7f9 HS |
20 | #define ATOMIC_INIT(i) { (i) } |
21 | ||
62e8a325 PZ |
22 | #define atomic_read(v) READ_ONCE((v)->counter) |
23 | #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) | |
5f97f7f9 | 24 | |
d325209b PZ |
25 | #define ATOMIC_OP_RETURN(op, asm_op, asm_con) \ |
26 | static inline int __atomic_##op##_return(int i, atomic_t *v) \ | |
27 | { \ | |
28 | int result; \ | |
29 | \ | |
30 | asm volatile( \ | |
31 | "/* atomic_" #op "_return */\n" \ | |
32 | "1: ssrf 5\n" \ | |
33 | " ld.w %0, %2\n" \ | |
34 | " " #asm_op " %0, %3\n" \ | |
35 | " stcond %1, %0\n" \ | |
36 | " brne 1b" \ | |
37 | : "=&r" (result), "=o" (v->counter) \ | |
38 | : "m" (v->counter), #asm_con (i) \ | |
39 | : "cc"); \ | |
40 | \ | |
41 | return result; \ | |
42 | } | |
43 | ||
44 | ATOMIC_OP_RETURN(sub, sub, rKs21) | |
45 | ATOMIC_OP_RETURN(add, add, r) | |
46 | ||
f8a570e2 PZ |
47 | #define ATOMIC_OP(op, asm_op) \ |
48 | ATOMIC_OP_RETURN(op, asm_op, r) \ | |
49 | static inline void atomic_##op(int i, atomic_t *v) \ | |
50 | { \ | |
51 | (void)__atomic_##op##_return(i, v); \ | |
52 | } | |
53 | ||
f8a570e2 PZ |
54 | ATOMIC_OP(and, and) |
55 | ATOMIC_OP(or, or) | |
56 | ATOMIC_OP(xor, eor) | |
57 | ||
58 | #undef ATOMIC_OP | |
d325209b PZ |
59 | #undef ATOMIC_OP_RETURN |
60 | ||
5f97f7f9 | 61 | /* |
d325209b PZ |
62 | * Probably found the reason why we want to use sub with the signed 21-bit |
63 | * limit, it uses one less register than the add instruction that can add up to | |
64 | * 32-bit values. | |
5f97f7f9 | 65 | * |
d325209b PZ |
66 | * Both instructions are 32-bit, to use a 16-bit instruction the immediate is |
67 | * very small; 4 bit. | |
68 | * | |
69 | * sub 32-bit, type IV, takes a register and subtracts a 21-bit immediate. | |
70 | * add 32-bit, type II, adds two register values together. | |
5f97f7f9 | 71 | */ |
d325209b PZ |
72 | #define IS_21BIT_CONST(i) \ |
73 | (__builtin_constant_p(i) && ((i) >= -1048575) && ((i) <= 1048576)) | |
5f97f7f9 HS |
74 | |
75 | /* | |
76 | * atomic_add_return - add integer to atomic variable | |
77 | * @i: integer value to add | |
78 | * @v: pointer of type atomic_t | |
79 | * | |
80 | * Atomically adds @i to @v. Returns the resulting value. | |
81 | */ | |
82 | static inline int atomic_add_return(int i, atomic_t *v) | |
83 | { | |
d325209b PZ |
84 | if (IS_21BIT_CONST(i)) |
85 | return __atomic_sub_return(-i, v); | |
5f97f7f9 | 86 | |
d325209b | 87 | return __atomic_add_return(i, v); |
5f97f7f9 HS |
88 | } |
89 | ||
90 | /* | |
d325209b PZ |
91 | * atomic_sub_return - subtract the atomic variable |
92 | * @i: integer value to subtract | |
5f97f7f9 | 93 | * @v: pointer of type atomic_t |
5f97f7f9 | 94 | * |
d325209b PZ |
95 | * Atomically subtracts @i from @v. Returns the resulting value. |
96 | */ | |
97 | static inline int atomic_sub_return(int i, atomic_t *v) | |
5f97f7f9 | 98 | { |
d325209b PZ |
99 | if (IS_21BIT_CONST(i)) |
100 | return __atomic_sub_return(i, v); | |
5f97f7f9 | 101 | |
d325209b | 102 | return __atomic_add_return(-i, v); |
5f97f7f9 HS |
103 | } |
104 | ||
105 | /* | |
f24219b4 | 106 | * __atomic_add_unless - add unless the number is a given value |
5f97f7f9 HS |
107 | * @v: pointer of type atomic_t |
108 | * @a: the amount to add to v... | |
109 | * @u: ...unless v is equal to u. | |
110 | * | |
f24219b4 AS |
111 | * Atomically adds @a to @v, so long as it was not @u. |
112 | * Returns the old value of @v. | |
5f97f7f9 | 113 | */ |
f24219b4 | 114 | static inline int __atomic_add_unless(atomic_t *v, int a, int u) |
5f97f7f9 | 115 | { |
f24219b4 | 116 | int tmp, old = atomic_read(v); |
5f97f7f9 | 117 | |
d325209b PZ |
118 | if (IS_21BIT_CONST(a)) { |
119 | asm volatile( | |
120 | "/* __atomic_sub_unless */\n" | |
121 | "1: ssrf 5\n" | |
122 | " ld.w %0, %2\n" | |
123 | " cp.w %0, %4\n" | |
124 | " breq 1f\n" | |
125 | " sub %0, %3\n" | |
126 | " stcond %1, %0\n" | |
127 | " brne 1b\n" | |
128 | "1:" | |
129 | : "=&r"(tmp), "=o"(v->counter) | |
130 | : "m"(v->counter), "rKs21"(-a), "rKs21"(u) | |
131 | : "cc", "memory"); | |
132 | } else { | |
5f97f7f9 | 133 | asm volatile( |
f24219b4 | 134 | "/* __atomic_add_unless */\n" |
5f97f7f9 | 135 | "1: ssrf 5\n" |
f24219b4 AS |
136 | " ld.w %0, %2\n" |
137 | " cp.w %0, %4\n" | |
5f97f7f9 | 138 | " breq 1f\n" |
f24219b4 AS |
139 | " add %0, %3\n" |
140 | " stcond %1, %0\n" | |
5f97f7f9 | 141 | " brne 1b\n" |
5f97f7f9 | 142 | "1:" |
f24219b4 AS |
143 | : "=&r"(tmp), "=o"(v->counter) |
144 | : "m"(v->counter), "r"(a), "ir"(u) | |
5f97f7f9 HS |
145 | : "cc", "memory"); |
146 | } | |
147 | ||
f24219b4 | 148 | return old; |
5f97f7f9 HS |
149 | } |
150 | ||
d325209b PZ |
151 | #undef IS_21BIT_CONST |
152 | ||
5f97f7f9 HS |
153 | /* |
154 | * atomic_sub_if_positive - conditionally subtract integer from atomic variable | |
155 | * @i: integer value to subtract | |
156 | * @v: pointer of type atomic_t | |
157 | * | |
158 | * Atomically test @v and subtract @i if @v is greater or equal than @i. | |
159 | * The function returns the old value of @v minus @i. | |
160 | */ | |
161 | static inline int atomic_sub_if_positive(int i, atomic_t *v) | |
162 | { | |
163 | int result; | |
164 | ||
165 | asm volatile( | |
166 | "/* atomic_sub_if_positive */\n" | |
167 | "1: ssrf 5\n" | |
168 | " ld.w %0, %2\n" | |
169 | " sub %0, %3\n" | |
170 | " brlt 1f\n" | |
171 | " stcond %1, %0\n" | |
172 | " brne 1b\n" | |
173 | "1:" | |
174 | : "=&r"(result), "=o"(v->counter) | |
175 | : "m"(v->counter), "ir"(i) | |
176 | : "cc", "memory"); | |
177 | ||
178 | return result; | |
179 | } | |
180 | ||
181 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | |
a4022b0d | 182 | #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) |
5f97f7f9 HS |
183 | |
184 | #define atomic_sub(i, v) (void)atomic_sub_return(i, v) | |
185 | #define atomic_add(i, v) (void)atomic_add_return(i, v) | |
186 | #define atomic_dec(v) atomic_sub(1, (v)) | |
187 | #define atomic_inc(v) atomic_add(1, (v)) | |
188 | ||
189 | #define atomic_dec_return(v) atomic_sub_return(1, v) | |
190 | #define atomic_inc_return(v) atomic_add_return(1, v) | |
191 | ||
192 | #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) | |
193 | #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) | |
194 | #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) | |
195 | #define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0) | |
196 | ||
5f97f7f9 HS |
197 | #define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v) |
198 | ||
5f97f7f9 | 199 | #endif /* __ASM_AVR32_ATOMIC_H */ |