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Commit | Line | Data |
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f16295e7 | 1 | /* |
96f1050d | 2 | * Common Clock definitions for various kernel files |
f16295e7 | 3 | * |
96f1050d | 4 | * Copyright 2007-2008 Analog Devices Inc. |
f16295e7 | 5 | * |
96f1050d | 6 | * Licensed under the GPL-2 or later. |
f16295e7 RG |
7 | */ |
8 | ||
3bebca2d RG |
9 | #ifndef _BFIN_CLOCKS_H |
10 | #define _BFIN_CLOCKS_H | |
f16295e7 RG |
11 | |
12 | #ifdef CONFIG_CCLK_DIV_1 | |
13 | # define CONFIG_CCLK_ACT_DIV CCLK_DIV1 | |
14 | # define CONFIG_CCLK_DIV 1 | |
15 | #endif | |
16 | ||
17 | #ifdef CONFIG_CCLK_DIV_2 | |
18 | # define CONFIG_CCLK_ACT_DIV CCLK_DIV2 | |
19 | # define CONFIG_CCLK_DIV 2 | |
20 | #endif | |
21 | ||
22 | #ifdef CONFIG_CCLK_DIV_4 | |
23 | # define CONFIG_CCLK_ACT_DIV CCLK_DIV4 | |
24 | # define CONFIG_CCLK_DIV 4 | |
25 | #endif | |
26 | ||
27 | #ifdef CONFIG_CCLK_DIV_8 | |
28 | # define CONFIG_CCLK_ACT_DIV CCLK_DIV8 | |
29 | # define CONFIG_CCLK_DIV 8 | |
30 | #endif | |
31 | ||
32 | #ifndef CONFIG_PLL_BYPASS | |
33 | # ifndef CONFIG_CLKIN_HALF | |
34 | # define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) | |
35 | # else | |
36 | # define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2) | |
37 | # endif | |
38 | ||
39 | # define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV) | |
40 | # define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV) | |
41 | ||
42 | #else | |
43 | # define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ) | |
44 | # define CONFIG_CCLK_HZ (CONFIG_CLKIN_HZ) | |
45 | # define CONFIG_SCLK_HZ (CONFIG_CLKIN_HZ) | |
46 | # define CONFIG_VCO_MULT 0 | |
47 | #endif | |
48 | ||
3bebca2d | 49 | #endif |