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[mirror_ubuntu-artful-kernel.git] / arch / blackfin / kernel / bfin_gpio.c
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1394f032 1/*
96f1050d 2 * GPIO Abstraction Layer
1394f032 3 *
05bbec38 4 * Copyright 2006-2010 Analog Devices Inc.
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later
1394f032
BW
7 */
8
168f1212 9#include <linux/delay.h>
1394f032
BW
10#include <linux/module.h>
11#include <linux/err.h>
1545a111 12#include <linux/proc_fs.h>
6362ec27 13#include <linux/seq_file.h>
54e4ff4d 14#include <linux/gpio.h>
1394f032
BW
15#include <linux/irq.h>
16
2b39331a
MH
17#if ANOMALY_05000311 || ANOMALY_05000323
18enum {
19 AWA_data = SYSCR,
20 AWA_data_clear = SYSCR,
21 AWA_data_set = SYSCR,
22 AWA_toggle = SYSCR,
6ed83942
GY
23 AWA_maska = BFIN_UART_SCR,
24 AWA_maska_clear = BFIN_UART_SCR,
25 AWA_maska_set = BFIN_UART_SCR,
26 AWA_maska_toggle = BFIN_UART_SCR,
27 AWA_maskb = BFIN_UART_GCTL,
28 AWA_maskb_clear = BFIN_UART_GCTL,
29 AWA_maskb_set = BFIN_UART_GCTL,
30 AWA_maskb_toggle = BFIN_UART_GCTL,
2b39331a
MH
31 AWA_dir = SPORT1_STAT,
32 AWA_polar = SPORT1_STAT,
33 AWA_edge = SPORT1_STAT,
34 AWA_both = SPORT1_STAT,
35#if ANOMALY_05000311
36 AWA_inen = TIMER_ENABLE,
37#elif ANOMALY_05000323
38 AWA_inen = DMA1_1_CONFIG,
39#endif
40};
41 /* Anomaly Workaround */
42#define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
43#else
44#define AWA_DUMMY_READ(...) do { } while (0)
45#endif
46
f556309e 47static struct gpio_port_t * const gpio_array[] = {
dc26aec2 48#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
1394f032 49 (struct gpio_port_t *) FIO_FLAG_D,
269647dc 50#elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
1394f032
BW
51 (struct gpio_port_t *) PORTFIO,
52 (struct gpio_port_t *) PORTGIO,
53 (struct gpio_port_t *) PORTHIO,
f556309e
MF
54#elif defined(BF561_FAMILY)
55 (struct gpio_port_t *) FIO0_FLAG_D,
56 (struct gpio_port_t *) FIO1_FLAG_D,
57 (struct gpio_port_t *) FIO2_FLAG_D,
f556309e
MF
58#else
59# error no gpio arrays defined
60#endif
1394f032
BW
61};
62
269647dc 63#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
f556309e 64static unsigned short * const port_fer[] = {
1394f032
BW
65 (unsigned short *) PORTF_FER,
66 (unsigned short *) PORTG_FER,
67 (unsigned short *) PORTH_FER,
68};
1394f032 69
f556309e
MF
70# if !defined(BF537_FAMILY)
71static unsigned short * const port_mux[] = {
59003145
MH
72 (unsigned short *) PORTF_MUX,
73 (unsigned short *) PORTG_MUX,
74 (unsigned short *) PORTH_MUX,
75};
76
77static const
0ce5eaf8 78u8 pmux_offset[][16] = {
269647dc 79# if defined(CONFIG_BF52x)
0ce5eaf8
GY
80 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
81 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
82 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
269647dc 83# elif defined(CONFIG_BF51x)
0ce5eaf8
GY
84 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
85 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
86 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
87# endif
88};
f556309e 89# endif
0ce5eaf8 90
621dd247
MH
91#elif defined(BF538_FAMILY)
92static unsigned short * const port_fer[] = {
93 (unsigned short *) PORTCIO_FER,
94 (unsigned short *) PORTDIO_FER,
95 (unsigned short *) PORTEIO_FER,
96};
d2b11a46
MH
97#endif
98
812ae98f 99#define RESOURCE_LABEL_SIZE 16
8c613623 100
fac3cf43 101static struct str_ident {
8c613623 102 char name[RESOURCE_LABEL_SIZE];
fac3cf43 103} str_ident[MAX_RESOURCES];
1394f032 104
1efc80b5 105#if defined(CONFIG_PM)
397861cd 106static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
9466a051
MF
107# ifdef BF538_FAMILY
108static unsigned short port_fer_saved[3];
109# endif
59003145
MH
110#endif
111
74c04503 112static void gpio_error(unsigned gpio)
acbcd263
MH
113{
114 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
115}
116
c58c2140
MH
117static void set_label(unsigned short ident, const char *label)
118{
e9fae189 119 if (label) {
8c613623 120 strncpy(str_ident[ident].name, label,
c58c2140 121 RESOURCE_LABEL_SIZE);
8c613623 122 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
c58c2140
MH
123 }
124}
125
126static char *get_label(unsigned short ident)
127{
8c613623 128 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
c58c2140
MH
129}
130
131static int cmp_label(unsigned short ident, const char *label)
132{
fac3cf43
MH
133 if (label == NULL) {
134 dump_stack();
135 printk(KERN_ERR "Please provide none-null label\n");
136 }
137
e9fae189 138 if (label)
1f7d373f 139 return strcmp(str_ident[ident].name, label);
c58c2140
MH
140 else
141 return -EINVAL;
142}
143
332824b8
MF
144#define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
145#define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
146#define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
147#define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
148#define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
149
150DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
382dbe5b 151DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE));
332824b8
MF
152DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM);
153
154inline int check_gpio(unsigned gpio)
155{
332824b8
MF
156 if (gpio >= MAX_BLACKFIN_GPIOS)
157 return -EINVAL;
158 return 0;
159}
160
a2c8cfef 161static void port_setup(unsigned gpio, unsigned short usage)
1394f032 162{
621dd247
MH
163#if defined(BF538_FAMILY)
164 /*
165 * BF538/9 Port C,D and E are special.
166 * Inverted PORT_FER polarity on CDE and no PORF_FER on F
167 * Regular PORT F GPIOs are handled here, CDE are exclusively
168 * managed by GPIOLIB
169 */
170
171 if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
172 return;
173
174 gpio -= MAX_BLACKFIN_GPIOS;
175
176 if (usage == GPIO_USAGE)
177 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
178 else
179 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
180 SSYNC();
181 return;
182#endif
183
a2d03a1d
MF
184 if (check_gpio(gpio))
185 return;
186
269647dc 187#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
a2d03a1d
MF
188 if (usage == GPIO_USAGE)
189 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
190 else
191 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
192 SSYNC();
1394f032 193#endif
a2d03a1d 194}
1394f032 195
c58c2140 196#ifdef BF537_FAMILY
05bbec38 197static const s8 port_mux[] = {
198 [GPIO_PF0] = 3,
199 [GPIO_PF1] = 3,
200 [GPIO_PF2] = 4,
201 [GPIO_PF3] = 4,
202 [GPIO_PF4] = 5,
203 [GPIO_PF5] = 6,
204 [GPIO_PF6] = 7,
205 [GPIO_PF7] = 8,
206 [GPIO_PF8 ... GPIO_PF15] = -1,
207 [GPIO_PG0 ... GPIO_PG7] = -1,
208 [GPIO_PG8] = 9,
209 [GPIO_PG9] = 9,
210 [GPIO_PG10] = 10,
211 [GPIO_PG11] = 10,
212 [GPIO_PG12] = 10,
213 [GPIO_PG13] = 11,
214 [GPIO_PG14] = 11,
215 [GPIO_PG15] = 11,
216 [GPIO_PH0 ... GPIO_PH15] = -1,
217 [PORT_PJ0 ... PORT_PJ3] = -1,
218 [PORT_PJ4] = 1,
219 [PORT_PJ5] = 1,
220 [PORT_PJ6 ... PORT_PJ9] = -1,
221 [PORT_PJ10] = 0,
222 [PORT_PJ11] = 0,
c58c2140
MH
223};
224
05bbec38 225static int portmux_group_check(unsigned short per)
c58c2140 226{
05bbec38 227 u16 ident = P_IDENT(per);
f556309e 228 u16 function = P_FUNCT2MUX(per);
05bbec38 229 s8 offset = port_mux[ident];
f70de486 230 u16 m, pmux, pfunc, mask;
c58c2140 231
05bbec38 232 if (offset < 0)
233 return 0;
c58c2140 234
05bbec38 235 pmux = bfin_read_PORT_MUX();
236 for (m = 0; m < ARRAY_SIZE(port_mux); ++m) {
237 if (m == ident)
238 continue;
239 if (port_mux[m] != offset)
240 continue;
241 if (!is_reserved(peri, m, 1))
242 continue;
243
244 if (offset == 1)
f70de486 245 mask = 3;
05bbec38 246 else
f70de486
SZ
247 mask = 1;
248
249 pfunc = (pmux >> offset) & mask;
250 if (pfunc != (function & mask)) {
05bbec38 251 pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
252 ident, function, m, pfunc);
253 return -EINVAL;
254 }
255 }
c58c2140 256
05bbec38 257 return 0;
258}
259
260static void portmux_setup(unsigned short per)
261{
262 u16 ident = P_IDENT(per);
263 u16 function = P_FUNCT2MUX(per);
264 s8 offset = port_mux[ident];
f70de486 265 u16 pmux, mask;
c58c2140 266
05bbec38 267 if (offset == -1)
268 return;
c58c2140 269
05bbec38 270 pmux = bfin_read_PORT_MUX();
f70de486
SZ
271 if (offset == 1)
272 mask = 3;
05bbec38 273 else
f70de486
SZ
274 mask = 1;
275
276 pmux &= ~(mask << offset);
277 pmux |= ((function & mask) << offset);
278
05bbec38 279 bfin_write_PORT_MUX(pmux);
c58c2140 280}
269647dc 281#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
05bbec38 282static int portmux_group_check(unsigned short per)
283{
284 u16 ident = P_IDENT(per);
285 u16 function = P_FUNCT2MUX(per);
286 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
287 u16 pin, gpiopin, pfunc;
288
289 for (pin = 0; pin < GPIO_BANKSIZE; ++pin) {
290 if (offset != pmux_offset[gpio_bank(ident)][pin])
291 continue;
292
293 gpiopin = gpio_bank(ident) * GPIO_BANKSIZE + pin;
294 if (gpiopin == ident)
295 continue;
296 if (!is_reserved(peri, gpiopin, 1))
297 continue;
298
299 pfunc = *port_mux[gpio_bank(ident)];
300 pfunc = (pfunc >> offset) & 3;
301 if (pfunc != function) {
302 pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
303 ident, function, gpiopin, pfunc);
304 return -EINVAL;
305 }
306 }
307
308 return 0;
309}
310
f556309e 311inline void portmux_setup(unsigned short per)
59003145 312{
05bbec38 313 u16 ident = P_IDENT(per);
314 u16 function = P_FUNCT2MUX(per);
59003145 315 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
05bbec38 316 u16 pmux;
59003145
MH
317
318 pmux = *port_mux[gpio_bank(ident)];
05bbec38 319 if (((pmux >> offset) & 3) == function)
320 return;
59003145
MH
321 pmux &= ~(3 << offset);
322 pmux |= (function & 3) << offset;
323 *port_mux[gpio_bank(ident)] = pmux;
324 SSYNC();
325}
c58c2140
MH
326#else
327# define portmux_setup(...) do { } while (0)
05bbec38 328static int portmux_group_check(unsigned short per)
329{
330 return 0;
331}
c58c2140 332#endif
1394f032 333
1394f032
BW
334/***********************************************************
335*
336* FUNCTIONS: Blackfin General Purpose Ports Access Functions
337*
338* INPUTS/OUTPUTS:
339* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
340*
341*
342* DESCRIPTION: These functions abstract direct register access
343* to Blackfin processor General Purpose
344* Ports Regsiters
345*
346* CAUTION: These functions do not belong to the GPIO Driver API
347*************************************************************
348* MODIFICATION HISTORY :
349**************************************************************/
350
351/* Set a specific bit */
352
353#define SET_GPIO(name) \
a2c8cfef 354void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
1394f032
BW
355{ \
356 unsigned long flags; \
3b139cdb 357 flags = hard_local_irq_save(); \
1394f032 358 if (arg) \
f556309e 359 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
1394f032 360 else \
f556309e 361 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
2b39331a 362 AWA_DUMMY_READ(name); \
3b139cdb 363 hard_local_irq_restore(flags); \
1394f032
BW
364} \
365EXPORT_SYMBOL(set_gpio_ ## name);
366
f556309e
MF
367SET_GPIO(dir) /* set_gpio_dir() */
368SET_GPIO(inen) /* set_gpio_inen() */
369SET_GPIO(polar) /* set_gpio_polar() */
370SET_GPIO(edge) /* set_gpio_edge() */
371SET_GPIO(both) /* set_gpio_both() */
1394f032
BW
372
373
2b39331a 374#define SET_GPIO_SC(name) \
a2c8cfef 375void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
2b39331a
MH
376{ \
377 unsigned long flags; \
f556309e 378 if (ANOMALY_05000311 || ANOMALY_05000323) \
3b139cdb 379 flags = hard_local_irq_save(); \
1394f032 380 if (arg) \
f556309e 381 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
1394f032 382 else \
f556309e
MF
383 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
384 if (ANOMALY_05000311 || ANOMALY_05000323) { \
385 AWA_DUMMY_READ(name); \
3b139cdb 386 hard_local_irq_restore(flags); \
f556309e 387 } \
1394f032
BW
388} \
389EXPORT_SYMBOL(set_gpio_ ## name);
390
391SET_GPIO_SC(maska)
392SET_GPIO_SC(maskb)
1394f032 393SET_GPIO_SC(data)
1394f032 394
a2c8cfef 395void set_gpio_toggle(unsigned gpio)
1394f032
BW
396{
397 unsigned long flags;
f556309e 398 if (ANOMALY_05000311 || ANOMALY_05000323)
3b139cdb 399 flags = hard_local_irq_save();
f556309e
MF
400 gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
401 if (ANOMALY_05000311 || ANOMALY_05000323) {
402 AWA_DUMMY_READ(toggle);
3b139cdb 403 hard_local_irq_restore(flags);
f556309e 404 }
1394f032 405}
1394f032
BW
406EXPORT_SYMBOL(set_gpio_toggle);
407
408
409/*Set current PORT date (16-bit word)*/
410
411#define SET_GPIO_P(name) \
a2c8cfef 412void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
1394f032 413{ \
2b39331a 414 unsigned long flags; \
f556309e 415 if (ANOMALY_05000311 || ANOMALY_05000323) \
3b139cdb 416 flags = hard_local_irq_save(); \
f556309e
MF
417 gpio_array[gpio_bank(gpio)]->name = arg; \
418 if (ANOMALY_05000311 || ANOMALY_05000323) { \
419 AWA_DUMMY_READ(name); \
3b139cdb 420 hard_local_irq_restore(flags); \
f556309e 421 } \
2b39331a
MH
422} \
423EXPORT_SYMBOL(set_gpiop_ ## name);
1394f032 424
2b39331a 425SET_GPIO_P(data)
1394f032
BW
426SET_GPIO_P(dir)
427SET_GPIO_P(inen)
428SET_GPIO_P(polar)
429SET_GPIO_P(edge)
430SET_GPIO_P(both)
431SET_GPIO_P(maska)
432SET_GPIO_P(maskb)
433
1394f032 434/* Get a specific bit */
2b39331a 435#define GET_GPIO(name) \
a2c8cfef 436unsigned short get_gpio_ ## name(unsigned gpio) \
2b39331a
MH
437{ \
438 unsigned long flags; \
439 unsigned short ret; \
f556309e 440 if (ANOMALY_05000311 || ANOMALY_05000323) \
3b139cdb 441 flags = hard_local_irq_save(); \
f556309e
MF
442 ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
443 if (ANOMALY_05000311 || ANOMALY_05000323) { \
444 AWA_DUMMY_READ(name); \
3b139cdb 445 hard_local_irq_restore(flags); \
f556309e 446 } \
2b39331a
MH
447 return ret; \
448} \
449EXPORT_SYMBOL(get_gpio_ ## name);
1394f032 450
2b39331a 451GET_GPIO(data)
1394f032
BW
452GET_GPIO(dir)
453GET_GPIO(inen)
454GET_GPIO(polar)
455GET_GPIO(edge)
456GET_GPIO(both)
457GET_GPIO(maska)
458GET_GPIO(maskb)
459
1394f032
BW
460/*Get current PORT date (16-bit word)*/
461
2b39331a 462#define GET_GPIO_P(name) \
a2c8cfef 463unsigned short get_gpiop_ ## name(unsigned gpio) \
2b39331a
MH
464{ \
465 unsigned long flags; \
466 unsigned short ret; \
f556309e 467 if (ANOMALY_05000311 || ANOMALY_05000323) \
3b139cdb 468 flags = hard_local_irq_save(); \
f556309e
MF
469 ret = (gpio_array[gpio_bank(gpio)]->name); \
470 if (ANOMALY_05000311 || ANOMALY_05000323) { \
471 AWA_DUMMY_READ(name); \
3b139cdb 472 hard_local_irq_restore(flags); \
f556309e 473 } \
2b39331a
MH
474 return ret; \
475} \
476EXPORT_SYMBOL(get_gpiop_ ## name);
1394f032 477
2b39331a 478GET_GPIO_P(data)
1394f032
BW
479GET_GPIO_P(dir)
480GET_GPIO_P(inen)
481GET_GPIO_P(polar)
482GET_GPIO_P(edge)
483GET_GPIO_P(both)
484GET_GPIO_P(maska)
485GET_GPIO_P(maskb)
486
1394f032
BW
487
488#ifdef CONFIG_PM
332824b8 489DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM);
f556309e
MF
490
491static const unsigned int sic_iwr_irqs[] = {
492#if defined(BF533_FAMILY)
493 IRQ_PROG_INTB
494#elif defined(BF537_FAMILY)
8c054103 495 IRQ_PF_INTB_WATCH, IRQ_PORTG_INTB, IRQ_PH_INTB_MAC_TX
f556309e
MF
496#elif defined(BF538_FAMILY)
497 IRQ_PORTF_INTB
269647dc 498#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
f556309e
MF
499 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
500#elif defined(BF561_FAMILY)
501 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
502#else
503# error no SIC_IWR defined
504#endif
505};
506
1394f032
BW
507/***********************************************************
508*
509* FUNCTIONS: Blackfin PM Setup API
510*
511* INPUTS/OUTPUTS:
512* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
513* type -
514* PM_WAKE_RISING
515* PM_WAKE_FALLING
516* PM_WAKE_HIGH
517* PM_WAKE_LOW
518* PM_WAKE_BOTH_EDGES
519*
520* DESCRIPTION: Blackfin PM Driver API
521*
522* CAUTION:
523*************************************************************
524* MODIFICATION HISTORY :
525**************************************************************/
54e4ff4d 526int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
1394f032
BW
527{
528 unsigned long flags;
529
530 if (check_gpio(gpio) < 0)
bb84dbf6 531 return -EINVAL;
1394f032 532
3b139cdb 533 flags = hard_local_irq_save();
bb84dbf6 534 if (ctrl)
332824b8 535 reserve(wakeup, gpio);
1394f032 536 else
332824b8 537 unreserve(wakeup, gpio);
1394f032 538
bb84dbf6 539 set_gpio_maskb(gpio, ctrl);
3b139cdb 540 hard_local_irq_restore(flags);
2b39331a 541
cfefe3c6 542 return 0;
1394f032
BW
543}
544
54e4ff4d 545int bfin_gpio_pm_standby_ctrl(unsigned ctrl)
1394f032
BW
546{
547 u16 bank, mask, i;
548
1f83b8f1 549 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
332824b8 550 mask = map_entry(wakeup, i);
1394f032
BW
551 bank = gpio_bank(i);
552
bb84dbf6
MH
553 if (mask)
554 bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
1394f032 555 }
bb84dbf6 556 return 0;
1394f032
BW
557}
558
1efc80b5
MH
559void bfin_gpio_pm_hibernate_suspend(void)
560{
561 int i, bank;
562
9466a051
MF
563#ifdef BF538_FAMILY
564 for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
565 port_fer_saved[i] = *port_fer[i];
566#endif
567
1efc80b5
MH
568 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
569 bank = gpio_bank(i);
570
269647dc 571#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
f556309e 572 gpio_bank_saved[bank].fer = *port_fer[bank];
269647dc 573#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
f556309e 574 gpio_bank_saved[bank].mux = *port_mux[bank];
1efc80b5 575#else
f556309e
MF
576 if (bank == 0)
577 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
1efc80b5
MH
578#endif
579#endif
f556309e
MF
580 gpio_bank_saved[bank].data = gpio_array[bank]->data;
581 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
582 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
583 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
584 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
585 gpio_bank_saved[bank].both = gpio_array[bank]->both;
586 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
1efc80b5
MH
587 }
588
9466a051
MF
589#ifdef BFIN_SPECIAL_GPIO_BANKS
590 bfin_special_gpio_pm_hibernate_suspend();
591#endif
592
1efc80b5
MH
593 AWA_DUMMY_READ(maska);
594}
595
596void bfin_gpio_pm_hibernate_restore(void)
597{
598 int i, bank;
599
9466a051
MF
600#ifdef BF538_FAMILY
601 for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
602 *port_fer[i] = port_fer_saved[i];
603#endif
604
1efc80b5 605 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
f556309e 606 bank = gpio_bank(i);
1efc80b5 607
269647dc
MF
608#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
609#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
f556309e 610 *port_mux[bank] = gpio_bank_saved[bank].mux;
1efc80b5 611#else
f556309e
MF
612 if (bank == 0)
613 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
1efc80b5 614#endif
f556309e 615 *port_fer[bank] = gpio_bank_saved[bank].fer;
1efc80b5 616#endif
f556309e 617 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
c03c2a87
MH
618 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
619 & gpio_bank_saved[bank].dir;
f556309e
MF
620 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
621 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
622 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
623 gpio_array[bank]->both = gpio_bank_saved[bank].both;
f556309e 624 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
1efc80b5 625 }
9466a051
MF
626
627#ifdef BFIN_SPECIAL_GPIO_BANKS
628 bfin_special_gpio_pm_hibernate_restore();
629#endif
630
1efc80b5
MH
631 AWA_DUMMY_READ(maska);
632}
633
634
1394f032
BW
635#endif
636
d2b11a46
MH
637/***********************************************************
638*
812ae98f 639* FUNCTIONS: Blackfin Peripheral Resource Allocation
d2b11a46
MH
640* and PortMux Setup
641*
642* INPUTS/OUTPUTS:
643* per Peripheral Identifier
644* label String
645*
646* DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
647*
648* CAUTION:
649*************************************************************
650* MODIFICATION HISTORY :
651**************************************************************/
652
d2b11a46
MH
653int peripheral_request(unsigned short per, const char *label)
654{
655 unsigned long flags;
656 unsigned short ident = P_IDENT(per);
657
658 /*
659 * Don't cares are pins with only one dedicated function
660 */
c58c2140 661
d2b11a46
MH
662 if (per & P_DONTCARE)
663 return 0;
664
665 if (!(per & P_DEFINED))
666 return -ENODEV;
667
89e84eea
BS
668 BUG_ON(ident >= MAX_RESOURCES);
669
3b139cdb 670 flags = hard_local_irq_save();
d2b11a46 671
6a87d29b
MF
672 /* If a pin can be muxed as either GPIO or peripheral, make
673 * sure it is not already a GPIO pin when we request it.
674 */
332824b8 675 if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
d6879c58
RG
676 if (system_state == SYSTEM_BOOTING)
677 dump_stack();
d2b11a46 678 printk(KERN_ERR
6c7ec0ec 679 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
b85d858b 680 __func__, ident, get_label(ident));
3b139cdb 681 hard_local_irq_restore(flags);
d2b11a46
MH
682 return -EBUSY;
683 }
684
332824b8 685 if (unlikely(is_reserved(peri, ident, 1))) {
d2b11a46 686
d171c233
MF
687 /*
688 * Pin functions like AMC address strobes my
689 * be requested and used by several drivers
690 */
d2b11a46 691
6c7ec0ec 692 if (!(per & P_MAYSHARE)) {
d171c233
MF
693 /*
694 * Allow that the identical pin function can
695 * be requested from the same driver twice
696 */
d2b11a46 697
d171c233
MF
698 if (cmp_label(ident, label) == 0)
699 goto anyway;
d2b11a46 700
d6879c58
RG
701 if (system_state == SYSTEM_BOOTING)
702 dump_stack();
d2b11a46
MH
703 printk(KERN_ERR
704 "%s: Peripheral %d function %d is already reserved by %s !\n",
b85d858b 705 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
3b139cdb 706 hard_local_irq_restore(flags);
d2b11a46
MH
707 return -EBUSY;
708 }
709 }
710
05bbec38 711 if (unlikely(portmux_group_check(per))) {
712 hard_local_irq_restore(flags);
713 return -EBUSY;
714 }
d171c233 715 anyway:
332824b8 716 reserve(peri, ident);
d2b11a46 717
f556309e 718 portmux_setup(per);
c58c2140
MH
719 port_setup(ident, PERIPHERAL_USAGE);
720
3b139cdb 721 hard_local_irq_restore(flags);
c58c2140
MH
722 set_label(ident, label);
723
724 return 0;
725}
726EXPORT_SYMBOL(peripheral_request);
727
68179371 728int peripheral_request_list(const unsigned short per[], const char *label)
c58c2140
MH
729{
730 u16 cnt;
731 int ret;
732
733 for (cnt = 0; per[cnt] != 0; cnt++) {
314c98d5 734
c58c2140 735 ret = peripheral_request(per[cnt], label);
314c98d5
MH
736
737 if (ret < 0) {
d171c233 738 for ( ; cnt > 0; cnt--)
314c98d5 739 peripheral_free(per[cnt - 1]);
d171c233
MF
740
741 return ret;
314c98d5 742 }
c58c2140
MH
743 }
744
745 return 0;
746}
747EXPORT_SYMBOL(peripheral_request_list);
748
749void peripheral_free(unsigned short per)
750{
751 unsigned long flags;
752 unsigned short ident = P_IDENT(per);
753
754 if (per & P_DONTCARE)
755 return;
756
757 if (!(per & P_DEFINED))
758 return;
759
3b139cdb 760 flags = hard_local_irq_save();
c58c2140 761
332824b8 762 if (unlikely(!is_reserved(peri, ident, 0))) {
3b139cdb 763 hard_local_irq_restore(flags);
c58c2140
MH
764 return;
765 }
766
d171c233 767 if (!(per & P_MAYSHARE))
c58c2140 768 port_setup(ident, GPIO_USAGE);
c58c2140 769
332824b8 770 unreserve(peri, ident);
c58c2140 771
2acde902
MH
772 set_label(ident, "free");
773
3b139cdb 774 hard_local_irq_restore(flags);
c58c2140
MH
775}
776EXPORT_SYMBOL(peripheral_free);
777
68179371 778void peripheral_free_list(const unsigned short per[])
c58c2140
MH
779{
780 u16 cnt;
d171c233 781 for (cnt = 0; per[cnt] != 0; cnt++)
c58c2140 782 peripheral_free(per[cnt]);
c58c2140
MH
783}
784EXPORT_SYMBOL(peripheral_free_list);
785
1394f032
BW
786/***********************************************************
787*
788* FUNCTIONS: Blackfin GPIO Driver
789*
790* INPUTS/OUTPUTS:
d2b11a46
MH
791* gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
792* label String
1394f032
BW
793*
794* DESCRIPTION: Blackfin GPIO Driver API
795*
796* CAUTION:
797*************************************************************
798* MODIFICATION HISTORY :
799**************************************************************/
800
a4f0b32c 801int bfin_gpio_request(unsigned gpio, const char *label)
1394f032
BW
802{
803 unsigned long flags;
804
805 if (check_gpio(gpio) < 0)
806 return -EINVAL;
807
3b139cdb 808 flags = hard_local_irq_save();
1394f032 809
2acde902
MH
810 /*
811 * Allow that the identical GPIO can
812 * be requested from the same driver twice
813 * Do nothing and return -
814 */
815
816 if (cmp_label(gpio, label) == 0) {
3b139cdb 817 hard_local_irq_restore(flags);
2acde902
MH
818 return 0;
819 }
820
332824b8 821 if (unlikely(is_reserved(gpio, gpio, 1))) {
d6879c58
RG
822 if (system_state == SYSTEM_BOOTING)
823 dump_stack();
d2b11a46 824 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
9570ff4a 825 gpio, get_label(gpio));
3b139cdb 826 hard_local_irq_restore(flags);
d2b11a46
MH
827 return -EBUSY;
828 }
332824b8 829 if (unlikely(is_reserved(peri, gpio, 1))) {
d6879c58
RG
830 if (system_state == SYSTEM_BOOTING)
831 dump_stack();
d2b11a46
MH
832 printk(KERN_ERR
833 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
834 gpio, get_label(gpio));
3b139cdb 835 hard_local_irq_restore(flags);
1394f032
BW
836 return -EBUSY;
837 }
332824b8 838 if (unlikely(is_reserved(gpio_irq, gpio, 1))) {
9570ff4a
GY
839 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
840 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
54e4ff4d 841 } else { /* Reset POLAR setting when acquiring a gpio for the first time */
a2be3931
MH
842 set_gpio_polar(gpio, 0);
843 }
d2b11a46 844
332824b8 845 reserve(gpio, gpio);
9570ff4a 846 set_label(gpio, label);
1394f032 847
3b139cdb 848 hard_local_irq_restore(flags);
1394f032
BW
849
850 port_setup(gpio, GPIO_USAGE);
851
852 return 0;
853}
a4f0b32c 854EXPORT_SYMBOL(bfin_gpio_request);
1394f032 855
a4f0b32c 856void bfin_gpio_free(unsigned gpio)
1394f032
BW
857{
858 unsigned long flags;
859
860 if (check_gpio(gpio) < 0)
861 return;
862
45c4f2a0
UKK
863 might_sleep();
864
3b139cdb 865 flags = hard_local_irq_save();
1394f032 866
332824b8 867 if (unlikely(!is_reserved(gpio, gpio, 0))) {
d6879c58
RG
868 if (system_state == SYSTEM_BOOTING)
869 dump_stack();
f85c4abd 870 gpio_error(gpio);
3b139cdb 871 hard_local_irq_restore(flags);
1394f032
BW
872 return;
873 }
874
332824b8 875 unreserve(gpio, gpio);
1394f032 876
2acde902
MH
877 set_label(gpio, "free");
878
3b139cdb 879 hard_local_irq_restore(flags);
1394f032 880}
a4f0b32c 881EXPORT_SYMBOL(bfin_gpio_free);
1394f032 882
621dd247 883#ifdef BFIN_SPECIAL_GPIO_BANKS
332824b8 884DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
621dd247
MH
885
886int bfin_special_gpio_request(unsigned gpio, const char *label)
887{
888 unsigned long flags;
889
3b139cdb 890 flags = hard_local_irq_save();
621dd247
MH
891
892 /*
893 * Allow that the identical GPIO can
894 * be requested from the same driver twice
895 * Do nothing and return -
896 */
897
898 if (cmp_label(gpio, label) == 0) {
3b139cdb 899 hard_local_irq_restore(flags);
621dd247
MH
900 return 0;
901 }
902
332824b8 903 if (unlikely(is_reserved(special_gpio, gpio, 1))) {
3b139cdb 904 hard_local_irq_restore(flags);
621dd247
MH
905 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
906 gpio, get_label(gpio));
907
908 return -EBUSY;
909 }
332824b8 910 if (unlikely(is_reserved(peri, gpio, 1))) {
3b139cdb 911 hard_local_irq_restore(flags);
621dd247
MH
912 printk(KERN_ERR
913 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
914 gpio, get_label(gpio));
915
916 return -EBUSY;
917 }
918
332824b8
MF
919 reserve(special_gpio, gpio);
920 reserve(peri, gpio);
621dd247
MH
921
922 set_label(gpio, label);
3b139cdb 923 hard_local_irq_restore(flags);
621dd247
MH
924 port_setup(gpio, GPIO_USAGE);
925
926 return 0;
927}
928EXPORT_SYMBOL(bfin_special_gpio_request);
929
930void bfin_special_gpio_free(unsigned gpio)
931{
932 unsigned long flags;
933
934 might_sleep();
935
3b139cdb 936 flags = hard_local_irq_save();
621dd247 937
332824b8 938 if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
621dd247 939 gpio_error(gpio);
3b139cdb 940 hard_local_irq_restore(flags);
621dd247
MH
941 return;
942 }
943
332824b8
MF
944 unreserve(special_gpio, gpio);
945 unreserve(peri, gpio);
621dd247 946 set_label(gpio, "free");
3b139cdb 947 hard_local_irq_restore(flags);
621dd247
MH
948}
949EXPORT_SYMBOL(bfin_special_gpio_free);
950#endif
951
952
9570ff4a
GY
953int bfin_gpio_irq_request(unsigned gpio, const char *label)
954{
955 unsigned long flags;
956
957 if (check_gpio(gpio) < 0)
958 return -EINVAL;
959
3b139cdb 960 flags = hard_local_irq_save();
9570ff4a 961
332824b8 962 if (unlikely(is_reserved(peri, gpio, 1))) {
d6879c58
RG
963 if (system_state == SYSTEM_BOOTING)
964 dump_stack();
9570ff4a
GY
965 printk(KERN_ERR
966 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
967 gpio, get_label(gpio));
3b139cdb 968 hard_local_irq_restore(flags);
9570ff4a
GY
969 return -EBUSY;
970 }
332824b8 971 if (unlikely(is_reserved(gpio, gpio, 1)))
9570ff4a
GY
972 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
973 "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
974 gpio, get_label(gpio));
975
332824b8 976 reserve(gpio_irq, gpio);
9570ff4a
GY
977 set_label(gpio, label);
978
3b139cdb 979 hard_local_irq_restore(flags);
9570ff4a
GY
980
981 port_setup(gpio, GPIO_USAGE);
982
983 return 0;
984}
985
986void bfin_gpio_irq_free(unsigned gpio)
987{
988 unsigned long flags;
989
990 if (check_gpio(gpio) < 0)
991 return;
992
3b139cdb 993 flags = hard_local_irq_save();
9570ff4a 994
332824b8 995 if (unlikely(!is_reserved(gpio_irq, gpio, 0))) {
d6879c58
RG
996 if (system_state == SYSTEM_BOOTING)
997 dump_stack();
9570ff4a 998 gpio_error(gpio);
3b139cdb 999 hard_local_irq_restore(flags);
9570ff4a
GY
1000 return;
1001 }
1002
332824b8 1003 unreserve(gpio_irq, gpio);
9570ff4a
GY
1004
1005 set_label(gpio, "free");
1006
3b139cdb 1007 hard_local_irq_restore(flags);
9570ff4a
GY
1008}
1009
f556309e
MF
1010static inline void __bfin_gpio_direction_input(unsigned gpio)
1011{
f556309e 1012 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
f556309e
MF
1013 gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1014}
1015
a4f0b32c 1016int bfin_gpio_direction_input(unsigned gpio)
d2b11a46
MH
1017{
1018 unsigned long flags;
1019
332824b8 1020 if (unlikely(!is_reserved(gpio, gpio, 0))) {
acbcd263
MH
1021 gpio_error(gpio);
1022 return -EINVAL;
1023 }
1024
3b139cdb 1025 flags = hard_local_irq_save();
f556309e
MF
1026 __bfin_gpio_direction_input(gpio);
1027 AWA_DUMMY_READ(inen);
3b139cdb 1028 hard_local_irq_restore(flags);
acbcd263
MH
1029
1030 return 0;
d2b11a46 1031}
a4f0b32c 1032EXPORT_SYMBOL(bfin_gpio_direction_input);
d2b11a46 1033
f556309e 1034void bfin_gpio_irq_prepare(unsigned gpio)
d2b11a46 1035{
f556309e 1036 port_setup(gpio, GPIO_USAGE);
d2b11a46 1037}
d2b11a46 1038
a4f0b32c 1039void bfin_gpio_set_value(unsigned gpio, int arg)
d2b11a46
MH
1040{
1041 if (arg)
f556309e 1042 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
d2b11a46 1043 else
f556309e 1044 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
d2b11a46 1045}
a4f0b32c 1046EXPORT_SYMBOL(bfin_gpio_set_value);
d2b11a46 1047
f556309e 1048int bfin_gpio_direction_output(unsigned gpio, int value)
affee2b2
MH
1049{
1050 unsigned long flags;
1051
332824b8 1052 if (unlikely(!is_reserved(gpio, gpio, 0))) {
f556309e
MF
1053 gpio_error(gpio);
1054 return -EINVAL;
1055 }
affee2b2 1056
3b139cdb 1057 flags = hard_local_irq_save();
affee2b2 1058
f556309e
MF
1059 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1060 gpio_set_value(gpio, value);
f556309e 1061 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
f556309e
MF
1062
1063 AWA_DUMMY_READ(dir);
3b139cdb 1064 hard_local_irq_restore(flags);
f556309e
MF
1065
1066 return 0;
1067}
1068EXPORT_SYMBOL(bfin_gpio_direction_output);
d2b11a46 1069
a4f0b32c 1070int bfin_gpio_get_value(unsigned gpio)
803a8d2a
MH
1071{
1072 unsigned long flags;
803a8d2a
MH
1073
1074 if (unlikely(get_gpio_edge(gpio))) {
f556309e 1075 int ret;
3b139cdb 1076 flags = hard_local_irq_save();
803a8d2a
MH
1077 set_gpio_edge(gpio, 0);
1078 ret = get_gpio_data(gpio);
1079 set_gpio_edge(gpio, 1);
3b139cdb 1080 hard_local_irq_restore(flags);
803a8d2a
MH
1081 return ret;
1082 } else
1083 return get_gpio_data(gpio);
1084}
a4f0b32c 1085EXPORT_SYMBOL(bfin_gpio_get_value);
803a8d2a 1086
168f1212
MF
1087/* If we are booting from SPI and our board lacks a strong enough pull up,
1088 * the core can reset and execute the bootrom faster than the resistor can
1089 * pull the signal logically high. To work around this (common) error in
1090 * board design, we explicitly set the pin back to GPIO mode, force /CS
1091 * high, and wait for the electrons to do their thing.
1092 *
1093 * This function only makes sense to be called from reset code, but it
1094 * lives here as we need to force all the GPIO states w/out going through
1095 * BUG() checks and such.
1096 */
b52dae31 1097void bfin_reset_boot_spi_cs(unsigned short pin)
168f1212 1098{
b52dae31 1099 unsigned short gpio = P_IDENT(pin);
4d5f4ed3 1100 port_setup(gpio, GPIO_USAGE);
f556309e 1101 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
a2c8cfef 1102 AWA_DUMMY_READ(data_set);
168f1212
MF
1103 udelay(1);
1104}
d2b11a46 1105
1545a111 1106#if defined(CONFIG_PROC_FS)
6362ec27 1107static int gpio_proc_show(struct seq_file *m, void *v)
1545a111 1108{
6362ec27 1109 int c, irq, gpio;
1545a111
MF
1110
1111 for (c = 0; c < MAX_RESOURCES; c++) {
332824b8
MF
1112 irq = is_reserved(gpio_irq, c, 1);
1113 gpio = is_reserved(gpio, c, 1);
9570ff4a 1114 if (!check_gpio(c) && (gpio || irq))
6362ec27 1115 seq_printf(m, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
9570ff4a
GY
1116 get_label(c), (gpio && irq) ? " *" : "",
1117 get_gpio_dir(c) ? "OUTPUT" : "INPUT");
332824b8 1118 else if (is_reserved(peri, c, 1))
6362ec27 1119 seq_printf(m, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1545a111
MF
1120 else
1121 continue;
1545a111 1122 }
6362ec27
AD
1123
1124 return 0;
1545a111
MF
1125}
1126
6362ec27
AD
1127static int gpio_proc_open(struct inode *inode, struct file *file)
1128{
1129 return single_open(file, gpio_proc_show, NULL);
1130}
1131
1132static const struct file_operations gpio_proc_ops = {
1133 .open = gpio_proc_open,
1134 .read = seq_read,
1135 .llseek = seq_lseek,
1136 .release = single_release,
1137};
1138
1545a111
MF
1139static __init int gpio_register_proc(void)
1140{
1141 struct proc_dir_entry *proc_gpio;
1142
ce860914
SM
1143 proc_gpio = proc_create("gpio", 0, NULL, &gpio_proc_ops);
1144 return proc_gpio == NULL;
1545a111 1145}
1545a111
MF
1146__initcall(gpio_register_proc);
1147#endif
a4f0b32c
MH
1148
1149#ifdef CONFIG_GPIOLIB
f9c29e87 1150static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
a4f0b32c
MH
1151{
1152 return bfin_gpio_direction_input(gpio);
1153}
1154
f9c29e87 1155static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
a4f0b32c
MH
1156{
1157 return bfin_gpio_direction_output(gpio, level);
1158}
1159
f9c29e87 1160static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
a4f0b32c
MH
1161{
1162 return bfin_gpio_get_value(gpio);
1163}
1164
f9c29e87 1165static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
a4f0b32c 1166{
a4f0b32c 1167 return bfin_gpio_set_value(gpio, value);
a4f0b32c
MH
1168}
1169
f9c29e87 1170static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
a4f0b32c
MH
1171{
1172 return bfin_gpio_request(gpio, chip->label);
1173}
1174
f9c29e87 1175static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
a4f0b32c
MH
1176{
1177 return bfin_gpio_free(gpio);
1178}
1179
f9c29e87 1180static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
7f4f69f9
JE
1181{
1182 return gpio + GPIO_IRQ_BASE;
1183}
1184
a4f0b32c 1185static struct gpio_chip bfin_chip = {
edd07992 1186 .label = "BFIN-GPIO",
a4f0b32c
MH
1187 .direction_input = bfin_gpiolib_direction_input,
1188 .get = bfin_gpiolib_get_value,
1189 .direction_output = bfin_gpiolib_direction_output,
1190 .set = bfin_gpiolib_set_value,
1191 .request = bfin_gpiolib_gpio_request,
1192 .free = bfin_gpiolib_gpio_free,
7f4f69f9 1193 .to_irq = bfin_gpiolib_gpio_to_irq,
a4f0b32c
MH
1194 .base = 0,
1195 .ngpio = MAX_BLACKFIN_GPIOS,
1196};
1197
1198static int __init bfin_gpiolib_setup(void)
1199{
1200 return gpiochip_add(&bfin_chip);
1201}
1202arch_initcall(bfin_gpiolib_setup);
1203#endif