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Commit | Line | Data |
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1394f032 | 1 | /* |
96f1050d | 2 | * GPIO Abstraction Layer |
1394f032 | 3 | * |
05bbec38 | 4 | * Copyright 2006-2010 Analog Devices Inc. |
1394f032 | 5 | * |
96f1050d | 6 | * Licensed under the GPL-2 or later |
1394f032 BW |
7 | */ |
8 | ||
168f1212 | 9 | #include <linux/delay.h> |
1394f032 BW |
10 | #include <linux/module.h> |
11 | #include <linux/err.h> | |
1545a111 | 12 | #include <linux/proc_fs.h> |
1394f032 BW |
13 | #include <asm/blackfin.h> |
14 | #include <asm/gpio.h> | |
c58c2140 | 15 | #include <asm/portmux.h> |
1394f032 | 16 | #include <linux/irq.h> |
6327a574 | 17 | #include <asm/irq_handler.h> |
1394f032 | 18 | |
2b39331a MH |
19 | #if ANOMALY_05000311 || ANOMALY_05000323 |
20 | enum { | |
21 | AWA_data = SYSCR, | |
22 | AWA_data_clear = SYSCR, | |
23 | AWA_data_set = SYSCR, | |
24 | AWA_toggle = SYSCR, | |
6ed83942 GY |
25 | AWA_maska = BFIN_UART_SCR, |
26 | AWA_maska_clear = BFIN_UART_SCR, | |
27 | AWA_maska_set = BFIN_UART_SCR, | |
28 | AWA_maska_toggle = BFIN_UART_SCR, | |
29 | AWA_maskb = BFIN_UART_GCTL, | |
30 | AWA_maskb_clear = BFIN_UART_GCTL, | |
31 | AWA_maskb_set = BFIN_UART_GCTL, | |
32 | AWA_maskb_toggle = BFIN_UART_GCTL, | |
2b39331a MH |
33 | AWA_dir = SPORT1_STAT, |
34 | AWA_polar = SPORT1_STAT, | |
35 | AWA_edge = SPORT1_STAT, | |
36 | AWA_both = SPORT1_STAT, | |
37 | #if ANOMALY_05000311 | |
38 | AWA_inen = TIMER_ENABLE, | |
39 | #elif ANOMALY_05000323 | |
40 | AWA_inen = DMA1_1_CONFIG, | |
41 | #endif | |
42 | }; | |
43 | /* Anomaly Workaround */ | |
44 | #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name) | |
45 | #else | |
46 | #define AWA_DUMMY_READ(...) do { } while (0) | |
47 | #endif | |
48 | ||
f556309e | 49 | static struct gpio_port_t * const gpio_array[] = { |
dc26aec2 | 50 | #if defined(BF533_FAMILY) || defined(BF538_FAMILY) |
1394f032 | 51 | (struct gpio_port_t *) FIO_FLAG_D, |
269647dc | 52 | #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) |
1394f032 BW |
53 | (struct gpio_port_t *) PORTFIO, |
54 | (struct gpio_port_t *) PORTGIO, | |
55 | (struct gpio_port_t *) PORTHIO, | |
f556309e MF |
56 | #elif defined(BF561_FAMILY) |
57 | (struct gpio_port_t *) FIO0_FLAG_D, | |
58 | (struct gpio_port_t *) FIO1_FLAG_D, | |
59 | (struct gpio_port_t *) FIO2_FLAG_D, | |
269647dc | 60 | #elif defined(CONFIG_BF54x) |
f556309e MF |
61 | (struct gpio_port_t *)PORTA_FER, |
62 | (struct gpio_port_t *)PORTB_FER, | |
63 | (struct gpio_port_t *)PORTC_FER, | |
64 | (struct gpio_port_t *)PORTD_FER, | |
65 | (struct gpio_port_t *)PORTE_FER, | |
66 | (struct gpio_port_t *)PORTF_FER, | |
67 | (struct gpio_port_t *)PORTG_FER, | |
68 | (struct gpio_port_t *)PORTH_FER, | |
69 | (struct gpio_port_t *)PORTI_FER, | |
70 | (struct gpio_port_t *)PORTJ_FER, | |
71 | #else | |
72 | # error no gpio arrays defined | |
73 | #endif | |
1394f032 BW |
74 | }; |
75 | ||
269647dc | 76 | #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) |
f556309e | 77 | static unsigned short * const port_fer[] = { |
1394f032 BW |
78 | (unsigned short *) PORTF_FER, |
79 | (unsigned short *) PORTG_FER, | |
80 | (unsigned short *) PORTH_FER, | |
81 | }; | |
1394f032 | 82 | |
f556309e MF |
83 | # if !defined(BF537_FAMILY) |
84 | static unsigned short * const port_mux[] = { | |
59003145 MH |
85 | (unsigned short *) PORTF_MUX, |
86 | (unsigned short *) PORTG_MUX, | |
87 | (unsigned short *) PORTH_MUX, | |
88 | }; | |
89 | ||
90 | static const | |
0ce5eaf8 | 91 | u8 pmux_offset[][16] = { |
269647dc | 92 | # if defined(CONFIG_BF52x) |
0ce5eaf8 GY |
93 | { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */ |
94 | { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */ | |
95 | { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */ | |
269647dc | 96 | # elif defined(CONFIG_BF51x) |
0ce5eaf8 GY |
97 | { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */ |
98 | { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */ | |
99 | { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */ | |
100 | # endif | |
101 | }; | |
f556309e | 102 | # endif |
0ce5eaf8 | 103 | |
621dd247 MH |
104 | #elif defined(BF538_FAMILY) |
105 | static unsigned short * const port_fer[] = { | |
106 | (unsigned short *) PORTCIO_FER, | |
107 | (unsigned short *) PORTDIO_FER, | |
108 | (unsigned short *) PORTEIO_FER, | |
109 | }; | |
d2b11a46 MH |
110 | #endif |
111 | ||
812ae98f | 112 | #define RESOURCE_LABEL_SIZE 16 |
8c613623 | 113 | |
fac3cf43 | 114 | static struct str_ident { |
8c613623 | 115 | char name[RESOURCE_LABEL_SIZE]; |
fac3cf43 | 116 | } str_ident[MAX_RESOURCES]; |
1394f032 | 117 | |
1efc80b5 | 118 | #if defined(CONFIG_PM) |
397861cd | 119 | static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM]; |
59003145 MH |
120 | #endif |
121 | ||
74c04503 | 122 | static void gpio_error(unsigned gpio) |
acbcd263 MH |
123 | { |
124 | printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio); | |
125 | } | |
126 | ||
c58c2140 MH |
127 | static void set_label(unsigned short ident, const char *label) |
128 | { | |
e9fae189 | 129 | if (label) { |
8c613623 | 130 | strncpy(str_ident[ident].name, label, |
c58c2140 | 131 | RESOURCE_LABEL_SIZE); |
8c613623 | 132 | str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; |
c58c2140 MH |
133 | } |
134 | } | |
135 | ||
136 | static char *get_label(unsigned short ident) | |
137 | { | |
8c613623 | 138 | return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN"); |
c58c2140 MH |
139 | } |
140 | ||
141 | static int cmp_label(unsigned short ident, const char *label) | |
142 | { | |
fac3cf43 MH |
143 | if (label == NULL) { |
144 | dump_stack(); | |
145 | printk(KERN_ERR "Please provide none-null label\n"); | |
146 | } | |
147 | ||
e9fae189 | 148 | if (label) |
1f7d373f | 149 | return strcmp(str_ident[ident].name, label); |
c58c2140 MH |
150 | else |
151 | return -EINVAL; | |
152 | } | |
153 | ||
332824b8 MF |
154 | #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)] |
155 | #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i)) | |
156 | #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i)) | |
157 | #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i)) | |
158 | #define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c] | |
159 | ||
160 | DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM); | |
382dbe5b | 161 | DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE)); |
332824b8 MF |
162 | DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM); |
163 | ||
164 | inline int check_gpio(unsigned gpio) | |
165 | { | |
166 | #if defined(CONFIG_BF54x) | |
167 | if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 | |
168 | || gpio == GPIO_PH14 || gpio == GPIO_PH15 | |
169 | || gpio == GPIO_PJ14 || gpio == GPIO_PJ15) | |
170 | return -EINVAL; | |
171 | #endif | |
172 | if (gpio >= MAX_BLACKFIN_GPIOS) | |
173 | return -EINVAL; | |
174 | return 0; | |
175 | } | |
176 | ||
a2c8cfef | 177 | static void port_setup(unsigned gpio, unsigned short usage) |
1394f032 | 178 | { |
621dd247 MH |
179 | #if defined(BF538_FAMILY) |
180 | /* | |
181 | * BF538/9 Port C,D and E are special. | |
182 | * Inverted PORT_FER polarity on CDE and no PORF_FER on F | |
183 | * Regular PORT F GPIOs are handled here, CDE are exclusively | |
184 | * managed by GPIOLIB | |
185 | */ | |
186 | ||
187 | if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES) | |
188 | return; | |
189 | ||
190 | gpio -= MAX_BLACKFIN_GPIOS; | |
191 | ||
192 | if (usage == GPIO_USAGE) | |
193 | *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); | |
194 | else | |
195 | *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); | |
196 | SSYNC(); | |
197 | return; | |
198 | #endif | |
199 | ||
a2d03a1d MF |
200 | if (check_gpio(gpio)) |
201 | return; | |
202 | ||
269647dc | 203 | #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) |
a2d03a1d MF |
204 | if (usage == GPIO_USAGE) |
205 | *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); | |
206 | else | |
207 | *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); | |
208 | SSYNC(); | |
269647dc | 209 | #elif defined(CONFIG_BF54x) |
d2b11a46 MH |
210 | if (usage == GPIO_USAGE) |
211 | gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); | |
212 | else | |
213 | gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio); | |
214 | SSYNC(); | |
1394f032 | 215 | #endif |
a2d03a1d | 216 | } |
1394f032 | 217 | |
c58c2140 | 218 | #ifdef BF537_FAMILY |
05bbec38 | 219 | static const s8 port_mux[] = { |
220 | [GPIO_PF0] = 3, | |
221 | [GPIO_PF1] = 3, | |
222 | [GPIO_PF2] = 4, | |
223 | [GPIO_PF3] = 4, | |
224 | [GPIO_PF4] = 5, | |
225 | [GPIO_PF5] = 6, | |
226 | [GPIO_PF6] = 7, | |
227 | [GPIO_PF7] = 8, | |
228 | [GPIO_PF8 ... GPIO_PF15] = -1, | |
229 | [GPIO_PG0 ... GPIO_PG7] = -1, | |
230 | [GPIO_PG8] = 9, | |
231 | [GPIO_PG9] = 9, | |
232 | [GPIO_PG10] = 10, | |
233 | [GPIO_PG11] = 10, | |
234 | [GPIO_PG12] = 10, | |
235 | [GPIO_PG13] = 11, | |
236 | [GPIO_PG14] = 11, | |
237 | [GPIO_PG15] = 11, | |
238 | [GPIO_PH0 ... GPIO_PH15] = -1, | |
239 | [PORT_PJ0 ... PORT_PJ3] = -1, | |
240 | [PORT_PJ4] = 1, | |
241 | [PORT_PJ5] = 1, | |
242 | [PORT_PJ6 ... PORT_PJ9] = -1, | |
243 | [PORT_PJ10] = 0, | |
244 | [PORT_PJ11] = 0, | |
c58c2140 MH |
245 | }; |
246 | ||
05bbec38 | 247 | static int portmux_group_check(unsigned short per) |
c58c2140 | 248 | { |
05bbec38 | 249 | u16 ident = P_IDENT(per); |
f556309e | 250 | u16 function = P_FUNCT2MUX(per); |
05bbec38 | 251 | s8 offset = port_mux[ident]; |
252 | u16 m, pmux, pfunc; | |
c58c2140 | 253 | |
05bbec38 | 254 | if (offset < 0) |
255 | return 0; | |
c58c2140 | 256 | |
05bbec38 | 257 | pmux = bfin_read_PORT_MUX(); |
258 | for (m = 0; m < ARRAY_SIZE(port_mux); ++m) { | |
259 | if (m == ident) | |
260 | continue; | |
261 | if (port_mux[m] != offset) | |
262 | continue; | |
263 | if (!is_reserved(peri, m, 1)) | |
264 | continue; | |
265 | ||
266 | if (offset == 1) | |
267 | pfunc = (pmux >> offset) & 3; | |
268 | else | |
269 | pfunc = (pmux >> offset) & 1; | |
270 | if (pfunc != function) { | |
271 | pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n", | |
272 | ident, function, m, pfunc); | |
273 | return -EINVAL; | |
274 | } | |
275 | } | |
c58c2140 | 276 | |
05bbec38 | 277 | return 0; |
278 | } | |
279 | ||
280 | static void portmux_setup(unsigned short per) | |
281 | { | |
282 | u16 ident = P_IDENT(per); | |
283 | u16 function = P_FUNCT2MUX(per); | |
284 | s8 offset = port_mux[ident]; | |
285 | u16 pmux; | |
c58c2140 | 286 | |
05bbec38 | 287 | if (offset == -1) |
288 | return; | |
c58c2140 | 289 | |
05bbec38 | 290 | pmux = bfin_read_PORT_MUX(); |
291 | if (offset != 1) | |
292 | pmux &= ~(1 << offset); | |
293 | else | |
294 | pmux &= ~(3 << 1); | |
295 | pmux |= (function << offset); | |
296 | bfin_write_PORT_MUX(pmux); | |
c58c2140 | 297 | } |
269647dc | 298 | #elif defined(CONFIG_BF54x) |
f556309e | 299 | inline void portmux_setup(unsigned short per) |
d2b11a46 | 300 | { |
f556309e MF |
301 | u16 ident = P_IDENT(per); |
302 | u16 function = P_FUNCT2MUX(per); | |
05bbec38 | 303 | u32 pmux; |
d2b11a46 | 304 | |
f556309e | 305 | pmux = gpio_array[gpio_bank(ident)]->port_mux; |
d2b11a46 | 306 | |
f556309e MF |
307 | pmux &= ~(0x3 << (2 * gpio_sub_n(ident))); |
308 | pmux |= (function & 0x3) << (2 * gpio_sub_n(ident)); | |
d2b11a46 | 309 | |
f556309e | 310 | gpio_array[gpio_bank(ident)]->port_mux = pmux; |
d2b11a46 MH |
311 | } |
312 | ||
f556309e | 313 | inline u16 get_portmux(unsigned short per) |
d2b11a46 | 314 | { |
f556309e | 315 | u16 ident = P_IDENT(per); |
05bbec38 | 316 | u32 pmux = gpio_array[gpio_bank(ident)]->port_mux; |
f556309e | 317 | return (pmux >> (2 * gpio_sub_n(ident)) & 0x3); |
d2b11a46 | 318 | } |
05bbec38 | 319 | static int portmux_group_check(unsigned short per) |
320 | { | |
321 | return 0; | |
322 | } | |
269647dc | 323 | #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x) |
05bbec38 | 324 | static int portmux_group_check(unsigned short per) |
325 | { | |
326 | u16 ident = P_IDENT(per); | |
327 | u16 function = P_FUNCT2MUX(per); | |
328 | u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)]; | |
329 | u16 pin, gpiopin, pfunc; | |
330 | ||
331 | for (pin = 0; pin < GPIO_BANKSIZE; ++pin) { | |
332 | if (offset != pmux_offset[gpio_bank(ident)][pin]) | |
333 | continue; | |
334 | ||
335 | gpiopin = gpio_bank(ident) * GPIO_BANKSIZE + pin; | |
336 | if (gpiopin == ident) | |
337 | continue; | |
338 | if (!is_reserved(peri, gpiopin, 1)) | |
339 | continue; | |
340 | ||
341 | pfunc = *port_mux[gpio_bank(ident)]; | |
342 | pfunc = (pfunc >> offset) & 3; | |
343 | if (pfunc != function) { | |
344 | pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n", | |
345 | ident, function, gpiopin, pfunc); | |
346 | return -EINVAL; | |
347 | } | |
348 | } | |
349 | ||
350 | return 0; | |
351 | } | |
352 | ||
f556309e | 353 | inline void portmux_setup(unsigned short per) |
59003145 | 354 | { |
05bbec38 | 355 | u16 ident = P_IDENT(per); |
356 | u16 function = P_FUNCT2MUX(per); | |
59003145 | 357 | u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)]; |
05bbec38 | 358 | u16 pmux; |
59003145 MH |
359 | |
360 | pmux = *port_mux[gpio_bank(ident)]; | |
05bbec38 | 361 | if (((pmux >> offset) & 3) == function) |
362 | return; | |
59003145 MH |
363 | pmux &= ~(3 << offset); |
364 | pmux |= (function & 3) << offset; | |
365 | *port_mux[gpio_bank(ident)] = pmux; | |
366 | SSYNC(); | |
367 | } | |
c58c2140 MH |
368 | #else |
369 | # define portmux_setup(...) do { } while (0) | |
05bbec38 | 370 | static int portmux_group_check(unsigned short per) |
371 | { | |
372 | return 0; | |
373 | } | |
c58c2140 | 374 | #endif |
1394f032 | 375 | |
269647dc | 376 | #ifndef CONFIG_BF54x |
1394f032 BW |
377 | /*********************************************************** |
378 | * | |
379 | * FUNCTIONS: Blackfin General Purpose Ports Access Functions | |
380 | * | |
381 | * INPUTS/OUTPUTS: | |
382 | * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS | |
383 | * | |
384 | * | |
385 | * DESCRIPTION: These functions abstract direct register access | |
386 | * to Blackfin processor General Purpose | |
387 | * Ports Regsiters | |
388 | * | |
389 | * CAUTION: These functions do not belong to the GPIO Driver API | |
390 | ************************************************************* | |
391 | * MODIFICATION HISTORY : | |
392 | **************************************************************/ | |
393 | ||
394 | /* Set a specific bit */ | |
395 | ||
396 | #define SET_GPIO(name) \ | |
a2c8cfef | 397 | void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ |
1394f032 BW |
398 | { \ |
399 | unsigned long flags; \ | |
3b139cdb | 400 | flags = hard_local_irq_save(); \ |
1394f032 | 401 | if (arg) \ |
f556309e | 402 | gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \ |
1394f032 | 403 | else \ |
f556309e | 404 | gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \ |
2b39331a | 405 | AWA_DUMMY_READ(name); \ |
3b139cdb | 406 | hard_local_irq_restore(flags); \ |
1394f032 BW |
407 | } \ |
408 | EXPORT_SYMBOL(set_gpio_ ## name); | |
409 | ||
f556309e MF |
410 | SET_GPIO(dir) /* set_gpio_dir() */ |
411 | SET_GPIO(inen) /* set_gpio_inen() */ | |
412 | SET_GPIO(polar) /* set_gpio_polar() */ | |
413 | SET_GPIO(edge) /* set_gpio_edge() */ | |
414 | SET_GPIO(both) /* set_gpio_both() */ | |
1394f032 BW |
415 | |
416 | ||
2b39331a | 417 | #define SET_GPIO_SC(name) \ |
a2c8cfef | 418 | void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ |
2b39331a MH |
419 | { \ |
420 | unsigned long flags; \ | |
f556309e | 421 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
3b139cdb | 422 | flags = hard_local_irq_save(); \ |
1394f032 | 423 | if (arg) \ |
f556309e | 424 | gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ |
1394f032 | 425 | else \ |
f556309e MF |
426 | gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ |
427 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ | |
428 | AWA_DUMMY_READ(name); \ | |
3b139cdb | 429 | hard_local_irq_restore(flags); \ |
f556309e | 430 | } \ |
1394f032 BW |
431 | } \ |
432 | EXPORT_SYMBOL(set_gpio_ ## name); | |
433 | ||
434 | SET_GPIO_SC(maska) | |
435 | SET_GPIO_SC(maskb) | |
1394f032 | 436 | SET_GPIO_SC(data) |
1394f032 | 437 | |
a2c8cfef | 438 | void set_gpio_toggle(unsigned gpio) |
1394f032 BW |
439 | { |
440 | unsigned long flags; | |
f556309e | 441 | if (ANOMALY_05000311 || ANOMALY_05000323) |
3b139cdb | 442 | flags = hard_local_irq_save(); |
f556309e MF |
443 | gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio); |
444 | if (ANOMALY_05000311 || ANOMALY_05000323) { | |
445 | AWA_DUMMY_READ(toggle); | |
3b139cdb | 446 | hard_local_irq_restore(flags); |
f556309e | 447 | } |
1394f032 | 448 | } |
1394f032 BW |
449 | EXPORT_SYMBOL(set_gpio_toggle); |
450 | ||
451 | ||
452 | /*Set current PORT date (16-bit word)*/ | |
453 | ||
454 | #define SET_GPIO_P(name) \ | |
a2c8cfef | 455 | void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ |
1394f032 | 456 | { \ |
2b39331a | 457 | unsigned long flags; \ |
f556309e | 458 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
3b139cdb | 459 | flags = hard_local_irq_save(); \ |
f556309e MF |
460 | gpio_array[gpio_bank(gpio)]->name = arg; \ |
461 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ | |
462 | AWA_DUMMY_READ(name); \ | |
3b139cdb | 463 | hard_local_irq_restore(flags); \ |
f556309e | 464 | } \ |
2b39331a MH |
465 | } \ |
466 | EXPORT_SYMBOL(set_gpiop_ ## name); | |
1394f032 | 467 | |
2b39331a | 468 | SET_GPIO_P(data) |
1394f032 BW |
469 | SET_GPIO_P(dir) |
470 | SET_GPIO_P(inen) | |
471 | SET_GPIO_P(polar) | |
472 | SET_GPIO_P(edge) | |
473 | SET_GPIO_P(both) | |
474 | SET_GPIO_P(maska) | |
475 | SET_GPIO_P(maskb) | |
476 | ||
1394f032 | 477 | /* Get a specific bit */ |
2b39331a | 478 | #define GET_GPIO(name) \ |
a2c8cfef | 479 | unsigned short get_gpio_ ## name(unsigned gpio) \ |
2b39331a MH |
480 | { \ |
481 | unsigned long flags; \ | |
482 | unsigned short ret; \ | |
f556309e | 483 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
3b139cdb | 484 | flags = hard_local_irq_save(); \ |
f556309e MF |
485 | ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \ |
486 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ | |
487 | AWA_DUMMY_READ(name); \ | |
3b139cdb | 488 | hard_local_irq_restore(flags); \ |
f556309e | 489 | } \ |
2b39331a MH |
490 | return ret; \ |
491 | } \ | |
492 | EXPORT_SYMBOL(get_gpio_ ## name); | |
1394f032 | 493 | |
2b39331a | 494 | GET_GPIO(data) |
1394f032 BW |
495 | GET_GPIO(dir) |
496 | GET_GPIO(inen) | |
497 | GET_GPIO(polar) | |
498 | GET_GPIO(edge) | |
499 | GET_GPIO(both) | |
500 | GET_GPIO(maska) | |
501 | GET_GPIO(maskb) | |
502 | ||
1394f032 BW |
503 | /*Get current PORT date (16-bit word)*/ |
504 | ||
2b39331a | 505 | #define GET_GPIO_P(name) \ |
a2c8cfef | 506 | unsigned short get_gpiop_ ## name(unsigned gpio) \ |
2b39331a MH |
507 | { \ |
508 | unsigned long flags; \ | |
509 | unsigned short ret; \ | |
f556309e | 510 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
3b139cdb | 511 | flags = hard_local_irq_save(); \ |
f556309e MF |
512 | ret = (gpio_array[gpio_bank(gpio)]->name); \ |
513 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ | |
514 | AWA_DUMMY_READ(name); \ | |
3b139cdb | 515 | hard_local_irq_restore(flags); \ |
f556309e | 516 | } \ |
2b39331a MH |
517 | return ret; \ |
518 | } \ | |
519 | EXPORT_SYMBOL(get_gpiop_ ## name); | |
1394f032 | 520 | |
2b39331a | 521 | GET_GPIO_P(data) |
1394f032 BW |
522 | GET_GPIO_P(dir) |
523 | GET_GPIO_P(inen) | |
524 | GET_GPIO_P(polar) | |
525 | GET_GPIO_P(edge) | |
526 | GET_GPIO_P(both) | |
527 | GET_GPIO_P(maska) | |
528 | GET_GPIO_P(maskb) | |
529 | ||
1394f032 BW |
530 | |
531 | #ifdef CONFIG_PM | |
332824b8 | 532 | DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM); |
f556309e MF |
533 | |
534 | static const unsigned int sic_iwr_irqs[] = { | |
535 | #if defined(BF533_FAMILY) | |
536 | IRQ_PROG_INTB | |
537 | #elif defined(BF537_FAMILY) | |
8c054103 | 538 | IRQ_PF_INTB_WATCH, IRQ_PORTG_INTB, IRQ_PH_INTB_MAC_TX |
f556309e MF |
539 | #elif defined(BF538_FAMILY) |
540 | IRQ_PORTF_INTB | |
269647dc | 541 | #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x) |
f556309e MF |
542 | IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB |
543 | #elif defined(BF561_FAMILY) | |
544 | IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB | |
545 | #else | |
546 | # error no SIC_IWR defined | |
547 | #endif | |
548 | }; | |
549 | ||
1394f032 BW |
550 | /*********************************************************** |
551 | * | |
552 | * FUNCTIONS: Blackfin PM Setup API | |
553 | * | |
554 | * INPUTS/OUTPUTS: | |
555 | * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS | |
556 | * type - | |
557 | * PM_WAKE_RISING | |
558 | * PM_WAKE_FALLING | |
559 | * PM_WAKE_HIGH | |
560 | * PM_WAKE_LOW | |
561 | * PM_WAKE_BOTH_EDGES | |
562 | * | |
563 | * DESCRIPTION: Blackfin PM Driver API | |
564 | * | |
565 | * CAUTION: | |
566 | ************************************************************* | |
567 | * MODIFICATION HISTORY : | |
568 | **************************************************************/ | |
bb84dbf6 | 569 | int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl) |
1394f032 BW |
570 | { |
571 | unsigned long flags; | |
572 | ||
573 | if (check_gpio(gpio) < 0) | |
bb84dbf6 | 574 | return -EINVAL; |
1394f032 | 575 | |
3b139cdb | 576 | flags = hard_local_irq_save(); |
bb84dbf6 | 577 | if (ctrl) |
332824b8 | 578 | reserve(wakeup, gpio); |
1394f032 | 579 | else |
332824b8 | 580 | unreserve(wakeup, gpio); |
1394f032 | 581 | |
bb84dbf6 | 582 | set_gpio_maskb(gpio, ctrl); |
3b139cdb | 583 | hard_local_irq_restore(flags); |
2b39331a | 584 | |
cfefe3c6 | 585 | return 0; |
1394f032 BW |
586 | } |
587 | ||
bb84dbf6 | 588 | int bfin_pm_standby_ctrl(unsigned ctrl) |
1394f032 BW |
589 | { |
590 | u16 bank, mask, i; | |
591 | ||
1f83b8f1 | 592 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { |
332824b8 | 593 | mask = map_entry(wakeup, i); |
1394f032 BW |
594 | bank = gpio_bank(i); |
595 | ||
bb84dbf6 MH |
596 | if (mask) |
597 | bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl); | |
1394f032 | 598 | } |
bb84dbf6 | 599 | return 0; |
1394f032 BW |
600 | } |
601 | ||
1efc80b5 MH |
602 | void bfin_gpio_pm_hibernate_suspend(void) |
603 | { | |
604 | int i, bank; | |
605 | ||
606 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | |
607 | bank = gpio_bank(i); | |
608 | ||
269647dc | 609 | #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) |
f556309e | 610 | gpio_bank_saved[bank].fer = *port_fer[bank]; |
269647dc | 611 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) |
f556309e | 612 | gpio_bank_saved[bank].mux = *port_mux[bank]; |
1efc80b5 | 613 | #else |
f556309e MF |
614 | if (bank == 0) |
615 | gpio_bank_saved[bank].mux = bfin_read_PORT_MUX(); | |
1efc80b5 MH |
616 | #endif |
617 | #endif | |
f556309e MF |
618 | gpio_bank_saved[bank].data = gpio_array[bank]->data; |
619 | gpio_bank_saved[bank].inen = gpio_array[bank]->inen; | |
620 | gpio_bank_saved[bank].polar = gpio_array[bank]->polar; | |
621 | gpio_bank_saved[bank].dir = gpio_array[bank]->dir; | |
622 | gpio_bank_saved[bank].edge = gpio_array[bank]->edge; | |
623 | gpio_bank_saved[bank].both = gpio_array[bank]->both; | |
624 | gpio_bank_saved[bank].maska = gpio_array[bank]->maska; | |
1efc80b5 MH |
625 | } |
626 | ||
627 | AWA_DUMMY_READ(maska); | |
628 | } | |
629 | ||
630 | void bfin_gpio_pm_hibernate_restore(void) | |
631 | { | |
632 | int i, bank; | |
633 | ||
634 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | |
f556309e | 635 | bank = gpio_bank(i); |
1efc80b5 | 636 | |
269647dc MF |
637 | #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) |
638 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) | |
f556309e | 639 | *port_mux[bank] = gpio_bank_saved[bank].mux; |
1efc80b5 | 640 | #else |
f556309e MF |
641 | if (bank == 0) |
642 | bfin_write_PORT_MUX(gpio_bank_saved[bank].mux); | |
1efc80b5 | 643 | #endif |
f556309e | 644 | *port_fer[bank] = gpio_bank_saved[bank].fer; |
1efc80b5 | 645 | #endif |
f556309e | 646 | gpio_array[bank]->inen = gpio_bank_saved[bank].inen; |
c03c2a87 MH |
647 | gpio_array[bank]->data_set = gpio_bank_saved[bank].data |
648 | & gpio_bank_saved[bank].dir; | |
f556309e MF |
649 | gpio_array[bank]->dir = gpio_bank_saved[bank].dir; |
650 | gpio_array[bank]->polar = gpio_bank_saved[bank].polar; | |
651 | gpio_array[bank]->edge = gpio_bank_saved[bank].edge; | |
652 | gpio_array[bank]->both = gpio_bank_saved[bank].both; | |
f556309e | 653 | gpio_array[bank]->maska = gpio_bank_saved[bank].maska; |
1efc80b5 MH |
654 | } |
655 | AWA_DUMMY_READ(maska); | |
656 | } | |
657 | ||
658 | ||
1394f032 | 659 | #endif |
269647dc | 660 | #else /* CONFIG_BF54x */ |
1efc80b5 MH |
661 | #ifdef CONFIG_PM |
662 | ||
bb84dbf6 | 663 | int bfin_pm_standby_ctrl(unsigned ctrl) |
1efc80b5 MH |
664 | { |
665 | return 0; | |
666 | } | |
667 | ||
1efc80b5 MH |
668 | void bfin_gpio_pm_hibernate_suspend(void) |
669 | { | |
670 | int i, bank; | |
671 | ||
672 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | |
673 | bank = gpio_bank(i); | |
674 | ||
f556309e MF |
675 | gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer; |
676 | gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux; | |
677 | gpio_bank_saved[bank].data = gpio_array[bank]->data; | |
f556309e MF |
678 | gpio_bank_saved[bank].inen = gpio_array[bank]->inen; |
679 | gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set; | |
1efc80b5 MH |
680 | } |
681 | } | |
682 | ||
683 | void bfin_gpio_pm_hibernate_restore(void) | |
684 | { | |
685 | int i, bank; | |
686 | ||
687 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | |
f556309e MF |
688 | bank = gpio_bank(i); |
689 | ||
690 | gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux; | |
691 | gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer; | |
692 | gpio_array[bank]->inen = gpio_bank_saved[bank].inen; | |
693 | gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir; | |
694 | gpio_array[bank]->data_set = gpio_bank_saved[bank].data | |
695 | | gpio_bank_saved[bank].dir; | |
1efc80b5 MH |
696 | } |
697 | } | |
698 | #endif | |
fac3cf43 | 699 | |
a2c8cfef | 700 | unsigned short get_gpio_dir(unsigned gpio) |
fac3cf43 | 701 | { |
f556309e | 702 | return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio))); |
fac3cf43 MH |
703 | } |
704 | EXPORT_SYMBOL(get_gpio_dir); | |
705 | ||
269647dc | 706 | #endif /* CONFIG_BF54x */ |
1394f032 | 707 | |
d2b11a46 MH |
708 | /*********************************************************** |
709 | * | |
812ae98f | 710 | * FUNCTIONS: Blackfin Peripheral Resource Allocation |
d2b11a46 MH |
711 | * and PortMux Setup |
712 | * | |
713 | * INPUTS/OUTPUTS: | |
714 | * per Peripheral Identifier | |
715 | * label String | |
716 | * | |
717 | * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API | |
718 | * | |
719 | * CAUTION: | |
720 | ************************************************************* | |
721 | * MODIFICATION HISTORY : | |
722 | **************************************************************/ | |
723 | ||
d2b11a46 MH |
724 | int peripheral_request(unsigned short per, const char *label) |
725 | { | |
726 | unsigned long flags; | |
727 | unsigned short ident = P_IDENT(per); | |
728 | ||
729 | /* | |
730 | * Don't cares are pins with only one dedicated function | |
731 | */ | |
c58c2140 | 732 | |
d2b11a46 MH |
733 | if (per & P_DONTCARE) |
734 | return 0; | |
735 | ||
736 | if (!(per & P_DEFINED)) | |
737 | return -ENODEV; | |
738 | ||
89e84eea BS |
739 | BUG_ON(ident >= MAX_RESOURCES); |
740 | ||
3b139cdb | 741 | flags = hard_local_irq_save(); |
d2b11a46 | 742 | |
6a87d29b MF |
743 | /* If a pin can be muxed as either GPIO or peripheral, make |
744 | * sure it is not already a GPIO pin when we request it. | |
745 | */ | |
332824b8 | 746 | if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) { |
d6879c58 RG |
747 | if (system_state == SYSTEM_BOOTING) |
748 | dump_stack(); | |
d2b11a46 | 749 | printk(KERN_ERR |
6c7ec0ec | 750 | "%s: Peripheral %d is already reserved as GPIO by %s !\n", |
b85d858b | 751 | __func__, ident, get_label(ident)); |
3b139cdb | 752 | hard_local_irq_restore(flags); |
d2b11a46 MH |
753 | return -EBUSY; |
754 | } | |
755 | ||
332824b8 | 756 | if (unlikely(is_reserved(peri, ident, 1))) { |
d2b11a46 | 757 | |
d171c233 MF |
758 | /* |
759 | * Pin functions like AMC address strobes my | |
760 | * be requested and used by several drivers | |
761 | */ | |
d2b11a46 | 762 | |
269647dc | 763 | #ifdef CONFIG_BF54x |
f556309e | 764 | if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) { |
6c7ec0ec MF |
765 | #else |
766 | if (!(per & P_MAYSHARE)) { | |
767 | #endif | |
d171c233 MF |
768 | /* |
769 | * Allow that the identical pin function can | |
770 | * be requested from the same driver twice | |
771 | */ | |
d2b11a46 | 772 | |
d171c233 MF |
773 | if (cmp_label(ident, label) == 0) |
774 | goto anyway; | |
d2b11a46 | 775 | |
d6879c58 RG |
776 | if (system_state == SYSTEM_BOOTING) |
777 | dump_stack(); | |
d2b11a46 MH |
778 | printk(KERN_ERR |
779 | "%s: Peripheral %d function %d is already reserved by %s !\n", | |
b85d858b | 780 | __func__, ident, P_FUNCT2MUX(per), get_label(ident)); |
3b139cdb | 781 | hard_local_irq_restore(flags); |
d2b11a46 MH |
782 | return -EBUSY; |
783 | } | |
784 | } | |
785 | ||
05bbec38 | 786 | if (unlikely(portmux_group_check(per))) { |
787 | hard_local_irq_restore(flags); | |
788 | return -EBUSY; | |
789 | } | |
d171c233 | 790 | anyway: |
332824b8 | 791 | reserve(peri, ident); |
d2b11a46 | 792 | |
f556309e | 793 | portmux_setup(per); |
c58c2140 MH |
794 | port_setup(ident, PERIPHERAL_USAGE); |
795 | ||
3b139cdb | 796 | hard_local_irq_restore(flags); |
c58c2140 MH |
797 | set_label(ident, label); |
798 | ||
799 | return 0; | |
800 | } | |
801 | EXPORT_SYMBOL(peripheral_request); | |
802 | ||
68179371 | 803 | int peripheral_request_list(const unsigned short per[], const char *label) |
c58c2140 MH |
804 | { |
805 | u16 cnt; | |
806 | int ret; | |
807 | ||
808 | for (cnt = 0; per[cnt] != 0; cnt++) { | |
314c98d5 | 809 | |
c58c2140 | 810 | ret = peripheral_request(per[cnt], label); |
314c98d5 MH |
811 | |
812 | if (ret < 0) { | |
d171c233 | 813 | for ( ; cnt > 0; cnt--) |
314c98d5 | 814 | peripheral_free(per[cnt - 1]); |
d171c233 MF |
815 | |
816 | return ret; | |
314c98d5 | 817 | } |
c58c2140 MH |
818 | } |
819 | ||
820 | return 0; | |
821 | } | |
822 | EXPORT_SYMBOL(peripheral_request_list); | |
823 | ||
824 | void peripheral_free(unsigned short per) | |
825 | { | |
826 | unsigned long flags; | |
827 | unsigned short ident = P_IDENT(per); | |
828 | ||
829 | if (per & P_DONTCARE) | |
830 | return; | |
831 | ||
832 | if (!(per & P_DEFINED)) | |
833 | return; | |
834 | ||
3b139cdb | 835 | flags = hard_local_irq_save(); |
c58c2140 | 836 | |
332824b8 | 837 | if (unlikely(!is_reserved(peri, ident, 0))) { |
3b139cdb | 838 | hard_local_irq_restore(flags); |
c58c2140 MH |
839 | return; |
840 | } | |
841 | ||
d171c233 | 842 | if (!(per & P_MAYSHARE)) |
c58c2140 | 843 | port_setup(ident, GPIO_USAGE); |
c58c2140 | 844 | |
332824b8 | 845 | unreserve(peri, ident); |
c58c2140 | 846 | |
2acde902 MH |
847 | set_label(ident, "free"); |
848 | ||
3b139cdb | 849 | hard_local_irq_restore(flags); |
c58c2140 MH |
850 | } |
851 | EXPORT_SYMBOL(peripheral_free); | |
852 | ||
68179371 | 853 | void peripheral_free_list(const unsigned short per[]) |
c58c2140 MH |
854 | { |
855 | u16 cnt; | |
d171c233 | 856 | for (cnt = 0; per[cnt] != 0; cnt++) |
c58c2140 | 857 | peripheral_free(per[cnt]); |
c58c2140 MH |
858 | } |
859 | EXPORT_SYMBOL(peripheral_free_list); | |
860 | ||
1394f032 BW |
861 | /*********************************************************** |
862 | * | |
863 | * FUNCTIONS: Blackfin GPIO Driver | |
864 | * | |
865 | * INPUTS/OUTPUTS: | |
d2b11a46 MH |
866 | * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS |
867 | * label String | |
1394f032 BW |
868 | * |
869 | * DESCRIPTION: Blackfin GPIO Driver API | |
870 | * | |
871 | * CAUTION: | |
872 | ************************************************************* | |
873 | * MODIFICATION HISTORY : | |
874 | **************************************************************/ | |
875 | ||
a4f0b32c | 876 | int bfin_gpio_request(unsigned gpio, const char *label) |
1394f032 BW |
877 | { |
878 | unsigned long flags; | |
879 | ||
880 | if (check_gpio(gpio) < 0) | |
881 | return -EINVAL; | |
882 | ||
3b139cdb | 883 | flags = hard_local_irq_save(); |
1394f032 | 884 | |
2acde902 MH |
885 | /* |
886 | * Allow that the identical GPIO can | |
887 | * be requested from the same driver twice | |
888 | * Do nothing and return - | |
889 | */ | |
890 | ||
891 | if (cmp_label(gpio, label) == 0) { | |
3b139cdb | 892 | hard_local_irq_restore(flags); |
2acde902 MH |
893 | return 0; |
894 | } | |
895 | ||
332824b8 | 896 | if (unlikely(is_reserved(gpio, gpio, 1))) { |
d6879c58 RG |
897 | if (system_state == SYSTEM_BOOTING) |
898 | dump_stack(); | |
d2b11a46 | 899 | printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n", |
9570ff4a | 900 | gpio, get_label(gpio)); |
3b139cdb | 901 | hard_local_irq_restore(flags); |
d2b11a46 MH |
902 | return -EBUSY; |
903 | } | |
332824b8 | 904 | if (unlikely(is_reserved(peri, gpio, 1))) { |
d6879c58 RG |
905 | if (system_state == SYSTEM_BOOTING) |
906 | dump_stack(); | |
d2b11a46 MH |
907 | printk(KERN_ERR |
908 | "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", | |
909 | gpio, get_label(gpio)); | |
3b139cdb | 910 | hard_local_irq_restore(flags); |
1394f032 BW |
911 | return -EBUSY; |
912 | } | |
332824b8 | 913 | if (unlikely(is_reserved(gpio_irq, gpio, 1))) { |
9570ff4a GY |
914 | printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!" |
915 | " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio); | |
a2be3931 | 916 | } |
269647dc | 917 | #ifndef CONFIG_BF54x |
a2be3931 MH |
918 | else { /* Reset POLAR setting when acquiring a gpio for the first time */ |
919 | set_gpio_polar(gpio, 0); | |
920 | } | |
921 | #endif | |
d2b11a46 | 922 | |
332824b8 | 923 | reserve(gpio, gpio); |
9570ff4a | 924 | set_label(gpio, label); |
1394f032 | 925 | |
3b139cdb | 926 | hard_local_irq_restore(flags); |
1394f032 BW |
927 | |
928 | port_setup(gpio, GPIO_USAGE); | |
929 | ||
930 | return 0; | |
931 | } | |
a4f0b32c | 932 | EXPORT_SYMBOL(bfin_gpio_request); |
1394f032 | 933 | |
a4f0b32c | 934 | void bfin_gpio_free(unsigned gpio) |
1394f032 BW |
935 | { |
936 | unsigned long flags; | |
937 | ||
938 | if (check_gpio(gpio) < 0) | |
939 | return; | |
940 | ||
45c4f2a0 UKK |
941 | might_sleep(); |
942 | ||
3b139cdb | 943 | flags = hard_local_irq_save(); |
1394f032 | 944 | |
332824b8 | 945 | if (unlikely(!is_reserved(gpio, gpio, 0))) { |
d6879c58 RG |
946 | if (system_state == SYSTEM_BOOTING) |
947 | dump_stack(); | |
f85c4abd | 948 | gpio_error(gpio); |
3b139cdb | 949 | hard_local_irq_restore(flags); |
1394f032 BW |
950 | return; |
951 | } | |
952 | ||
332824b8 | 953 | unreserve(gpio, gpio); |
1394f032 | 954 | |
2acde902 MH |
955 | set_label(gpio, "free"); |
956 | ||
3b139cdb | 957 | hard_local_irq_restore(flags); |
1394f032 | 958 | } |
a4f0b32c | 959 | EXPORT_SYMBOL(bfin_gpio_free); |
1394f032 | 960 | |
621dd247 | 961 | #ifdef BFIN_SPECIAL_GPIO_BANKS |
332824b8 | 962 | DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES)); |
621dd247 MH |
963 | |
964 | int bfin_special_gpio_request(unsigned gpio, const char *label) | |
965 | { | |
966 | unsigned long flags; | |
967 | ||
3b139cdb | 968 | flags = hard_local_irq_save(); |
621dd247 MH |
969 | |
970 | /* | |
971 | * Allow that the identical GPIO can | |
972 | * be requested from the same driver twice | |
973 | * Do nothing and return - | |
974 | */ | |
975 | ||
976 | if (cmp_label(gpio, label) == 0) { | |
3b139cdb | 977 | hard_local_irq_restore(flags); |
621dd247 MH |
978 | return 0; |
979 | } | |
980 | ||
332824b8 | 981 | if (unlikely(is_reserved(special_gpio, gpio, 1))) { |
3b139cdb | 982 | hard_local_irq_restore(flags); |
621dd247 MH |
983 | printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n", |
984 | gpio, get_label(gpio)); | |
985 | ||
986 | return -EBUSY; | |
987 | } | |
332824b8 | 988 | if (unlikely(is_reserved(peri, gpio, 1))) { |
3b139cdb | 989 | hard_local_irq_restore(flags); |
621dd247 MH |
990 | printk(KERN_ERR |
991 | "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", | |
992 | gpio, get_label(gpio)); | |
993 | ||
994 | return -EBUSY; | |
995 | } | |
996 | ||
332824b8 MF |
997 | reserve(special_gpio, gpio); |
998 | reserve(peri, gpio); | |
621dd247 MH |
999 | |
1000 | set_label(gpio, label); | |
3b139cdb | 1001 | hard_local_irq_restore(flags); |
621dd247 MH |
1002 | port_setup(gpio, GPIO_USAGE); |
1003 | ||
1004 | return 0; | |
1005 | } | |
1006 | EXPORT_SYMBOL(bfin_special_gpio_request); | |
1007 | ||
1008 | void bfin_special_gpio_free(unsigned gpio) | |
1009 | { | |
1010 | unsigned long flags; | |
1011 | ||
1012 | might_sleep(); | |
1013 | ||
3b139cdb | 1014 | flags = hard_local_irq_save(); |
621dd247 | 1015 | |
332824b8 | 1016 | if (unlikely(!is_reserved(special_gpio, gpio, 0))) { |
621dd247 | 1017 | gpio_error(gpio); |
3b139cdb | 1018 | hard_local_irq_restore(flags); |
621dd247 MH |
1019 | return; |
1020 | } | |
1021 | ||
332824b8 MF |
1022 | unreserve(special_gpio, gpio); |
1023 | unreserve(peri, gpio); | |
621dd247 | 1024 | set_label(gpio, "free"); |
3b139cdb | 1025 | hard_local_irq_restore(flags); |
621dd247 MH |
1026 | } |
1027 | EXPORT_SYMBOL(bfin_special_gpio_free); | |
1028 | #endif | |
1029 | ||
1030 | ||
9570ff4a GY |
1031 | int bfin_gpio_irq_request(unsigned gpio, const char *label) |
1032 | { | |
1033 | unsigned long flags; | |
1034 | ||
1035 | if (check_gpio(gpio) < 0) | |
1036 | return -EINVAL; | |
1037 | ||
3b139cdb | 1038 | flags = hard_local_irq_save(); |
9570ff4a | 1039 | |
332824b8 | 1040 | if (unlikely(is_reserved(peri, gpio, 1))) { |
d6879c58 RG |
1041 | if (system_state == SYSTEM_BOOTING) |
1042 | dump_stack(); | |
9570ff4a GY |
1043 | printk(KERN_ERR |
1044 | "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", | |
1045 | gpio, get_label(gpio)); | |
3b139cdb | 1046 | hard_local_irq_restore(flags); |
9570ff4a GY |
1047 | return -EBUSY; |
1048 | } | |
332824b8 | 1049 | if (unlikely(is_reserved(gpio, gpio, 1))) |
9570ff4a GY |
1050 | printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! " |
1051 | "(Documentation/blackfin/bfin-gpio-notes.txt)\n", | |
1052 | gpio, get_label(gpio)); | |
1053 | ||
332824b8 | 1054 | reserve(gpio_irq, gpio); |
9570ff4a GY |
1055 | set_label(gpio, label); |
1056 | ||
3b139cdb | 1057 | hard_local_irq_restore(flags); |
9570ff4a GY |
1058 | |
1059 | port_setup(gpio, GPIO_USAGE); | |
1060 | ||
1061 | return 0; | |
1062 | } | |
1063 | ||
1064 | void bfin_gpio_irq_free(unsigned gpio) | |
1065 | { | |
1066 | unsigned long flags; | |
1067 | ||
1068 | if (check_gpio(gpio) < 0) | |
1069 | return; | |
1070 | ||
3b139cdb | 1071 | flags = hard_local_irq_save(); |
9570ff4a | 1072 | |
332824b8 | 1073 | if (unlikely(!is_reserved(gpio_irq, gpio, 0))) { |
d6879c58 RG |
1074 | if (system_state == SYSTEM_BOOTING) |
1075 | dump_stack(); | |
9570ff4a | 1076 | gpio_error(gpio); |
3b139cdb | 1077 | hard_local_irq_restore(flags); |
9570ff4a GY |
1078 | return; |
1079 | } | |
1080 | ||
332824b8 | 1081 | unreserve(gpio_irq, gpio); |
9570ff4a GY |
1082 | |
1083 | set_label(gpio, "free"); | |
1084 | ||
3b139cdb | 1085 | hard_local_irq_restore(flags); |
9570ff4a GY |
1086 | } |
1087 | ||
f556309e MF |
1088 | static inline void __bfin_gpio_direction_input(unsigned gpio) |
1089 | { | |
269647dc | 1090 | #ifdef CONFIG_BF54x |
f556309e MF |
1091 | gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio); |
1092 | #else | |
1093 | gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); | |
1094 | #endif | |
1095 | gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio); | |
1096 | } | |
1097 | ||
a4f0b32c | 1098 | int bfin_gpio_direction_input(unsigned gpio) |
d2b11a46 MH |
1099 | { |
1100 | unsigned long flags; | |
1101 | ||
332824b8 | 1102 | if (unlikely(!is_reserved(gpio, gpio, 0))) { |
acbcd263 MH |
1103 | gpio_error(gpio); |
1104 | return -EINVAL; | |
1105 | } | |
1106 | ||
3b139cdb | 1107 | flags = hard_local_irq_save(); |
f556309e MF |
1108 | __bfin_gpio_direction_input(gpio); |
1109 | AWA_DUMMY_READ(inen); | |
3b139cdb | 1110 | hard_local_irq_restore(flags); |
acbcd263 MH |
1111 | |
1112 | return 0; | |
d2b11a46 | 1113 | } |
a4f0b32c | 1114 | EXPORT_SYMBOL(bfin_gpio_direction_input); |
d2b11a46 | 1115 | |
f556309e | 1116 | void bfin_gpio_irq_prepare(unsigned gpio) |
d2b11a46 | 1117 | { |
269647dc | 1118 | #ifdef CONFIG_BF54x |
d2b11a46 | 1119 | unsigned long flags; |
f556309e | 1120 | #endif |
d2b11a46 | 1121 | |
f556309e | 1122 | port_setup(gpio, GPIO_USAGE); |
d2b11a46 | 1123 | |
269647dc | 1124 | #ifdef CONFIG_BF54x |
3b139cdb | 1125 | flags = hard_local_irq_save(); |
f556309e | 1126 | __bfin_gpio_direction_input(gpio); |
3b139cdb | 1127 | hard_local_irq_restore(flags); |
f556309e | 1128 | #endif |
d2b11a46 | 1129 | } |
d2b11a46 | 1130 | |
a4f0b32c | 1131 | void bfin_gpio_set_value(unsigned gpio, int arg) |
d2b11a46 MH |
1132 | { |
1133 | if (arg) | |
f556309e | 1134 | gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); |
d2b11a46 | 1135 | else |
f556309e | 1136 | gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); |
d2b11a46 | 1137 | } |
a4f0b32c | 1138 | EXPORT_SYMBOL(bfin_gpio_set_value); |
d2b11a46 | 1139 | |
f556309e | 1140 | int bfin_gpio_direction_output(unsigned gpio, int value) |
affee2b2 MH |
1141 | { |
1142 | unsigned long flags; | |
1143 | ||
332824b8 | 1144 | if (unlikely(!is_reserved(gpio, gpio, 0))) { |
f556309e MF |
1145 | gpio_error(gpio); |
1146 | return -EINVAL; | |
1147 | } | |
affee2b2 | 1148 | |
3b139cdb | 1149 | flags = hard_local_irq_save(); |
affee2b2 | 1150 | |
f556309e MF |
1151 | gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); |
1152 | gpio_set_value(gpio, value); | |
269647dc | 1153 | #ifdef CONFIG_BF54x |
f556309e | 1154 | gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio); |
d2b11a46 | 1155 | #else |
f556309e MF |
1156 | gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio); |
1157 | #endif | |
1158 | ||
1159 | AWA_DUMMY_READ(dir); | |
3b139cdb | 1160 | hard_local_irq_restore(flags); |
f556309e MF |
1161 | |
1162 | return 0; | |
1163 | } | |
1164 | EXPORT_SYMBOL(bfin_gpio_direction_output); | |
d2b11a46 | 1165 | |
a4f0b32c | 1166 | int bfin_gpio_get_value(unsigned gpio) |
803a8d2a | 1167 | { |
269647dc | 1168 | #ifdef CONFIG_BF54x |
f556309e MF |
1169 | return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio))); |
1170 | #else | |
803a8d2a | 1171 | unsigned long flags; |
803a8d2a MH |
1172 | |
1173 | if (unlikely(get_gpio_edge(gpio))) { | |
f556309e | 1174 | int ret; |
3b139cdb | 1175 | flags = hard_local_irq_save(); |
803a8d2a MH |
1176 | set_gpio_edge(gpio, 0); |
1177 | ret = get_gpio_data(gpio); | |
1178 | set_gpio_edge(gpio, 1); | |
3b139cdb | 1179 | hard_local_irq_restore(flags); |
803a8d2a MH |
1180 | return ret; |
1181 | } else | |
1182 | return get_gpio_data(gpio); | |
f556309e | 1183 | #endif |
803a8d2a | 1184 | } |
a4f0b32c | 1185 | EXPORT_SYMBOL(bfin_gpio_get_value); |
803a8d2a | 1186 | |
168f1212 MF |
1187 | /* If we are booting from SPI and our board lacks a strong enough pull up, |
1188 | * the core can reset and execute the bootrom faster than the resistor can | |
1189 | * pull the signal logically high. To work around this (common) error in | |
1190 | * board design, we explicitly set the pin back to GPIO mode, force /CS | |
1191 | * high, and wait for the electrons to do their thing. | |
1192 | * | |
1193 | * This function only makes sense to be called from reset code, but it | |
1194 | * lives here as we need to force all the GPIO states w/out going through | |
1195 | * BUG() checks and such. | |
1196 | */ | |
b52dae31 | 1197 | void bfin_reset_boot_spi_cs(unsigned short pin) |
168f1212 | 1198 | { |
b52dae31 | 1199 | unsigned short gpio = P_IDENT(pin); |
4d5f4ed3 | 1200 | port_setup(gpio, GPIO_USAGE); |
f556309e | 1201 | gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); |
a2c8cfef | 1202 | AWA_DUMMY_READ(data_set); |
168f1212 MF |
1203 | udelay(1); |
1204 | } | |
d2b11a46 | 1205 | |
1545a111 MF |
1206 | #if defined(CONFIG_PROC_FS) |
1207 | static int gpio_proc_read(char *buf, char **start, off_t offset, | |
1208 | int len, int *unused_i, void *unused_v) | |
1209 | { | |
9570ff4a | 1210 | int c, irq, gpio, outlen = 0; |
1545a111 MF |
1211 | |
1212 | for (c = 0; c < MAX_RESOURCES; c++) { | |
332824b8 MF |
1213 | irq = is_reserved(gpio_irq, c, 1); |
1214 | gpio = is_reserved(gpio, c, 1); | |
9570ff4a GY |
1215 | if (!check_gpio(c) && (gpio || irq)) |
1216 | len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c, | |
1217 | get_label(c), (gpio && irq) ? " *" : "", | |
1218 | get_gpio_dir(c) ? "OUTPUT" : "INPUT"); | |
332824b8 | 1219 | else if (is_reserved(peri, c, 1)) |
8eb3e3bf | 1220 | len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c)); |
1545a111 MF |
1221 | else |
1222 | continue; | |
1223 | buf += len; | |
1224 | outlen += len; | |
1225 | } | |
1226 | return outlen; | |
1227 | } | |
1228 | ||
1229 | static __init int gpio_register_proc(void) | |
1230 | { | |
1231 | struct proc_dir_entry *proc_gpio; | |
1232 | ||
1233 | proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL); | |
1234 | if (proc_gpio) | |
1235 | proc_gpio->read_proc = gpio_proc_read; | |
1236 | return proc_gpio != NULL; | |
1237 | } | |
1545a111 MF |
1238 | __initcall(gpio_register_proc); |
1239 | #endif | |
a4f0b32c MH |
1240 | |
1241 | #ifdef CONFIG_GPIOLIB | |
f9c29e87 | 1242 | static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio) |
a4f0b32c MH |
1243 | { |
1244 | return bfin_gpio_direction_input(gpio); | |
1245 | } | |
1246 | ||
f9c29e87 | 1247 | static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level) |
a4f0b32c MH |
1248 | { |
1249 | return bfin_gpio_direction_output(gpio, level); | |
1250 | } | |
1251 | ||
f9c29e87 | 1252 | static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio) |
a4f0b32c MH |
1253 | { |
1254 | return bfin_gpio_get_value(gpio); | |
1255 | } | |
1256 | ||
f9c29e87 | 1257 | static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value) |
a4f0b32c | 1258 | { |
a4f0b32c | 1259 | return bfin_gpio_set_value(gpio, value); |
a4f0b32c MH |
1260 | } |
1261 | ||
f9c29e87 | 1262 | static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio) |
a4f0b32c MH |
1263 | { |
1264 | return bfin_gpio_request(gpio, chip->label); | |
1265 | } | |
1266 | ||
f9c29e87 | 1267 | static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio) |
a4f0b32c MH |
1268 | { |
1269 | return bfin_gpio_free(gpio); | |
1270 | } | |
1271 | ||
f9c29e87 | 1272 | static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) |
7f4f69f9 JE |
1273 | { |
1274 | return gpio + GPIO_IRQ_BASE; | |
1275 | } | |
1276 | ||
a4f0b32c | 1277 | static struct gpio_chip bfin_chip = { |
edd07992 | 1278 | .label = "BFIN-GPIO", |
a4f0b32c MH |
1279 | .direction_input = bfin_gpiolib_direction_input, |
1280 | .get = bfin_gpiolib_get_value, | |
1281 | .direction_output = bfin_gpiolib_direction_output, | |
1282 | .set = bfin_gpiolib_set_value, | |
1283 | .request = bfin_gpiolib_gpio_request, | |
1284 | .free = bfin_gpiolib_gpio_free, | |
7f4f69f9 | 1285 | .to_irq = bfin_gpiolib_gpio_to_irq, |
a4f0b32c MH |
1286 | .base = 0, |
1287 | .ngpio = MAX_BLACKFIN_GPIOS, | |
1288 | }; | |
1289 | ||
1290 | static int __init bfin_gpiolib_setup(void) | |
1291 | { | |
1292 | return gpiochip_add(&bfin_chip); | |
1293 | } | |
1294 | arch_initcall(bfin_gpiolib_setup); | |
1295 | #endif |