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Merge tag 'v3.2-rc2' into staging/for_v3.3
[mirror_ubuntu-artful-kernel.git] / arch / blackfin / mach-bf533 / boards / stamp.c
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1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
de8c43f2 13#include <linux/mtd/physmap.h>
1394f032
BW		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
2120b68f 16#include <linux/spi/mmc_spi.h>
1394f032 17#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 18#include <linux/usb/isp1362.h>
1394f032 19#endif
1f83b8f1 20#include <linux/irq.h>
81d9c7f2 21#include <linux/i2c.h>
c6c4d7bb 22#include <asm/dma.h>
1394f032 23#include <asm/bfin5xx_spi.h>
c6c4d7bb 24#include <asm/reboot.h>
5d448dd5 25#include <asm/portmux.h>
14b03204 26#include <asm/dpmc.h>
1394f032
BW		 27
28/*
29 * Name the Board for the /proc/cpuinfo
30 */
fe85cad2 31const char bfin_board_name[] = "ADI BF533-STAMP";
1394f032
BW		 32
33#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
34static struct platform_device rtc_device = {
35 .name = "rtc-bfin",
36 .id = -1,
37};
38#endif
39
40/*
41 * Driver needs to know address, irq and flag pin.
42 */
43#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 44#include <linux/smc91x.h>
45
46static struct smc91x_platdata smc91x_info = {
47 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
48 .leda = RPC_LED_100_10,
49 .ledb = RPC_LED_TX_RX,
50};
51
1394f032
BW		 52static struct resource smc91x_resources[] = {
53 {
54 .name = "smc91x-regs",
55 .start = 0x20300300,
56 .end = 0x20300300 + 16,
57 .flags = IORESOURCE_MEM,
1f83b8f1 58 }, {
1394f032
BW		 59 .start = IRQ_PF7,
60 .end = IRQ_PF7,
61 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
62 },
63};
64
65static struct platform_device smc91x_device = {
66 .name = "smc91x",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(smc91x_resources),
69 .resource = smc91x_resources,
61f09b5a
MH		 70 .dev = {
71 .platform_data = &smc91x_info,
72 },
1394f032
BW		 73};
74#endif
75
76#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
77static struct resource net2272_bfin_resources[] = {
78 {
79 .start = 0x20300000,
80 .end = 0x20300000 + 0x100,
81 .flags = IORESOURCE_MEM,
9be8631b
MF		 82 }, {
83 .start = 1,
84 .flags = IORESOURCE_BUS,
1f83b8f1 85 }, {
1394f032
BW		 86 .start = IRQ_PF10,
87 .end = IRQ_PF10,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
89 },
90};
91
92static struct platform_device net2272_bfin_device = {
93 .name = "net2272",
94 .id = -1,
95 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
96 .resource = net2272_bfin_resources,
97};
98#endif
99
9cd9c616 100#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
de8c43f2
MF		 101static struct mtd_partition stamp_partitions[] = {
102 {
aa582977 103 .name = "bootloader(nor)",
edf05641 104 .size = 0x40000,
de8c43f2
MF		 105 .offset = 0,
106 }, {
aa582977 107 .name = "linux kernel(nor)",
6ecb5b6d 108 .size = 0x180000,
de8c43f2
MF		 109 .offset = MTDPART_OFS_APPEND,
110 }, {
aa582977 111 .name = "file system(nor)",
de8c43f2
MF		 112 .size = MTDPART_SIZ_FULL,
113 .offset = MTDPART_OFS_APPEND,
114 }
115};
116
117static struct physmap_flash_data stamp_flash_data = {
118 .width = 2,
119 .parts = stamp_partitions,
120 .nr_parts = ARRAY_SIZE(stamp_partitions),
121};
122
123static struct resource stamp_flash_resource[] = {
124 {
125 .name = "cfi_probe",
126 .start = 0x20000000,
127 .end = 0x203fffff,
128 .flags = IORESOURCE_MEM,
129 }, {
9cd9c616
MF		 130 .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */
131 .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */
132 .flags = IORESOURCE_MEM,
133 }, {
134 .start = GPIO_PF0,
de8c43f2
MF		 135 .flags = IORESOURCE_IRQ,
136 }
137};
138
139static struct platform_device stamp_flash_device = {
9cd9c616 140 .name = "bfin-async-flash",
de8c43f2
MF		 141 .id = 0,
142 .dev = {
143 .platform_data = &stamp_flash_data,
144 },
145 .num_resources = ARRAY_SIZE(stamp_flash_resource),
146 .resource = stamp_flash_resource,
147};
793dc27b 148#endif
de8c43f2 149
1394f032
BW		 150#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
151static struct mtd_partition bfin_spi_flash_partitions[] = {
152 {
aa582977 153 .name = "bootloader(spi)",
edf05641 154 .size = 0x00040000,
1394f032
BW		 155 .offset = 0,
156 .mask_flags = MTD_CAP_ROM
1f83b8f1 157 }, {
aa582977 158 .name = "linux kernel(spi)",
6ecb5b6d 159 .size = 0x180000,
edf05641 160 .offset = MTDPART_OFS_APPEND,
1f83b8f1 161 }, {
aa582977 162 .name = "file system(spi)",
edf05641
MF		 163 .size = MTDPART_SIZ_FULL,
164 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 165 }
166};
167
168static struct flash_platform_data bfin_spi_flash_data = {
169 .name = "m25p80",
170 .parts = bfin_spi_flash_partitions,
171 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
172 .type = "m25p64",
173};
174
175/* SPI flash chip (m25p64) */
176static struct bfin5xx_spi_chip spi_flash_chip_info = {
177 .enable_dma = 0, /* use dma transfer with this chip*/
6e668936
MH		 178};
179#endif
180
2120b68f
YL		 181#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
182#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
183static int bfin_mmc_spi_init(struct device *dev,
184 irqreturn_t (*detect_int)(int, void *), void *data)
185{
186 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
187 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
188 "mmc-spi-detect", data);
189}
190
191static void bfin_mmc_spi_exit(struct device *dev, void *data)
192{
193 free_irq(MMC_SPI_CARD_DETECT_INT, data);
194}
195
196static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
197 .init = bfin_mmc_spi_init,
198 .exit = bfin_mmc_spi_exit,
199 .detect_delay = 100, /* msecs */
200};
201
202static struct bfin5xx_spi_chip mmc_spi_chip_info = {
203 .enable_dma = 0,
2120b68f
YL		 204 .pio_interrupt = 0,
205};
206#endif
207
1394f032
BW		 208static struct spi_board_info bfin_spi_board_info[] __initdata = {
209#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
210 {
211 /* the modalias must be the same as spi device driver name */
212 .modalias = "m25p80", /* Name of spi_driver for this device */
213 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 214 .bus_num = 0, /* Framework bus number */
1394f032
BW		 215 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
216 .platform_data = &bfin_spi_flash_data,
217 .controller_data = &spi_flash_chip_info,
218 .mode = SPI_MODE_3,
219 },
220#endif
221
7ba80063 222#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032 223 {
7ba80063 224 .modalias = "ad183x",
858c5e9a 225 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 226 .bus_num = 0,
7ba80063
BS		 227 .chip_select = 4,
228 .platform_data = "ad1836", /* only includes chip name for the moment */
7ba80063 229 .mode = SPI_MODE_3,
1394f032
BW		 230 },
231#endif
232
6e668936
MH		 233#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
234 {
235 .modalias = "spidev",
236 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
237 .bus_num = 0,
238 .chip_select = 1,
6e668936
MH		 239 },
240#endif
2120b68f
YL		 241#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
242 {
243 .modalias = "mmc_spi",
244 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
245 .bus_num = 0,
246 .chip_select = 4,
247 .platform_data = &bfin_mmc_spi_pdata,
248 .controller_data = &mmc_spi_chip_info,
249 .mode = SPI_MODE_3,
250 },
251#endif
1394f032
BW		 252};
253
5bda2723 254#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb
BW		 255/* SPI (0) */
256static struct resource bfin_spi0_resource[] = {
257 [0] = {
258 .start = SPI0_REGBASE,
259 .end = SPI0_REGBASE + 0xFF,
260 .flags = IORESOURCE_MEM,
261 },
262 [1] = {
263 .start = CH_SPI,
264 .end = CH_SPI,
53122693
YL		 265 .flags = IORESOURCE_DMA,
266 },
267 [2] = {
268 .start = IRQ_SPI,
269 .end = IRQ_SPI,
c6c4d7bb
BW		 270 .flags = IORESOURCE_IRQ,
271 }
272};
273
1394f032 274/* SPI controller data */
c6c4d7bb 275static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 276 .num_chipselect = 8,
277 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 278 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 279};
280
c6c4d7bb
BW		 281static struct platform_device bfin_spi0_device = {
282 .name = "bfin-spi",
283 .id = 0, /* Bus number */
284 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
285 .resource = bfin_spi0_resource,
1394f032 286 .dev = {
c6c4d7bb 287 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 288 },
289};
290#endif /* spi master and devices */
291
1394f032 292#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 293#ifdef CONFIG_SERIAL_BFIN_UART0
294static struct resource bfin_uart0_resources[] = {
1394f032 295 {
6bd1fbea
SZ		 296 .start = BFIN_UART_THR,
297 .end = BFIN_UART_GCTL+2,
1394f032
BW		 298 .flags = IORESOURCE_MEM,
299 },
edb0a640
SZ		 300 {
301 .start = IRQ_UART0_TX,
302 .end = IRQ_UART0_TX,
303 .flags = IORESOURCE_IRQ,
304 },
6bd1fbea
SZ		 305 {
306 .start = IRQ_UART0_RX,
edb0a640 307 .end = IRQ_UART0_RX,
6bd1fbea
SZ		 308 .flags = IORESOURCE_IRQ,
309 },
310 {
311 .start = IRQ_UART0_ERROR,
312 .end = IRQ_UART0_ERROR,
313 .flags = IORESOURCE_IRQ,
314 },
315 {
316 .start = CH_UART0_TX,
317 .end = CH_UART0_TX,
318 .flags = IORESOURCE_DMA,
319 },
320 {
321 .start = CH_UART0_RX,
322 .end = CH_UART0_RX,
323 .flags = IORESOURCE_DMA,
324 },
325};
326
a8b19886 327static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea 328 P_UART0_TX, P_UART0_RX, 0
1394f032
BW		 329};
330
6bd1fbea 331static struct platform_device bfin_uart0_device = {
1394f032 332 .name = "bfin-uart",
6bd1fbea
SZ		 333 .id = 0,
334 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
335 .resource = bfin_uart0_resources,
336 .dev = {
337 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
338 },
1394f032
BW		 339};
340#endif
6bd1fbea 341#endif
1394f032 342
5be36d22 343#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 344#ifdef CONFIG_BFIN_SIR0
42bd8bcb 345static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 346 {
347 .start = 0xFFC00400,
348 .end = 0xFFC004FF,
349 .flags = IORESOURCE_MEM,
350 },
42bd8bcb
GY		 351 {
352 .start = IRQ_UART0_RX,
353 .end = IRQ_UART0_RX+1,
354 .flags = IORESOURCE_IRQ,
355 },
356 {
357 .start = CH_UART0_RX,
358 .end = CH_UART0_RX+1,
359 .flags = IORESOURCE_DMA,
360 },
5be36d22
GY		 361};
362
42bd8bcb 363static struct platform_device bfin_sir0_device = {
5be36d22
GY		 364 .name = "bfin_sir",
365 .id = 0,
42bd8bcb
GY		 366 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
367 .resource = bfin_sir0_resources,
5be36d22
GY		 368};
369#endif
42bd8bcb 370#endif
5be36d22 371
1394f032 372#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 373#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
374static struct resource bfin_sport0_uart_resources[] = {
375 {
376 .start = SPORT0_TCR1,
377 .end = SPORT0_MRCS3+4,
378 .flags = IORESOURCE_MEM,
379 },
380 {
381 .start = IRQ_SPORT0_RX,
382 .end = IRQ_SPORT0_RX+1,
383 .flags = IORESOURCE_IRQ,
384 },
385 {
386 .start = IRQ_SPORT0_ERROR,
387 .end = IRQ_SPORT0_ERROR,
388 .flags = IORESOURCE_IRQ,
389 },
390};
391
a8b19886 392static unsigned short bfin_sport0_peripherals[] = {
df5de261 393 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
e54b6730 394 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
df5de261
SZ		 395};
396
1394f032
BW		 397static struct platform_device bfin_sport0_uart_device = {
398 .name = "bfin-sport-uart",
399 .id = 0,
df5de261
SZ		 400 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
401 .resource = bfin_sport0_uart_resources,
402 .dev = {
403 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
404 },
405};
406#endif
407#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
408static struct resource bfin_sport1_uart_resources[] = {
409 {
410 .start = SPORT1_TCR1,
411 .end = SPORT1_MRCS3+4,
412 .flags = IORESOURCE_MEM,
413 },
414 {
415 .start = IRQ_SPORT1_RX,
416 .end = IRQ_SPORT1_RX+1,
417 .flags = IORESOURCE_IRQ,
418 },
419 {
420 .start = IRQ_SPORT1_ERROR,
421 .end = IRQ_SPORT1_ERROR,
422 .flags = IORESOURCE_IRQ,
423 },
424};
425
a8b19886 426static unsigned short bfin_sport1_peripherals[] = {
df5de261 427 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
e54b6730 428 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
1394f032
BW		 429};
430
431static struct platform_device bfin_sport1_uart_device = {
432 .name = "bfin-sport-uart",
433 .id = 1,
df5de261
SZ		 434 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
435 .resource = bfin_sport1_uart_resources,
436 .dev = {
437 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
438 },
1394f032
BW		 439};
440#endif
df5de261 441#endif
1394f032 442
2463ef22
MH		 443#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
444#include <linux/input.h>
445#include <linux/gpio_keys.h>
446
447static struct gpio_keys_button bfin_gpio_keys_table[] = {
f1bceb47
MH		 448 {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
449 {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
450 {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
2463ef22
MH		 451};
452
453static struct gpio_keys_platform_data bfin_gpio_keys_data = {
454 .buttons = bfin_gpio_keys_table,
455 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
456};
457
458static struct platform_device bfin_device_gpiokeys = {
459 .name = "gpio-keys",
460 .dev = {
461 .platform_data = &bfin_gpio_keys_data,
462 },
463};
464#endif
465
e3163954
BW		 466#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
467#include <linux/i2c-gpio.h>
468
469static struct i2c_gpio_platform_data i2c_gpio_data = {
3d7dc883
MF		 470 .sda_pin = GPIO_PF2,
471 .scl_pin = GPIO_PF3,
e3163954
BW		 472 .sda_is_open_drain = 0,
473 .scl_is_open_drain = 0,
474 .udelay = 40,
475};
476
477static struct platform_device i2c_gpio_device = {
478 .name = "i2c-gpio",
479 .id = 0,
480 .dev = {
481 .platform_data = &i2c_gpio_data,
482 },
483};
484#endif
485
81d9c7f2
BW		 486static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
487#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
488 {
489 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
81d9c7f2
BW		 490 .irq = 39,
491 },
492#endif
ebd58333 493#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 494 {
495 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 496 },
497#endif
204844eb 498#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 499 {
500 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
81d9c7f2
BW		 501 .irq = 39,
502 },
503#endif
50c4c086
MH		 504#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
505 {
506 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
507 },
508#endif
39d3c1ca 509#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
510 {
511 I2C_BOARD_INFO("ad5252", 0x2f),
512 },
513#endif
81d9c7f2 514};
81d9c7f2 515
14b03204
MH		 516static const unsigned int cclk_vlev_datasheet[] =
517{
518 VRPAIR(VLEV_085, 250000000),
519 VRPAIR(VLEV_090, 376000000),
520 VRPAIR(VLEV_095, 426000000),
521 VRPAIR(VLEV_100, 426000000),
522 VRPAIR(VLEV_105, 476000000),
523 VRPAIR(VLEV_110, 476000000),
524 VRPAIR(VLEV_115, 476000000),
525 VRPAIR(VLEV_120, 600000000),
526 VRPAIR(VLEV_125, 600000000),
527 VRPAIR(VLEV_130, 600000000),
528};
529
530static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
531 .tuple_tab = cclk_vlev_datasheet,
532 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
533 .vr_settling_time = 25 /* us */,
534};
535
536static struct platform_device bfin_dpmc = {
537 .name = "bfin dpmc",
538 .dev = {
539 .platform_data = &bfin_dmpc_vreg_data,
540 },
541};
542
7e1082b7
BS		 543#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
544static struct platform_device bfin_i2s = {
545 .name = "bfin-i2s",
546 .id = CONFIG_SND_BF5XX_SPORT_NUM,
547 /* TODO: add platform data here */
548};
549#endif
550
551#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
552static struct platform_device bfin_tdm = {
553 .name = "bfin-tdm",
554 .id = CONFIG_SND_BF5XX_SPORT_NUM,
555 /* TODO: add platform data here */
556};
557#endif
558
559#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
560static struct platform_device bfin_ac97 = {
561 .name = "bfin-ac97",
562 .id = CONFIG_SND_BF5XX_SPORT_NUM,
563 /* TODO: add platform data here */
564};
565#endif
566
1394f032 567static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 568
569 &bfin_dpmc,
570
1394f032
BW		 571#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
572 &rtc_device,
573#endif
574
575#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
576 &smc91x_device,
577#endif
578
579#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
580 &net2272_bfin_device,
581#endif
582
583#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 584 &bfin_spi0_device,
1394f032
BW		 585#endif
586
587#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 588#ifdef CONFIG_SERIAL_BFIN_UART0
589 &bfin_uart0_device,
590#endif
1394f032
BW		 591#endif
592
5be36d22 593#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 594#ifdef CONFIG_BFIN_SIR0
595 &bfin_sir0_device,
596#endif
5be36d22
GY		 597#endif
598
1394f032 599#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 600#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1394f032 601 &bfin_sport0_uart_device,
df5de261
SZ		 602#endif
603#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1394f032
BW		 604 &bfin_sport1_uart_device,
605#endif
df5de261 606#endif
c6c4d7bb 607
2463ef22
MH		 608#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
609 &bfin_device_gpiokeys,
610#endif
e3163954
BW		 611
612#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
613 &i2c_gpio_device,
614#endif
cad2ab65 615
9cd9c616 616#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
de8c43f2 617 &stamp_flash_device,
793dc27b 618#endif
7e1082b7
BS		 619
620#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
621 &bfin_i2s,
622#endif
623
624#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
625 &bfin_tdm,
626#endif
627
628#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
629 &bfin_ac97,
630#endif
1394f032
BW		 631};
632
9be8631b
MF		 633static int __init net2272_init(void)
634{
635#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
636 int ret;
637
638 /* Set PF0 to 0, PF1 to 1 make /AMS3 work properly */
639 ret = gpio_request(GPIO_PF0, "net2272");
640 if (ret)
641 return ret;
642
643 ret = gpio_request(GPIO_PF1, "net2272");
644 if (ret) {
645 gpio_free(GPIO_PF0);
646 return ret;
647 }
648
649 ret = gpio_request(GPIO_PF11, "net2272");
650 if (ret) {
651 gpio_free(GPIO_PF0);
652 gpio_free(GPIO_PF1);
653 return ret;
654 }
655
656 gpio_direction_output(GPIO_PF0, 0);
657 gpio_direction_output(GPIO_PF1, 1);
658
659 /* Reset the USB chip */
660 gpio_direction_output(GPIO_PF11, 0);
661 mdelay(2);
662 gpio_set_value(GPIO_PF11, 1);
663#endif
664
665 return 0;
666}
667
1394f032
BW		 668static int __init stamp_init(void)
669{
c0fc525d
MF		 670 int ret;
671
b85d858b 672 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2 673
81d9c7f2
BW		 674 i2c_register_board_info(0, bfin_i2c_board_info,
675 ARRAY_SIZE(bfin_i2c_board_info));
81d9c7f2 676
c0fc525d
MF		 677 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
678 if (ret < 0)
679 return ret;
680
681#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
30e9b95a
MF		 682 /*
683 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
684 * the bfin-async-map driver takes care of flipping between
685 * flash and ethernet when necessary.
686 */
687 ret = gpio_request(GPIO_PF0, "enet_cpld");
688 if (!ret) {
689 gpio_direction_output(GPIO_PF0, 1);
690 gpio_free(GPIO_PF0);
691 }
c0fc525d
MF		 692#endif
693
9be8631b
MF		 694 if (net2272_init())
695 pr_warning("unable to configure net2272; it probably won't work\n");
696
5bda2723 697 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 698 return 0;
1394f032
BW		 699}
700
701arch_initcall(stamp_init);
c6c4d7bb 702
c13ce9fd
SZ		 703static struct platform_device *stamp_early_devices[] __initdata = {
704#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
705#ifdef CONFIG_SERIAL_BFIN_UART0
706 &bfin_uart0_device,
707#endif
708#endif
709
710#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
711#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
712 &bfin_sport0_uart_device,
713#endif
714#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
715 &bfin_sport1_uart_device,
716#endif
717#endif
718};
719
720void __init native_machine_early_platform_add_devices(void)
721{
722 printk(KERN_INFO "register early platform devices\n");
723 early_platform_add_devices(stamp_early_devices,
724 ARRAY_SIZE(stamp_early_devices));
725}
726
c6c4d7bb
BW		 727void native_machine_restart(char *cmd)
728{
9cd9c616 729 /* workaround pull up on cpld / flash pin not being strong enough */
30e9b95a
MF		 730 gpio_request(GPIO_PF0, "flash_cpld");
731 gpio_direction_output(GPIO_PF0, 0);
c6c4d7bb 732}
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