[mirror_ubuntu-eoan-kernel.git] / arch / blackfin / mach-bf537 / boards / cm_bf537.c

/*
 * File:         arch/blackfin/mach-bf537/boards/cm_bf537.c
 * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
 * Author:       Aidan Williams <aidan@nicta.com.au>
 *
 * Created:      2005
 * Description:  Board description file
 *
 * Modified:
 *               Copyright 2005 National ICT Australia (NICTA)
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/usb_isp1362.h>
#include <linux/pata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF537";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "kernel",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	.enable_dma = 1,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836-spi",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
	{
		.modalias = "ad9960-spi",
		.max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &ad9960_spi_chip_info,
	},
#endif

#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
	{
		.modalias = "spi_mmc_dummy",
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 7,
		.platform_data = NULL,
		.controller_data = &spi_mmc_chip_info,
		.mode = SPI_MODE_3,
	},
	{
		.modalias = "spi_mmc",
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
		.platform_data = NULL,
		.controller_data = &spi_mmc_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_IRQ,
	}
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
	{
		.start = 0x20200300,
		.end = 0x20200300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF14,
		.end = IRQ_PF14,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
		},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x20308000,
		.end = 0x20308000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20308004,
		.end = 0x20308004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PG15,
		.end = IRQ_PG15,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20200000,
		.end = 0x20200000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PH14,
		.end = IRQ_PH14,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
};

static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
};
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	64

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 2,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x2030C000,
		.end = 0x2030C01F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2030D018,
		.end = 0x2030D01B,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

static struct platform_device *cm_bf537_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif
};

static int __init cm_bf537_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
	platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(cm_bf537_init);

void bfin_get_ether_addr(char *addr)
{
	random_ether_addr(addr);
	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
}
EXPORT_SYMBOL(bfin_get_ether_addr);
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: arch/blackfin/mach-bf537/boards/cm_bf537.c
	3	* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
	4	* Author: Aidan Williams <aidan@nicta.com.au>
	5	*
	6	* Created: 2005
	7	* Description: Board description file
	8	*
	9	* Modified:
	10	* Copyright 2005 National ICT Australia (NICTA)
	11	* Copyright 2004-2006 Analog Devices Inc.
	12	*
	13	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	14	*
	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License as published by
	17	* the Free Software Foundation; either version 2 of the License, or
	18	* (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, see the file COPYING, or write
	27	* to the Free Software Foundation, Inc.,
	28	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	29	*/
	30
	31	#include <linux/device.h>
	32	#include <linux/platform_device.h>
	33	#include <linux/mtd/mtd.h>
	34	#include <linux/mtd/partitions.h>
	35	#include <linux/spi/spi.h>
	36	#include <linux/spi/flash.h>
	37	#include <linux/usb_isp1362.h>
c6c4d7bb	38	#include <linux/pata_platform.h>
1f83b8f1	39	#include <linux/irq.h>
c6c4d7bb	40	#include <asm/dma.h>
1394f032	41	#include <asm/bfin5xx_spi.h>
5d448dd5	42	#include <asm/portmux.h>
1394f032 BW	43
	44	/*
	45	* Name the Board for the /proc/cpuinfo
	46	*/
066954a3	47	const char bfin_board_name[] = "Bluetechnix CM BF537";
1394f032 BW	48
	49	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	50	/* all SPI peripherals info goes here */
	51
	52	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	53	static struct mtd_partition bfin_spi_flash_partitions[] = {
	54	{
	55	.name = "bootloader",
	56	.size = 0x00020000,
	57	.offset = 0,
	58	.mask_flags = MTD_CAP_ROM
1f83b8f1	59	}, {
1394f032 BW	60	.name = "kernel",
	61	.size = 0xe0000,
	62	.offset = 0x20000
1f83b8f1	63	}, {
1394f032 BW	64	.name = "file system",
	65	.size = 0x700000,
	66	.offset = 0x00100000,
	67	}
	68	};
	69
	70	static struct flash_platform_data bfin_spi_flash_data = {
	71	.name = "m25p80",
	72	.parts = bfin_spi_flash_partitions,
	73	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	74	.type = "m25p64",
	75	};
	76
	77	/* SPI flash chip (m25p64) */
	78	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	79	.enable_dma = 0, /* use dma transfer with this chip*/
	80	.bits_per_word = 8,
	81	};
	82	#endif
	83
	84	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	85	/* SPI ADC chip */
	86	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	87	.enable_dma = 1, /* use dma transfer with this chip*/
	88	.bits_per_word = 16,
	89	};
	90	#endif
	91
	92	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	93	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	94	.enable_dma = 0,
	95	.bits_per_word = 16,
	96	};
	97	#endif
	98
	99	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	100	static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	101	.enable_dma = 0,
	102	.bits_per_word = 16,
	103	};
	104	#endif
	105
	106	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	107	static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	108	.enable_dma = 1,
	109	.bits_per_word = 8,
	110	};
	111	#endif
	112
	113	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	114	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	115	{
	116	/* the modalias must be the same as spi device driver name */
	117	.modalias = "m25p80", /* Name of spi_driver for this device */
	118	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	119	.bus_num = 0, /* Framework bus number */
1394f032 BW	120	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	121	.platform_data = &bfin_spi_flash_data,
	122	.controller_data = &spi_flash_chip_info,
	123	.mode = SPI_MODE_3,
	124	},
	125	#endif
	126
	127	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	128	{
	129	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	130	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	131	.bus_num = 0, /* Framework bus number */
1394f032 BW	132	.chip_select = 1, /* Framework chip select. */
	133	.platform_data = NULL, /* No spi_driver specific config */
	134	.controller_data = &spi_adc_chip_info,
	135	},
	136	#endif
	137
	138	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	139	{
	140	.modalias = "ad1836-spi",
	141	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	142	.bus_num = 0,
1394f032 BW	143	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	144	.controller_data = &ad1836_spi_chip_info,
	145	},
	146	#endif
	147
	148	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	149	{
	150	.modalias = "ad9960-spi",
	151	.max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	152	.bus_num = 0,
1394f032 BW	153	.chip_select = 1,
	154	.controller_data = &ad9960_spi_chip_info,
	155	},
	156	#endif
	157
	158	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	159	{
	160	.modalias = "spi_mmc_dummy",
	161	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	162	.bus_num = 0,
1394f032 BW	163	.chip_select = 7,
	164	.platform_data = NULL,
	165	.controller_data = &spi_mmc_chip_info,
	166	.mode = SPI_MODE_3,
	167	},
	168	{
	169	.modalias = "spi_mmc",
	170	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	171	.bus_num = 0,
1394f032 BW	172	.chip_select = CONFIG_SPI_MMC_CS_CHAN,
	173	.platform_data = NULL,
	174	.controller_data = &spi_mmc_chip_info,
	175	.mode = SPI_MODE_3,
	176	},
	177	#endif
	178	};
	179
c6c4d7bb BW	180	/* SPI (0) */
	181	static struct resource bfin_spi0_resource[] = {
	182	[0] = {
	183	.start = SPI0_REGBASE,
	184	.end = SPI0_REGBASE + 0xFF,
	185	.flags = IORESOURCE_MEM,
	186	},
	187	[1] = {
	188	.start = CH_SPI,
	189	.end = CH_SPI,
	190	.flags = IORESOURCE_IRQ,
	191	}
	192	};
	193
1394f032	194	/* SPI controller data */
c6c4d7bb	195	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	196	.num_chipselect = 8,
1394f032 BW	197	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	198	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	199	};
1394f032 BW	200
c6c4d7bb BW	201	static struct platform_device bfin_spi0_device = {
	202	.name = "bfin-spi",
	203	.id = 0, /* Bus number */
	204	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	205	.resource = bfin_spi0_resource,
1394f032	206	.dev = {
c6c4d7bb	207	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	208	},
	209	};
	210	#endif /* spi master and devices */
	211
	212	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	213	static struct platform_device rtc_device = {
	214	.name = "rtc-bfin",
	215	.id = -1,
	216	};
	217	#endif
	218
	219	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	220	static struct resource smc91x_resources[] = {
	221	{
	222	.start = 0x20200300,
	223	.end = 0x20200300 + 16,
	224	.flags = IORESOURCE_MEM,
1f83b8f1	225	}, {
1394f032 BW	226	.start = IRQ_PF14,
	227	.end = IRQ_PF14,
	228	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	229	},
	230	};
	231
	232	static struct platform_device smc91x_device = {
	233	.name = "smc91x",
	234	.id = 0,
	235	.num_resources = ARRAY_SIZE(smc91x_resources),
	236	.resource = smc91x_resources,
	237	};
	238	#endif
	239
	240	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	241	static struct resource isp1362_hcd_resources[] = {
	242	{
	243	.start = 0x20308000,
	244	.end = 0x20308000,
	245	.flags = IORESOURCE_MEM,
1f83b8f1	246	}, {
1394f032 BW	247	.start = 0x20308004,
	248	.end = 0x20308004,
	249	.flags = IORESOURCE_MEM,
1f83b8f1	250	}, {
1394f032 BW	251	.start = IRQ_PG15,
	252	.end = IRQ_PG15,
	253	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	254	},
	255	};
	256
	257	static struct isp1362_platform_data isp1362_priv = {
	258	.sel15Kres = 1,
	259	.clknotstop = 0,
	260	.oc_enable = 0,
	261	.int_act_high = 0,
	262	.int_edge_triggered = 0,
	263	.remote_wakeup_connected = 0,
	264	.no_power_switching = 1,
	265	.power_switching_mode = 0,
	266	};
	267
	268	static struct platform_device isp1362_hcd_device = {
	269	.name = "isp1362-hcd",
	270	.id = 0,
	271	.dev = {
	272	.platform_data = &isp1362_priv,
	273	},
	274	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	275	.resource = isp1362_hcd_resources,
	276	};
	277	#endif
	278
	279	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	280	static struct resource net2272_bfin_resources[] = {
	281	{
	282	.start = 0x20200000,
	283	.end = 0x20200000 + 0x100,
	284	.flags = IORESOURCE_MEM,
1f83b8f1	285	}, {
8ecc7368 MH	286	.start = IRQ_PH14,
8ecc7368 MH	287	.end = IRQ_PH14,
1394f032 BW	288	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	289	},
	290	};
	291
	292	static struct platform_device net2272_bfin_device = {
	293	.name = "net2272",
	294	.id = -1,
	295	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	296	.resource = net2272_bfin_resources,
	297	};
	298	#endif
	299
	300	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	301	static struct resource bfin_uart_resources[] = {
	302	{
	303	.start = 0xFFC00400,
	304	.end = 0xFFC004FF,
	305	.flags = IORESOURCE_MEM,
1f83b8f1	306	}, {
1394f032 BW	307	.start = 0xFFC02000,
	308	.end = 0xFFC020FF,
	309	.flags = IORESOURCE_MEM,
	310	},
	311	};
	312
	313	static struct platform_device bfin_uart_device = {
	314	.name = "bfin-uart",
	315	.id = 1,
	316	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	317	.resource = bfin_uart_resources,
	318	};
	319	#endif
	320
	321	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	322	static struct platform_device bfin_sport0_uart_device = {
	323	.name = "bfin-sport-uart",
	324	.id = 0,
	325	};
	326
	327	static struct platform_device bfin_sport1_uart_device = {
	328	.name = "bfin-sport-uart",
	329	.id = 1,
	330	};
	331	#endif
	332
	333	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
	334	static struct platform_device bfin_mac_device = {
	335	.name = "bfin_mac",
	336	};
	337	#endif
	338
c6c4d7bb BW	339	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	340	#define PATA_INT 64
	341
	342	static struct pata_platform_info bfin_pata_platform_data = {
	343	.ioport_shift = 2,
	344	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	345	};
	346
	347	static struct resource bfin_pata_resources[] = {
	348	{
	349	.start = 0x2030C000,
	350	.end = 0x2030C01F,
	351	.flags = IORESOURCE_MEM,
	352	},
	353	{
	354	.start = 0x2030D018,
	355	.end = 0x2030D01B,
	356	.flags = IORESOURCE_MEM,
	357	},
	358	{
	359	.start = PATA_INT,
	360	.end = PATA_INT,
	361	.flags = IORESOURCE_IRQ,
	362	},
	363	};
	364
	365	static struct platform_device bfin_pata_device = {
	366	.name = "pata_platform",
	367	.id = -1,
	368	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	369	.resource = bfin_pata_resources,
	370	.dev = {
	371	.platform_data = &bfin_pata_platform_data,
	372	}
	373	};
	374	#endif
	375
1394f032 BW	376	static struct platform_device *cm_bf537_devices[] __initdata = {
	377	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	378	&rtc_device,
	379	#endif
	380
	381	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	382	&bfin_uart_device,
	383	#endif
	384
	385	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	386	&bfin_sport0_uart_device,
	387	&bfin_sport1_uart_device,
	388	#endif
	389
	390	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	391	&isp1362_hcd_device,
	392	#endif
	393
	394	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	395	&smc91x_device,
	396	#endif
	397
	398	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
	399	&bfin_mac_device,
	400	#endif
	401
	402	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	403	&net2272_bfin_device,
	404	#endif
	405
	406	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb BW	407	&bfin_spi0_device,
	408	#endif
	409
	410	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	411	&bfin_pata_device,
1394f032 BW	412	#endif
	413	};
	414
	415	static int __init cm_bf537_init(void)
	416	{
	417	printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
	418	platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
	419	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	420	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	421	#endif
c6c4d7bb BW	422
	423	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	424	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
	425	#endif
1394f032 BW	426	return 0;
	427	}
	428
	429	arch_initcall(cm_bf537_init);
137b1529	430
9862cc52	431	void bfin_get_ether_addr(char *addr)
137b1529 MF	432	{
	433	random_ether_addr(addr);
	434	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
	435	}
9862cc52	436	EXPORT_SYMBOL(bfin_get_ether_addr);