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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/cm_bf537.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: 2005 | |
7 | * Description: Board description file | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
43f73fef | 32 | #include <linux/etherdevice.h> |
1394f032 BW |
33 | #include <linux/platform_device.h> |
34 | #include <linux/mtd/mtd.h> | |
35 | #include <linux/mtd/partitions.h> | |
8ea89497 | 36 | #include <linux/mtd/physmap.h> |
1394f032 BW |
37 | #include <linux/spi/spi.h> |
38 | #include <linux/spi/flash.h> | |
b964c592 | 39 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
f02bcec5 | 40 | #include <linux/usb/isp1362.h> |
b964c592 | 41 | #endif |
0a87e3e9 | 42 | #include <linux/ata_platform.h> |
1f83b8f1 | 43 | #include <linux/irq.h> |
c6c4d7bb | 44 | #include <asm/dma.h> |
1394f032 | 45 | #include <asm/bfin5xx_spi.h> |
5d448dd5 | 46 | #include <asm/portmux.h> |
14b03204 | 47 | #include <asm/dpmc.h> |
1394f032 BW |
48 | |
49 | /* | |
50 | * Name the Board for the /proc/cpuinfo | |
51 | */ | |
066954a3 | 52 | const char bfin_board_name[] = "Bluetechnix CM BF537"; |
1394f032 BW |
53 | |
54 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
55 | /* all SPI peripherals info goes here */ | |
56 | ||
57 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
58 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
59 | { | |
aa582977 | 60 | .name = "bootloader(spi)", |
1394f032 BW |
61 | .size = 0x00020000, |
62 | .offset = 0, | |
63 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 64 | }, { |
aa582977 | 65 | .name = "linux kernel(spi)", |
1394f032 BW |
66 | .size = 0xe0000, |
67 | .offset = 0x20000 | |
1f83b8f1 | 68 | }, { |
aa582977 | 69 | .name = "file system(spi)", |
1394f032 BW |
70 | .size = 0x700000, |
71 | .offset = 0x00100000, | |
72 | } | |
73 | }; | |
74 | ||
75 | static struct flash_platform_data bfin_spi_flash_data = { | |
76 | .name = "m25p80", | |
77 | .parts = bfin_spi_flash_partitions, | |
78 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
79 | .type = "m25p64", | |
80 | }; | |
81 | ||
82 | /* SPI flash chip (m25p64) */ | |
83 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
84 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
85 | .bits_per_word = 8, | |
86 | }; | |
87 | #endif | |
88 | ||
89 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
90 | /* SPI ADC chip */ | |
91 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
92 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
93 | .bits_per_word = 16, | |
94 | }; | |
95 | #endif | |
96 | ||
97 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
98 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
99 | .enable_dma = 0, | |
100 | .bits_per_word = 16, | |
101 | }; | |
102 | #endif | |
103 | ||
104 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
105 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
106 | .enable_dma = 0, | |
107 | .bits_per_word = 16, | |
108 | }; | |
109 | #endif | |
110 | ||
111 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
112 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
113 | .enable_dma = 1, | |
114 | .bits_per_word = 8, | |
115 | }; | |
116 | #endif | |
117 | ||
118 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
119 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
120 | { | |
121 | /* the modalias must be the same as spi device driver name */ | |
122 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
123 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 124 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
125 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
126 | .platform_data = &bfin_spi_flash_data, | |
127 | .controller_data = &spi_flash_chip_info, | |
128 | .mode = SPI_MODE_3, | |
129 | }, | |
130 | #endif | |
131 | ||
132 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
133 | { | |
134 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
135 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 136 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
137 | .chip_select = 1, /* Framework chip select. */ |
138 | .platform_data = NULL, /* No spi_driver specific config */ | |
139 | .controller_data = &spi_adc_chip_info, | |
140 | }, | |
141 | #endif | |
142 | ||
143 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
144 | { | |
145 | .modalias = "ad1836-spi", | |
146 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 147 | .bus_num = 0, |
1394f032 BW |
148 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
149 | .controller_data = &ad1836_spi_chip_info, | |
150 | }, | |
151 | #endif | |
152 | ||
153 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
154 | { | |
155 | .modalias = "ad9960-spi", | |
156 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 157 | .bus_num = 0, |
1394f032 BW |
158 | .chip_select = 1, |
159 | .controller_data = &ad9960_spi_chip_info, | |
160 | }, | |
161 | #endif | |
162 | ||
163 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
164 | { | |
165 | .modalias = "spi_mmc_dummy", | |
166 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 167 | .bus_num = 0, |
1394f032 BW |
168 | .chip_select = 7, |
169 | .platform_data = NULL, | |
170 | .controller_data = &spi_mmc_chip_info, | |
171 | .mode = SPI_MODE_3, | |
172 | }, | |
173 | { | |
174 | .modalias = "spi_mmc", | |
175 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 176 | .bus_num = 0, |
1394f032 BW |
177 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
178 | .platform_data = NULL, | |
179 | .controller_data = &spi_mmc_chip_info, | |
180 | .mode = SPI_MODE_3, | |
181 | }, | |
182 | #endif | |
183 | }; | |
184 | ||
c6c4d7bb BW |
185 | /* SPI (0) */ |
186 | static struct resource bfin_spi0_resource[] = { | |
187 | [0] = { | |
188 | .start = SPI0_REGBASE, | |
189 | .end = SPI0_REGBASE + 0xFF, | |
190 | .flags = IORESOURCE_MEM, | |
191 | }, | |
192 | [1] = { | |
193 | .start = CH_SPI, | |
194 | .end = CH_SPI, | |
195 | .flags = IORESOURCE_IRQ, | |
196 | } | |
197 | }; | |
198 | ||
1394f032 | 199 | /* SPI controller data */ |
c6c4d7bb | 200 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
201 | .num_chipselect = 8, |
202 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 203 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
204 | }; |
205 | ||
c6c4d7bb BW |
206 | static struct platform_device bfin_spi0_device = { |
207 | .name = "bfin-spi", | |
208 | .id = 0, /* Bus number */ | |
209 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
210 | .resource = bfin_spi0_resource, | |
1394f032 | 211 | .dev = { |
c6c4d7bb | 212 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
213 | }, |
214 | }; | |
215 | #endif /* spi master and devices */ | |
216 | ||
217 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
218 | static struct platform_device rtc_device = { | |
219 | .name = "rtc-bfin", | |
220 | .id = -1, | |
221 | }; | |
222 | #endif | |
223 | ||
0d4a89bb MH |
224 | #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) |
225 | static struct platform_device hitachi_fb_device = { | |
226 | .name = "hitachi-tx09", | |
227 | }; | |
228 | #endif | |
229 | ||
1394f032 BW |
230 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
231 | static struct resource smc91x_resources[] = { | |
232 | { | |
233 | .start = 0x20200300, | |
234 | .end = 0x20200300 + 16, | |
235 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 236 | }, { |
1394f032 BW |
237 | .start = IRQ_PF14, |
238 | .end = IRQ_PF14, | |
239 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
240 | }, | |
241 | }; | |
242 | ||
243 | static struct platform_device smc91x_device = { | |
244 | .name = "smc91x", | |
245 | .id = 0, | |
246 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
247 | .resource = smc91x_resources, | |
248 | }; | |
249 | #endif | |
250 | ||
251 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
252 | static struct resource isp1362_hcd_resources[] = { | |
253 | { | |
254 | .start = 0x20308000, | |
255 | .end = 0x20308000, | |
256 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 257 | }, { |
1394f032 BW |
258 | .start = 0x20308004, |
259 | .end = 0x20308004, | |
260 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 261 | }, { |
1394f032 BW |
262 | .start = IRQ_PG15, |
263 | .end = IRQ_PG15, | |
264 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
265 | }, | |
266 | }; | |
267 | ||
268 | static struct isp1362_platform_data isp1362_priv = { | |
269 | .sel15Kres = 1, | |
270 | .clknotstop = 0, | |
271 | .oc_enable = 0, | |
272 | .int_act_high = 0, | |
273 | .int_edge_triggered = 0, | |
274 | .remote_wakeup_connected = 0, | |
275 | .no_power_switching = 1, | |
276 | .power_switching_mode = 0, | |
277 | }; | |
278 | ||
279 | static struct platform_device isp1362_hcd_device = { | |
280 | .name = "isp1362-hcd", | |
281 | .id = 0, | |
282 | .dev = { | |
283 | .platform_data = &isp1362_priv, | |
284 | }, | |
285 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
286 | .resource = isp1362_hcd_resources, | |
287 | }; | |
288 | #endif | |
289 | ||
290 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
291 | static struct resource net2272_bfin_resources[] = { | |
292 | { | |
293 | .start = 0x20200000, | |
294 | .end = 0x20200000 + 0x100, | |
295 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 296 | }, { |
8ecc7368 MH |
297 | .start = IRQ_PH14, |
298 | .end = IRQ_PH14, | |
1394f032 BW |
299 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
300 | }, | |
301 | }; | |
302 | ||
303 | static struct platform_device net2272_bfin_device = { | |
304 | .name = "net2272", | |
305 | .id = -1, | |
306 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
307 | .resource = net2272_bfin_resources, | |
308 | }; | |
309 | #endif | |
310 | ||
c97618d3 MF |
311 | static struct resource bfin_gpios_resources = { |
312 | .start = 0, | |
313 | .end = MAX_BLACKFIN_GPIOS - 1, | |
314 | .flags = IORESOURCE_IRQ, | |
315 | }; | |
316 | ||
317 | static struct platform_device bfin_gpios_device = { | |
318 | .name = "simple-gpio", | |
319 | .id = -1, | |
320 | .num_resources = 1, | |
321 | .resource = &bfin_gpios_resources, | |
322 | }; | |
323 | ||
8ea89497 MF |
324 | #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE) |
325 | static struct mtd_partition cm_partitions[] = { | |
326 | { | |
327 | .name = "bootloader(nor)", | |
328 | .size = 0x40000, | |
329 | .offset = 0, | |
330 | }, { | |
331 | .name = "linux kernel(nor)", | |
332 | .size = 0xE0000, | |
333 | .offset = MTDPART_OFS_APPEND, | |
334 | }, { | |
335 | .name = "file system(nor)", | |
336 | .size = MTDPART_SIZ_FULL, | |
337 | .offset = MTDPART_OFS_APPEND, | |
338 | } | |
339 | }; | |
340 | ||
341 | static struct physmap_flash_data cm_flash_data = { | |
342 | .width = 2, | |
343 | .parts = cm_partitions, | |
344 | .nr_parts = ARRAY_SIZE(cm_partitions), | |
345 | }; | |
346 | ||
347 | static unsigned cm_flash_gpios[] = { GPIO_PF4 }; | |
348 | ||
349 | static struct resource cm_flash_resource[] = { | |
350 | { | |
351 | .name = "cfi_probe", | |
352 | .start = 0x20000000, | |
353 | .end = 0x201fffff, | |
354 | .flags = IORESOURCE_MEM, | |
355 | }, { | |
356 | .start = (unsigned long)cm_flash_gpios, | |
357 | .end = ARRAY_SIZE(cm_flash_gpios), | |
358 | .flags = IORESOURCE_IRQ, | |
359 | } | |
360 | }; | |
361 | ||
362 | static struct platform_device cm_flash_device = { | |
363 | .name = "gpio-addr-flash", | |
364 | .id = 0, | |
365 | .dev = { | |
366 | .platform_data = &cm_flash_data, | |
367 | }, | |
368 | .num_resources = ARRAY_SIZE(cm_flash_resource), | |
369 | .resource = cm_flash_resource, | |
370 | }; | |
371 | #endif | |
372 | ||
1394f032 BW |
373 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
374 | static struct resource bfin_uart_resources[] = { | |
375 | { | |
376 | .start = 0xFFC00400, | |
377 | .end = 0xFFC004FF, | |
378 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 379 | }, { |
1394f032 BW |
380 | .start = 0xFFC02000, |
381 | .end = 0xFFC020FF, | |
382 | .flags = IORESOURCE_MEM, | |
383 | }, | |
384 | }; | |
385 | ||
386 | static struct platform_device bfin_uart_device = { | |
387 | .name = "bfin-uart", | |
388 | .id = 1, | |
389 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
390 | .resource = bfin_uart_resources, | |
391 | }; | |
392 | #endif | |
393 | ||
5be36d22 GY |
394 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
395 | static struct resource bfin_sir_resources[] = { | |
396 | #ifdef CONFIG_BFIN_SIR0 | |
397 | { | |
398 | .start = 0xFFC00400, | |
399 | .end = 0xFFC004FF, | |
400 | .flags = IORESOURCE_MEM, | |
401 | }, | |
402 | #endif | |
403 | #ifdef CONFIG_BFIN_SIR1 | |
404 | { | |
405 | .start = 0xFFC02000, | |
406 | .end = 0xFFC020FF, | |
407 | .flags = IORESOURCE_MEM, | |
408 | }, | |
409 | #endif | |
410 | }; | |
411 | ||
412 | static struct platform_device bfin_sir_device = { | |
413 | .name = "bfin_sir", | |
414 | .id = 0, | |
415 | .num_resources = ARRAY_SIZE(bfin_sir_resources), | |
416 | .resource = bfin_sir_resources, | |
417 | }; | |
418 | #endif | |
419 | ||
56ce835b MF |
420 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
421 | static struct resource bfin_twi0_resource[] = { | |
422 | [0] = { | |
423 | .start = TWI0_REGBASE, | |
424 | .end = TWI0_REGBASE, | |
425 | .flags = IORESOURCE_MEM, | |
426 | }, | |
427 | [1] = { | |
428 | .start = IRQ_TWI, | |
429 | .end = IRQ_TWI, | |
430 | .flags = IORESOURCE_IRQ, | |
431 | }, | |
432 | }; | |
433 | ||
434 | static struct platform_device i2c_bfin_twi_device = { | |
435 | .name = "i2c-bfin-twi", | |
436 | .id = 0, | |
437 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), | |
438 | .resource = bfin_twi0_resource, | |
439 | }; | |
440 | #endif | |
441 | ||
1394f032 BW |
442 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
443 | static struct platform_device bfin_sport0_uart_device = { | |
444 | .name = "bfin-sport-uart", | |
445 | .id = 0, | |
446 | }; | |
447 | ||
448 | static struct platform_device bfin_sport1_uart_device = { | |
449 | .name = "bfin-sport-uart", | |
450 | .id = 1, | |
451 | }; | |
452 | #endif | |
453 | ||
454 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
455 | static struct platform_device bfin_mac_device = { | |
456 | .name = "bfin_mac", | |
457 | }; | |
458 | #endif | |
459 | ||
c6c4d7bb | 460 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
fe5aeb93 | 461 | #define PATA_INT IRQ_PF14 |
c6c4d7bb BW |
462 | |
463 | static struct pata_platform_info bfin_pata_platform_data = { | |
464 | .ioport_shift = 2, | |
465 | .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED, | |
466 | }; | |
467 | ||
468 | static struct resource bfin_pata_resources[] = { | |
469 | { | |
470 | .start = 0x2030C000, | |
471 | .end = 0x2030C01F, | |
472 | .flags = IORESOURCE_MEM, | |
473 | }, | |
474 | { | |
475 | .start = 0x2030D018, | |
476 | .end = 0x2030D01B, | |
477 | .flags = IORESOURCE_MEM, | |
478 | }, | |
479 | { | |
480 | .start = PATA_INT, | |
481 | .end = PATA_INT, | |
482 | .flags = IORESOURCE_IRQ, | |
483 | }, | |
484 | }; | |
485 | ||
486 | static struct platform_device bfin_pata_device = { | |
487 | .name = "pata_platform", | |
488 | .id = -1, | |
489 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
490 | .resource = bfin_pata_resources, | |
491 | .dev = { | |
492 | .platform_data = &bfin_pata_platform_data, | |
493 | } | |
494 | }; | |
495 | #endif | |
496 | ||
14b03204 MH |
497 | static const unsigned int cclk_vlev_datasheet[] = |
498 | { | |
499 | VRPAIR(VLEV_085, 250000000), | |
500 | VRPAIR(VLEV_090, 376000000), | |
501 | VRPAIR(VLEV_095, 426000000), | |
502 | VRPAIR(VLEV_100, 426000000), | |
503 | VRPAIR(VLEV_105, 476000000), | |
504 | VRPAIR(VLEV_110, 476000000), | |
505 | VRPAIR(VLEV_115, 476000000), | |
506 | VRPAIR(VLEV_120, 500000000), | |
507 | VRPAIR(VLEV_125, 533000000), | |
508 | VRPAIR(VLEV_130, 600000000), | |
509 | }; | |
510 | ||
511 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | |
512 | .tuple_tab = cclk_vlev_datasheet, | |
513 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | |
514 | .vr_settling_time = 25 /* us */, | |
515 | }; | |
516 | ||
517 | static struct platform_device bfin_dpmc = { | |
518 | .name = "bfin dpmc", | |
519 | .dev = { | |
520 | .platform_data = &bfin_dmpc_vreg_data, | |
521 | }, | |
522 | }; | |
523 | ||
1394f032 | 524 | static struct platform_device *cm_bf537_devices[] __initdata = { |
14b03204 MH |
525 | |
526 | &bfin_dpmc, | |
527 | ||
0d4a89bb MH |
528 | #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) |
529 | &hitachi_fb_device, | |
530 | #endif | |
531 | ||
1394f032 BW |
532 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
533 | &rtc_device, | |
534 | #endif | |
535 | ||
536 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
537 | &bfin_uart_device, | |
538 | #endif | |
539 | ||
5be36d22 GY |
540 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
541 | &bfin_sir_device, | |
542 | #endif | |
543 | ||
56ce835b MF |
544 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
545 | &i2c_bfin_twi_device, | |
546 | #endif | |
547 | ||
1394f032 BW |
548 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
549 | &bfin_sport0_uart_device, | |
550 | &bfin_sport1_uart_device, | |
551 | #endif | |
552 | ||
553 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
554 | &isp1362_hcd_device, | |
555 | #endif | |
556 | ||
557 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
558 | &smc91x_device, | |
559 | #endif | |
560 | ||
561 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
562 | &bfin_mac_device, | |
563 | #endif | |
564 | ||
565 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
566 | &net2272_bfin_device, | |
567 | #endif | |
568 | ||
569 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb BW |
570 | &bfin_spi0_device, |
571 | #endif | |
572 | ||
573 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
574 | &bfin_pata_device, | |
1394f032 | 575 | #endif |
8ea89497 MF |
576 | |
577 | #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE) | |
578 | &cm_flash_device, | |
579 | #endif | |
c97618d3 MF |
580 | |
581 | &bfin_gpios_device, | |
1394f032 BW |
582 | }; |
583 | ||
584 | static int __init cm_bf537_init(void) | |
585 | { | |
b85d858b | 586 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
1394f032 BW |
587 | platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices)); |
588 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
589 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | |
590 | #endif | |
c6c4d7bb BW |
591 | |
592 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
593 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
594 | #endif | |
1394f032 BW |
595 | return 0; |
596 | } | |
597 | ||
598 | arch_initcall(cm_bf537_init); | |
137b1529 | 599 | |
9862cc52 | 600 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
601 | { |
602 | random_ether_addr(addr); | |
603 | printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); | |
604 | } | |
9862cc52 | 605 | EXPORT_SYMBOL(bfin_get_ether_addr); |