[mirror_ubuntu-eoan-kernel.git] / arch / blackfin / mach-bf537 / boards / cm_bf537u.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *           2008-2009 Bluetechnix
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
#include <asm/dpmc.h>
#include <linux/spi/mmc_spi.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF537U";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
static struct platform_device hitachi_fb_device = {
	.name = "hitachi-tx09",
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.start = 0x20200300,
		.end = 0x20200300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF14,
		.end = IRQ_PF14,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
		},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x20308000,
		.end = 0x20308000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20308004,
		.end = 0x20308004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PG15,
		.end = IRQ_PG15,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20200000,
		.end = 0x20200000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PH14,
		.end = IRQ_PH14,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
static struct mtd_partition cm_partitions[] = {
	{
		.name   = "bootloader(nor)",
		.size   = 0x40000,
		.offset = 0,
	}, {
		.name   = "linux kernel(nor)",
		.size   = 0x100000,
		.offset = MTDPART_OFS_APPEND,
	}, {
		.name   = "file system(nor)",
		.size   = MTDPART_SIZ_FULL,
		.offset = MTDPART_OFS_APPEND,
	}
};

static struct physmap_flash_data cm_flash_data = {
	.width    = 2,
	.parts    = cm_partitions,
	.nr_parts = ARRAY_SIZE(cm_partitions),
};

static unsigned cm_flash_gpios[] = { GPIO_PH0 };

static struct resource cm_flash_resource[] = {
	{
		.name  = "cfi_probe",
		.start = 0x20000000,
		.end   = 0x201fffff,
		.flags = IORESOURCE_MEM,
	}, {
		.start = (unsigned long)cm_flash_gpios,
		.end   = ARRAY_SIZE(cm_flash_gpios),
		.flags = IORESOURCE_IRQ,
	}
};

static struct platform_device cm_flash_device = {
	.name          = "gpio-addr-flash",
	.id            = 0,
	.dev = {
		.platform_data = &cm_flash_data,
	},
	.num_resources = ARRAY_SIZE(cm_flash_resource),
	.resource      = cm_flash_resource,
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};
static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
	{
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX+1,
		.flags = IORESOURCE_DMA,
	},
};
static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
};
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
static struct resource bfin_twi0_resource[] = {
	[0] = {
		.start = TWI0_REGBASE,
		.end   = TWI0_REGBASE,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = IRQ_TWI,
		.end   = IRQ_TWI,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device i2c_bfin_twi_device = {
	.name = "i2c-bfin-twi",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	.resource = bfin_twi0_resource,
};
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
};

static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
};

static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev.platform_data = &bfin_mii_bus,
};
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	IRQ_PF14

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 2,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x2030C000,
		.end = 0x2030C01F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2030D018,
		.end = 0x2030D01B,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

static const unsigned int cclk_vlev_datasheet[] =
{
	VRPAIR(VLEV_085, 250000000),
	VRPAIR(VLEV_090, 376000000),
	VRPAIR(VLEV_095, 426000000),
	VRPAIR(VLEV_100, 426000000),
	VRPAIR(VLEV_105, 476000000),
	VRPAIR(VLEV_110, 476000000),
	VRPAIR(VLEV_115, 476000000),
	VRPAIR(VLEV_120, 500000000),
	VRPAIR(VLEV_125, 533000000),
	VRPAIR(VLEV_130, 600000000),
};

static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	.tuple_tab = cclk_vlev_datasheet,
	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	.vr_settling_time = 25 /* us */,
};

static struct platform_device bfin_dpmc = {
	.name = "bfin dpmc",
	.dev = {
		.platform_data = &bfin_dmpc_vreg_data,
	},
};

static struct platform_device *cm_bf537u_devices[] __initdata = {

	&bfin_dpmc,

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
	&hitachi_fb_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	&i2c_bfin_twi_device,
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif

#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	&cm_flash_device,
#endif
};

static int __init cm_bf537u_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(cm_bf537u_devices, ARRAY_SIZE(cm_bf537u_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(cm_bf537u_init);

void bfin_get_ether_addr(char *addr)
{
	random_ether_addr(addr);
	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
}
EXPORT_SYMBOL(bfin_get_ether_addr);
Commit	Line	Data
1394f032	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2008-2009 Bluetechnix
	4	* 2005 National ICT Australia (NICTA)
	5	* Aidan Williams <aidan@nicta.com.au>
1394f032	6	*
96f1050d	7	* Licensed under the GPL-2 or later.
1394f032 BW	8	*/
	9
	10	#include <linux/device.h>
43f73fef	11	#include <linux/etherdevice.h>
1394f032 BW	12	#include <linux/platform_device.h>
	13	#include <linux/mtd/mtd.h>
	14	#include <linux/mtd/partitions.h>
8ea89497	15	#include <linux/mtd/physmap.h>
1394f032 BW	16	#include <linux/spi/spi.h>
1394f032 BW	17	#include <linux/spi/flash.h>
b964c592	18	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	19	#include <linux/usb/isp1362.h>
b964c592	20	#endif
0a87e3e9	21	#include <linux/ata_platform.h>
1f83b8f1	22	#include <linux/irq.h>
c6c4d7bb	23	#include <asm/dma.h>
1394f032	24	#include <asm/bfin5xx_spi.h>
5d448dd5	25	#include <asm/portmux.h>
14b03204	26	#include <asm/dpmc.h>
60584344	27	#include <linux/spi/mmc_spi.h>
1394f032 BW	28
	29	/*
	30	* Name the Board for the /proc/cpuinfo
	31	*/
60584344	32	const char bfin_board_name[] = "Bluetechnix CM BF537U";
1394f032 BW	33
	34	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	35	/* all SPI peripherals info goes here */
	36
	37	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	38	static struct mtd_partition bfin_spi_flash_partitions[] = {
	39	{
aa582977	40	.name = "bootloader(spi)",
1394f032 BW	41	.size = 0x00020000,
	42	.offset = 0,
	43	.mask_flags = MTD_CAP_ROM
1f83b8f1	44	}, {
aa582977	45	.name = "linux kernel(spi)",
1394f032 BW	46	.size = 0xe0000,
1394f032 BW	47	.offset = 0x20000
1f83b8f1	48	}, {
aa582977	49	.name = "file system(spi)",
1394f032 BW	50	.size = 0x700000,
	51	.offset = 0x00100000,
	52	}
	53	};
	54
	55	static struct flash_platform_data bfin_spi_flash_data = {
	56	.name = "m25p80",
	57	.parts = bfin_spi_flash_partitions,
	58	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	59	.type = "m25p64",
	60	};
	61
	62	/* SPI flash chip (m25p64) */
	63	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	64	.enable_dma = 0, /* use dma transfer with this chip*/
	65	.bits_per_word = 8,
	66	};
	67	#endif
	68
a261eec0	69	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	70	/* SPI ADC chip */
	71	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	72	.enable_dma = 1, /* use dma transfer with this chip*/
	73	.bits_per_word = 16,
	74	};
	75	#endif
	76
	77	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	78	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	79	.enable_dma = 0,
	80	.bits_per_word = 16,
	81	};
	82	#endif
	83
f3f704d3 MH	84	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	85	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	86	.enable_dma = 0,
1394f032 BW	87	.bits_per_word = 8,
	88	};
	89	#endif
	90
	91	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	92	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	93	{
	94	/* the modalias must be the same as spi device driver name */
	95	.modalias = "m25p80", /* Name of spi_driver for this device */
	96	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	97	.bus_num = 0, /* Framework bus number */
1394f032 BW	98	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	99	.platform_data = &bfin_spi_flash_data,
	100	.controller_data = &spi_flash_chip_info,
	101	.mode = SPI_MODE_3,
	102	},
	103	#endif
	104
a261eec0	105	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	106	{
	107	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	108	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	109	.bus_num = 0, /* Framework bus number */
1394f032 BW	110	.chip_select = 1, /* Framework chip select. */
	111	.platform_data = NULL, /* No spi_driver specific config */
	112	.controller_data = &spi_adc_chip_info,
	113	},
	114	#endif
	115
	116	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	117	{
dac98174	118	.modalias = "ad1836",
1394f032	119	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	120	.bus_num = 0,
1394f032 BW	121	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	122	.controller_data = &ad1836_spi_chip_info,
	123	},
	124	#endif
	125
f3f704d3	126	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
1394f032	127	{
f3f704d3 MH	128	.modalias = "mmc_spi",
f3f704d3 MH	129	.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	130	.bus_num = 0,
f3f704d3 MH	131	.chip_select = 1,
f3f704d3 MH	132	.controller_data = &mmc_spi_chip_info,
1394f032 BW	133	.mode = SPI_MODE_3,
	134	},
	135	#endif
	136	};
	137
c6c4d7bb BW	138	/* SPI (0) */
	139	static struct resource bfin_spi0_resource[] = {
	140	[0] = {
	141	.start = SPI0_REGBASE,
	142	.end = SPI0_REGBASE + 0xFF,
	143	.flags = IORESOURCE_MEM,
	144	},
	145	[1] = {
	146	.start = CH_SPI,
	147	.end = CH_SPI,
53122693 YL	148	.flags = IORESOURCE_DMA,
	149	},
	150	[2] = {
	151	.start = IRQ_SPI,
	152	.end = IRQ_SPI,
c6c4d7bb	153	.flags = IORESOURCE_IRQ,
53122693	154	},
c6c4d7bb BW	155	};
c6c4d7bb BW	156
1394f032	157	/* SPI controller data */
c6c4d7bb	158	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	159	.num_chipselect = 8,
1394f032 BW	160	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	161	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	162	};
1394f032 BW	163
c6c4d7bb BW	164	static struct platform_device bfin_spi0_device = {
	165	.name = "bfin-spi",
	166	.id = 0, /* Bus number */
	167	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	168	.resource = bfin_spi0_resource,
1394f032	169	.dev = {
c6c4d7bb	170	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	171	},
	172	};
	173	#endif /* spi master and devices */
	174
	175	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	176	static struct platform_device rtc_device = {
	177	.name = "rtc-bfin",
	178	.id = -1,
	179	};
	180	#endif
	181
0d4a89bb MH	182	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	183	static struct platform_device hitachi_fb_device = {
	184	.name = "hitachi-tx09",
	185	};
	186	#endif
	187
1394f032	188	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	189	#include <linux/smc91x.h>
	190
	191	static struct smc91x_platdata smc91x_info = {
	192	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	193	.leda = RPC_LED_100_10,
	194	.ledb = RPC_LED_TX_RX,
	195	};
	196
1394f032 BW	197	static struct resource smc91x_resources[] = {
	198	{
	199	.start = 0x20200300,
	200	.end = 0x20200300 + 16,
	201	.flags = IORESOURCE_MEM,
1f83b8f1	202	}, {
1394f032 BW	203	.start = IRQ_PF14,
	204	.end = IRQ_PF14,
	205	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	206	},
	207	};
	208
	209	static struct platform_device smc91x_device = {
	210	.name = "smc91x",
	211	.id = 0,
	212	.num_resources = ARRAY_SIZE(smc91x_resources),
	213	.resource = smc91x_resources,
61f09b5a MH	214	.dev = {
	215	.platform_data = &smc91x_info,
	216	},
1394f032 BW	217	};
	218	#endif
	219
	220	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	221	static struct resource isp1362_hcd_resources[] = {
	222	{
	223	.start = 0x20308000,
	224	.end = 0x20308000,
	225	.flags = IORESOURCE_MEM,
1f83b8f1	226	}, {
1394f032 BW	227	.start = 0x20308004,
	228	.end = 0x20308004,
	229	.flags = IORESOURCE_MEM,
1f83b8f1	230	}, {
1394f032 BW	231	.start = IRQ_PG15,
	232	.end = IRQ_PG15,
	233	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	234	},
	235	};
	236
	237	static struct isp1362_platform_data isp1362_priv = {
	238	.sel15Kres = 1,
	239	.clknotstop = 0,
	240	.oc_enable = 0,
	241	.int_act_high = 0,
	242	.int_edge_triggered = 0,
	243	.remote_wakeup_connected = 0,
	244	.no_power_switching = 1,
	245	.power_switching_mode = 0,
	246	};
	247
	248	static struct platform_device isp1362_hcd_device = {
	249	.name = "isp1362-hcd",
	250	.id = 0,
	251	.dev = {
	252	.platform_data = &isp1362_priv,
	253	},
	254	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	255	.resource = isp1362_hcd_resources,
	256	};
	257	#endif
	258
	259	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	260	static struct resource net2272_bfin_resources[] = {
	261	{
	262	.start = 0x20200000,
	263	.end = 0x20200000 + 0x100,
	264	.flags = IORESOURCE_MEM,
1f83b8f1	265	}, {
8ecc7368 MH	266	.start = IRQ_PH14,
8ecc7368 MH	267	.end = IRQ_PH14,
1394f032 BW	268	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	269	},
	270	};
	271
	272	static struct platform_device net2272_bfin_device = {
	273	.name = "net2272",
	274	.id = -1,
	275	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	276	.resource = net2272_bfin_resources,
	277	};
	278	#endif
	279
8ea89497 MF	280	#if defined(CONFIG_MTD_GPIO_ADDR) \|\| defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	281	static struct mtd_partition cm_partitions[] = {
	282	{
	283	.name = "bootloader(nor)",
	284	.size = 0x40000,
	285	.offset = 0,
	286	}, {
	287	.name = "linux kernel(nor)",
60584344	288	.size = 0x100000,
8ea89497 MF	289	.offset = MTDPART_OFS_APPEND,
	290	}, {
	291	.name = "file system(nor)",
	292	.size = MTDPART_SIZ_FULL,
	293	.offset = MTDPART_OFS_APPEND,
	294	}
	295	};
	296
	297	static struct physmap_flash_data cm_flash_data = {
	298	.width = 2,
	299	.parts = cm_partitions,
	300	.nr_parts = ARRAY_SIZE(cm_partitions),
	301	};
	302
60584344	303	static unsigned cm_flash_gpios[] = { GPIO_PH0 };
8ea89497 MF	304
	305	static struct resource cm_flash_resource[] = {
	306	{
	307	.name = "cfi_probe",
	308	.start = 0x20000000,
	309	.end = 0x201fffff,
	310	.flags = IORESOURCE_MEM,
	311	}, {
	312	.start = (unsigned long)cm_flash_gpios,
	313	.end = ARRAY_SIZE(cm_flash_gpios),
	314	.flags = IORESOURCE_IRQ,
	315	}
	316	};
	317
	318	static struct platform_device cm_flash_device = {
	319	.name = "gpio-addr-flash",
	320	.id = 0,
	321	.dev = {
	322	.platform_data = &cm_flash_data,
	323	},
	324	.num_resources = ARRAY_SIZE(cm_flash_resource),
	325	.resource = cm_flash_resource,
	326	};
	327	#endif
	328
1394f032 BW	329	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	330	static struct resource bfin_uart_resources[] = {
	331	{
	332	.start = 0xFFC00400,
	333	.end = 0xFFC004FF,
	334	.flags = IORESOURCE_MEM,
1f83b8f1	335	}, {
1394f032 BW	336	.start = 0xFFC02000,
	337	.end = 0xFFC020FF,
	338	.flags = IORESOURCE_MEM,
	339	},
	340	};
	341
	342	static struct platform_device bfin_uart_device = {
	343	.name = "bfin-uart",
	344	.id = 1,
	345	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	346	.resource = bfin_uart_resources,
	347	};
	348	#endif
	349
5be36d22	350	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	351	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	352	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	353	{
	354	.start = 0xFFC00400,
	355	.end = 0xFFC004FF,
	356	.flags = IORESOURCE_MEM,
	357	},
42bd8bcb GY	358	{
	359	.start = IRQ_UART0_RX,
	360	.end = IRQ_UART0_RX+1,
	361	.flags = IORESOURCE_IRQ,
	362	},
	363	{
	364	.start = CH_UART0_RX,
	365	.end = CH_UART0_RX+1,
	366	.flags = IORESOURCE_DMA,
	367	},
	368	};
	369	static struct platform_device bfin_sir0_device = {
	370	.name = "bfin_sir",
	371	.id = 0,
	372	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	373	.resource = bfin_sir0_resources,
	374	};
5be36d22 GY	375	#endif
5be36d22 GY	376	#ifdef CONFIG_BFIN_SIR1
42bd8bcb	377	static struct resource bfin_sir1_resources[] = {
5be36d22 GY	378	{
	379	.start = 0xFFC02000,
	380	.end = 0xFFC020FF,
	381	.flags = IORESOURCE_MEM,
	382	},
42bd8bcb GY	383	{
	384	.start = IRQ_UART1_RX,
	385	.end = IRQ_UART1_RX+1,
	386	.flags = IORESOURCE_IRQ,
	387	},
	388	{
	389	.start = CH_UART1_RX,
	390	.end = CH_UART1_RX+1,
	391	.flags = IORESOURCE_DMA,
	392	},
5be36d22	393	};
42bd8bcb	394	static struct platform_device bfin_sir1_device = {
5be36d22	395	.name = "bfin_sir",
42bd8bcb GY	396	.id = 1,
	397	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	398	.resource = bfin_sir1_resources,
5be36d22 GY	399	};
5be36d22 GY	400	#endif
42bd8bcb	401	#endif
5be36d22	402
56ce835b MF	403	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	404	static struct resource bfin_twi0_resource[] = {
	405	[0] = {
	406	.start = TWI0_REGBASE,
	407	.end = TWI0_REGBASE,
	408	.flags = IORESOURCE_MEM,
	409	},
	410	[1] = {
	411	.start = IRQ_TWI,
	412	.end = IRQ_TWI,
	413	.flags = IORESOURCE_IRQ,
	414	},
	415	};
	416
	417	static struct platform_device i2c_bfin_twi_device = {
	418	.name = "i2c-bfin-twi",
	419	.id = 0,
	420	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	421	.resource = bfin_twi0_resource,
	422	};
	423	#endif
	424
1394f032 BW	425	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	426	static struct platform_device bfin_sport0_uart_device = {
	427	.name = "bfin-sport-uart",
	428	.id = 0,
	429	};
	430
	431	static struct platform_device bfin_sport1_uart_device = {
	432	.name = "bfin-sport-uart",
	433	.id = 1,
	434	};
	435	#endif
	436
	437	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628 GY	438	static struct platform_device bfin_mii_bus = {
	439	.name = "bfin_mii_bus",
	440	};
	441
1394f032 BW	442	static struct platform_device bfin_mac_device = {
1394f032 BW	443	.name = "bfin_mac",
65319628	444	.dev.platform_data = &bfin_mii_bus,
1394f032 BW	445	};
	446	#endif
	447
c6c4d7bb	448	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
fe5aeb93	449	#define PATA_INT IRQ_PF14
c6c4d7bb BW	450
	451	static struct pata_platform_info bfin_pata_platform_data = {
	452	.ioport_shift = 2,
	453	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	454	};
	455
	456	static struct resource bfin_pata_resources[] = {
	457	{
	458	.start = 0x2030C000,
	459	.end = 0x2030C01F,
	460	.flags = IORESOURCE_MEM,
	461	},
	462	{
	463	.start = 0x2030D018,
	464	.end = 0x2030D01B,
	465	.flags = IORESOURCE_MEM,
	466	},
	467	{
	468	.start = PATA_INT,
	469	.end = PATA_INT,
	470	.flags = IORESOURCE_IRQ,
	471	},
	472	};
	473
	474	static struct platform_device bfin_pata_device = {
	475	.name = "pata_platform",
	476	.id = -1,
	477	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	478	.resource = bfin_pata_resources,
	479	.dev = {
	480	.platform_data = &bfin_pata_platform_data,
	481	}
	482	};
	483	#endif
	484
14b03204 MH	485	static const unsigned int cclk_vlev_datasheet[] =
	486	{
	487	VRPAIR(VLEV_085, 250000000),
	488	VRPAIR(VLEV_090, 376000000),
	489	VRPAIR(VLEV_095, 426000000),
	490	VRPAIR(VLEV_100, 426000000),
	491	VRPAIR(VLEV_105, 476000000),
	492	VRPAIR(VLEV_110, 476000000),
	493	VRPAIR(VLEV_115, 476000000),
	494	VRPAIR(VLEV_120, 500000000),
	495	VRPAIR(VLEV_125, 533000000),
	496	VRPAIR(VLEV_130, 600000000),
	497	};
	498
	499	static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	500	.tuple_tab = cclk_vlev_datasheet,
	501	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	502	.vr_settling_time = 25 /* us */,
	503	};
	504
	505	static struct platform_device bfin_dpmc = {
	506	.name = "bfin dpmc",
	507	.dev = {
	508	.platform_data = &bfin_dmpc_vreg_data,
	509	},
	510	};
	511
60584344	512	static struct platform_device *cm_bf537u_devices[] __initdata = {
14b03204 MH	513
	514	&bfin_dpmc,
	515
0d4a89bb MH	516	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	517	&hitachi_fb_device,
	518	#endif
	519
1394f032 BW	520	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	521	&rtc_device,
	522	#endif
	523
	524	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	525	&bfin_uart_device,
	526	#endif
	527
5be36d22	528	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	529	#ifdef CONFIG_BFIN_SIR0
	530	&bfin_sir0_device,
	531	#endif
	532	#ifdef CONFIG_BFIN_SIR1
	533	&bfin_sir1_device,
	534	#endif
5be36d22 GY	535	#endif
5be36d22 GY	536
56ce835b MF	537	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	538	&i2c_bfin_twi_device,
	539	#endif
	540
1394f032 BW	541	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	542	&bfin_sport0_uart_device,
	543	&bfin_sport1_uart_device,
	544	#endif
	545
	546	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	547	&isp1362_hcd_device,
	548	#endif
	549
	550	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	551	&smc91x_device,
	552	#endif
	553
	554	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628	555	&bfin_mii_bus,
1394f032 BW	556	&bfin_mac_device,
	557	#endif
	558
	559	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	560	&net2272_bfin_device,
	561	#endif
	562
	563	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb BW	564	&bfin_spi0_device,
	565	#endif
	566
	567	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	568	&bfin_pata_device,
1394f032	569	#endif
8ea89497 MF	570
	571	#if defined(CONFIG_MTD_GPIO_ADDR) \|\| defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	572	&cm_flash_device,
	573	#endif
1394f032 BW	574	};
1394f032 BW	575
60584344	576	static int __init cm_bf537u_init(void)
1394f032	577	{
b85d858b	578	printk(KERN_INFO "%s(): registering device resources\n", __func__);
60584344	579	platform_add_devices(cm_bf537u_devices, ARRAY_SIZE(cm_bf537u_devices));
1394f032 BW	580	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	581	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	582	#endif
c6c4d7bb BW	583
	584	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	585	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
	586	#endif
1394f032 BW	587	return 0;
	588	}
	589
60584344	590	arch_initcall(cm_bf537u_init);
137b1529	591
9862cc52	592	void bfin_get_ether_addr(char *addr)
137b1529 MF	593	{
	594	random_ether_addr(addr);
	595	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
	596	}
9862cc52	597	EXPORT_SYMBOL(bfin_get_ether_addr);