[mirror_ubuntu-zesty-kernel.git] / arch / blackfin / mach-bf537 / boards / pnav10.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/etherdevice.h>
#include <linux/export.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>

#include <linux/spi/ad7877.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "ADI PNAV-1.0";

/*
 *  Driver needs to know address, irq and flag pin.
 */

#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
static struct resource bfin_pcmcia_cf_resources[] = {
	{
		.start = 0x20310000, /* IO PORT */
		.end = 0x20312000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20311000, /* Attribute Memory */
		.end = 0x20311FFF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF4,
		.end = IRQ_PF4,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	}, {
		.start = 6, /* Card Detect PF6 */
		.end = 6,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pcmcia_cf_device = {
	.name = "bfin_cf_pcmcia",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	.resource = bfin_pcmcia_cf_resources,
};
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {

		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};
static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
#include <linux/bfin_mac.h>
#include <linux/export.h>
static const unsigned short bfin_mac_peripherals[] = P_RMII0;

static struct bfin_phydev_platform_data bfin_phydev_data[] = {
	{
		.addr = 1,
		.irq = IRQ_MAC_PHYINT,
	},
};

static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
	.phydev_number = 1,
	.phydev_data = bfin_phydev_data,
	.phy_mode = PHY_INTERFACE_MODE_RMII,
	.mac_peripherals = bfin_mac_peripherals,
};

static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
	.dev = {
		.platform_data = &bfin_mii_bus_data,
	}
};

static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev = {
		.platform_data = &bfin_mii_bus,
	}
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	.enable_dma = 0,
};
#endif

#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
static const struct ad7877_platform_data bfin_ad7877_ts_info = {
	.model			= 7877,
	.vref_delay_usecs	= 50,	/* internal, no capacitor */
	.x_plate_ohms		= 419,
	.y_plate_ohms		= 486,
	.pressure_max		= 1000,
	.pressure_min		= 0,
	.stopacq_polarity 	= 1,
	.first_conversion_delay = 3,
	.acquisition_time 	= 1,
	.averaging 		= 1,
	.pen_down_acc_interval 	= 1,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
	|| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
	{
		.modalias = "ad183x",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 4,
	},
#endif
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 5,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
{
	.modalias		= "ad7877",
	.platform_data		= &bfin_ad7877_ts_info,
	.irq			= IRQ_PF2,
	.max_speed_hz		= 12500000,     /* max spi clock (SCK) speed in HZ */
	.bus_num		= 0,
	.chip_select  		= 5,
},
#endif

};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
	.name = "bf537-lq035",
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = UART0_THR,
		.end = UART0_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_TX,
		.end = IRQ_UART0_TX,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_ERROR,
		.end = IRQ_UART0_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_TX,
		.end = CH_UART0_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX,
		.flags = IORESOURCE_DMA,
	},
};

static unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
static struct resource bfin_uart1_resources[] = {
	{
		.start = UART1_THR,
		.end = UART1_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_TX,
		.end = IRQ_UART1_TX,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART1_ERROR,
		.end = IRQ_UART1_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_TX,
		.end = CH_UART1_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX,
		.flags = IORESOURCE_DMA,
	},
};

static unsigned short bfin_uart1_peripherals[] = {
	P_UART1_TX, P_UART1_RX, 0
};

static struct platform_device bfin_uart1_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
	.resource = bfin_uart1_resources,
	.dev = {
		.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
	{
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
};
#endif
#endif

static struct platform_device *stamp_devices[] __initdata = {
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	&bfin_pcmcia_cf_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
	&bfin_fb_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
	&bfin_uart1_device,
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
#endif
#endif
};

static int __init pnav_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
	spi_register_board_info(bfin_spi_board_info,
				ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(pnav_init);

static struct platform_device *stamp_early_devices[] __initdata = {
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
	&bfin_uart1_device,
#endif
#endif
};

void __init native_machine_early_platform_add_devices(void)
{
	printk(KERN_INFO "register early platform devices\n");
	early_platform_add_devices(stamp_early_devices,
		ARRAY_SIZE(stamp_early_devices));
}

int bfin_get_ether_addr(char *addr)
{
	return 1;
}
EXPORT_SYMBOL(bfin_get_ether_addr);
Commit	Line	Data
1394f032	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2005 National ICT Australia (NICTA)
	4	* Aidan Williams <aidan@nicta.com.au>
1394f032	5	*
96f1050d	6	* Licensed under the GPL-2 or later.
1394f032 BW	7	*/
	8
	9	#include <linux/device.h>
43f73fef	10	#include <linux/etherdevice.h>
90590543	11	#include <linux/export.h>
1394f032 BW	12	#include <linux/platform_device.h>
	13	#include <linux/mtd/mtd.h>
	14	#include <linux/mtd/partitions.h>
	15	#include <linux/spi/spi.h>
	16	#include <linux/spi/flash.h>
1f83b8f1	17	#include <linux/irq.h>
c6c4d7bb	18	#include <asm/dma.h>
1394f032	19	#include <asm/bfin5xx_spi.h>
5d448dd5	20	#include <asm/portmux.h>
1394f032 BW	21
	22	#include <linux/spi/ad7877.h>
	23
	24	/*
	25	* Name the Board for the /proc/cpuinfo
	26	*/
fe85cad2	27	const char bfin_board_name[] = "ADI PNAV-1.0";
1394f032 BW	28
	29	/*
	30	* Driver needs to know address, irq and flag pin.
	31	*/
	32
	33	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	34	static struct resource bfin_pcmcia_cf_resources[] = {
	35	{
	36	.start = 0x20310000, /* IO PORT */
	37	.end = 0x20312000,
	38	.flags = IORESOURCE_MEM,
1f83b8f1	39	}, {
d2d50aa9	40	.start = 0x20311000, /* Attribute Memory */
1394f032 BW	41	.end = 0x20311FFF,
1394f032 BW	42	.flags = IORESOURCE_MEM,
1f83b8f1	43	}, {
1394f032 BW	44	.start = IRQ_PF4,
	45	.end = IRQ_PF4,
	46	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1	47	}, {
1394f032 BW	48	.start = 6, /* Card Detect PF6 */
	49	.end = 6,
	50	.flags = IORESOURCE_IRQ,
	51	},
	52	};
	53
	54	static struct platform_device bfin_pcmcia_cf_device = {
	55	.name = "bfin_cf_pcmcia",
	56	.id = -1,
	57	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	58	.resource = bfin_pcmcia_cf_resources,
	59	};
	60	#endif
	61
	62	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	63	static struct platform_device rtc_device = {
	64	.name = "rtc-bfin",
	65	.id = -1,
	66	};
	67	#endif
	68
	69	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	70	#include <linux/smc91x.h>
	71
	72	static struct smc91x_platdata smc91x_info = {
	73	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	74	.leda = RPC_LED_100_10,
	75	.ledb = RPC_LED_TX_RX,
	76	};
	77
1394f032 BW	78	static struct resource smc91x_resources[] = {
	79	{
	80	.name = "smc91x-regs",
	81	.start = 0x20300300,
	82	.end = 0x20300300 + 16,
	83	.flags = IORESOURCE_MEM,
1f83b8f1	84	}, {
1394f032 BW	85
	86	.start = IRQ_PF7,
	87	.end = IRQ_PF7,
	88	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	89	},
	90	};
	91	static struct platform_device smc91x_device = {
	92	.name = "smc91x",
	93	.id = 0,
	94	.num_resources = ARRAY_SIZE(smc91x_resources),
	95	.resource = smc91x_resources,
61f09b5a MH	96	.dev = {
	97	.platform_data = &smc91x_info,
	98	},
1394f032 BW	99	};
	100	#endif
	101
1394f032	102	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
02460d08	103	#include <linux/bfin_mac.h>
8dc7a9c8	104	#include <linux/export.h>
02460d08 SZ	105	static const unsigned short bfin_mac_peripherals[] = P_RMII0;
	106
	107	static struct bfin_phydev_platform_data bfin_phydev_data[] = {
	108	{
	109	.addr = 1,
	110	.irq = IRQ_MAC_PHYINT,
	111	},
	112	};
	113
	114	static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
	115	.phydev_number = 1,
	116	.phydev_data = bfin_phydev_data,
	117	.phy_mode = PHY_INTERFACE_MODE_RMII,
	118	.mac_peripherals = bfin_mac_peripherals,
	119	};
	120
65319628 GY	121	static struct platform_device bfin_mii_bus = {
65319628 GY	122	.name = "bfin_mii_bus",
02460d08 SZ	123	.dev = {
	124	.platform_data = &bfin_mii_bus_data,
	125	}
65319628 GY	126	};
65319628 GY	127
1394f032 BW	128	static struct platform_device bfin_mac_device = {
1394f032 BW	129	.name = "bfin_mac",
02460d08 SZ	130	.dev = {
	131	.platform_data = &bfin_mii_bus,
	132	}
1394f032 BW	133	};
	134	#endif
	135
	136	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	137	static struct resource net2272_bfin_resources[] = {
	138	{
	139	.start = 0x20300000,
	140	.end = 0x20300000 + 0x100,
	141	.flags = IORESOURCE_MEM,
1f83b8f1	142	}, {
1394f032 BW	143	.start = IRQ_PF7,
	144	.end = IRQ_PF7,
	145	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	146	},
	147	};
	148
	149	static struct platform_device net2272_bfin_device = {
	150	.name = "net2272",
	151	.id = -1,
	152	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	153	.resource = net2272_bfin_resources,
	154	};
	155	#endif
	156
7d157fb0	157	#if defined(CONFIG_SPI_BFIN5XX) \|\| defined(CONFIG_SPI_BFIN5XX_MODULE)
1394f032 BW	158	/* all SPI peripherals info goes here */
	159
	160	#if defined(CONFIG_MTD_M25P80) \
	161	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	162	static struct mtd_partition bfin_spi_flash_partitions[] = {
	163	{
aa582977	164	.name = "bootloader(spi)",
1394f032 BW	165	.size = 0x00020000,
	166	.offset = 0,
	167	.mask_flags = MTD_CAP_ROM
1f83b8f1	168	}, {
aa582977	169	.name = "linux kernel(spi)",
1394f032 BW	170	.size = 0xe0000,
1394f032 BW	171	.offset = 0x20000
1f83b8f1	172	}, {
aa582977	173	.name = "file system(spi)",
1394f032 BW	174	.size = 0x700000,
	175	.offset = 0x00100000,
	176	}
	177	};
	178
	179	static struct flash_platform_data bfin_spi_flash_data = {
	180	.name = "m25p80",
	181	.parts = bfin_spi_flash_partitions,
	182	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	183	.type = "m25p64",
	184	};
	185
	186	/* SPI flash chip (m25p64) */
	187	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	188	.enable_dma = 0, /* use dma transfer with this chip*/
1394f032 BW	189	};
	190	#endif
	191
f3f704d3 MH	192	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	193	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	194	.enable_dma = 0,
1394f032 BW	195	};
	196	#endif
	197
1394f032	198	#if defined(CONFIG_TOUCHSCREEN_AD7877) \|\| defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1394f032 BW	199	static const struct ad7877_platform_data bfin_ad7877_ts_info = {
	200	.model = 7877,
	201	.vref_delay_usecs = 50, /* internal, no capacitor */
	202	.x_plate_ohms = 419,
	203	.y_plate_ohms = 486,
	204	.pressure_max = 1000,
	205	.pressure_min = 0,
	206	.stopacq_polarity = 1,
	207	.first_conversion_delay = 3,
	208	.acquisition_time = 1,
	209	.averaging = 1,
	210	.pen_down_acc_interval = 1,
	211	};
	212	#endif
	213
	214	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	215	#if defined(CONFIG_MTD_M25P80) \
	216	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	217	{
	218	/* the modalias must be the same as spi device driver name */
	219	.modalias = "m25p80", /* Name of spi_driver for this device */
	220	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	221	.bus_num = 0, /* Framework bus number */
1394f032 BW	222	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	223	.platform_data = &bfin_spi_flash_data,
	224	.controller_data = &spi_flash_chip_info,
	225	.mode = SPI_MODE_3,
	226	},
	227	#endif
	228
7ba80063 BS	229	#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
7ba80063 BS	230	\|\| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032	231	{
7ba80063	232	.modalias = "ad183x",
1394f032	233	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	234	.bus_num = 0,
7ba80063	235	.chip_select = 4,
1394f032 BW	236	},
1394f032 BW	237	#endif
f3f704d3	238	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
1394f032	239	{
f3f704d3	240	.modalias = "mmc_spi",
1394f032	241	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	242	.bus_num = 0,
f3f704d3 MH	243	.chip_select = 5,
f3f704d3 MH	244	.controller_data = &mmc_spi_chip_info,
1394f032 BW	245	.mode = SPI_MODE_3,
	246	},
	247	#endif
1394f032 BW	248	#if defined(CONFIG_TOUCHSCREEN_AD7877) \|\| defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
	249	{
	250	.modalias = "ad7877",
	251	.platform_data = &bfin_ad7877_ts_info,
	252	.irq = IRQ_PF2,
	253	.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966	254	.bus_num = 0,
1394f032	255	.chip_select = 5,
1394f032 BW	256	},
	257	#endif
	258
	259	};
	260
c6c4d7bb BW	261	/* SPI (0) */
	262	static struct resource bfin_spi0_resource[] = {
	263	[0] = {
	264	.start = SPI0_REGBASE,
	265	.end = SPI0_REGBASE + 0xFF,
	266	.flags = IORESOURCE_MEM,
	267	},
	268	[1] = {
	269	.start = CH_SPI,
	270	.end = CH_SPI,
53122693 YL	271	.flags = IORESOURCE_DMA,
	272	},
	273	[2] = {
	274	.start = IRQ_SPI,
	275	.end = IRQ_SPI,
c6c4d7bb	276	.flags = IORESOURCE_IRQ,
53122693	277	},
c6c4d7bb BW	278	};
c6c4d7bb BW	279
1394f032	280	/* SPI controller data */
c6c4d7bb	281	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	282	.num_chipselect = 8,
1394f032 BW	283	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	284	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	285	};
1394f032 BW	286
c6c4d7bb BW	287	static struct platform_device bfin_spi0_device = {
	288	.name = "bfin-spi",
	289	.id = 0, /* Bus number */
	290	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	291	.resource = bfin_spi0_resource,
1394f032	292	.dev = {
c6c4d7bb	293	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	294	},
	295	};
	296	#endif /* spi master and devices */
	297
	298	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	299	static struct platform_device bfin_fb_device = {
c6c4d7bb	300	.name = "bf537-lq035",
1394f032 BW	301	};
	302	#endif
	303
	304	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	305	#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea SZ	306	static struct resource bfin_uart0_resources[] = {
1394f032	307	{
6bd1fbea SZ	308	.start = UART0_THR,
6bd1fbea SZ	309	.end = UART0_GCTL+2,
1394f032	310	.flags = IORESOURCE_MEM,
6bd1fbea	311	},
edb0a640 SZ	312	{
	313	.start = IRQ_UART0_TX,
	314	.end = IRQ_UART0_TX,
	315	.flags = IORESOURCE_IRQ,
	316	},
6bd1fbea SZ	317	{
6bd1fbea SZ	318	.start = IRQ_UART0_RX,
edb0a640	319	.end = IRQ_UART0_RX,
6bd1fbea SZ	320	.flags = IORESOURCE_IRQ,
	321	},
	322	{
	323	.start = IRQ_UART0_ERROR,
	324	.end = IRQ_UART0_ERROR,
	325	.flags = IORESOURCE_IRQ,
	326	},
	327	{
	328	.start = CH_UART0_TX,
	329	.end = CH_UART0_TX,
	330	.flags = IORESOURCE_DMA,
	331	},
	332	{
	333	.start = CH_UART0_RX,
	334	.end = CH_UART0_RX,
	335	.flags = IORESOURCE_DMA,
	336	},
	337	};
	338
a8b19886	339	static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea SZ	340	P_UART0_TX, P_UART0_RX, 0
	341	};
	342
	343	static struct platform_device bfin_uart0_device = {
	344	.name = "bfin-uart",
	345	.id = 0,
	346	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	347	.resource = bfin_uart0_resources,
	348	.dev = {
	349	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	350	},
	351	};
	352	#endif
	353	#ifdef CONFIG_SERIAL_BFIN_UART1
	354	static struct resource bfin_uart1_resources[] = {
	355	{
	356	.start = UART1_THR,
	357	.end = UART1_GCTL+2,
1394f032 BW	358	.flags = IORESOURCE_MEM,
1394f032 BW	359	},
edb0a640 SZ	360	{
	361	.start = IRQ_UART1_TX,
	362	.end = IRQ_UART1_TX,
	363	.flags = IORESOURCE_IRQ,
	364	},
6bd1fbea SZ	365	{
6bd1fbea SZ	366	.start = IRQ_UART1_RX,
edb0a640	367	.end = IRQ_UART1_RX,
6bd1fbea SZ	368	.flags = IORESOURCE_IRQ,
	369	},
	370	{
	371	.start = IRQ_UART1_ERROR,
	372	.end = IRQ_UART1_ERROR,
	373	.flags = IORESOURCE_IRQ,
	374	},
	375	{
	376	.start = CH_UART1_TX,
	377	.end = CH_UART1_TX,
	378	.flags = IORESOURCE_DMA,
	379	},
	380	{
	381	.start = CH_UART1_RX,
	382	.end = CH_UART1_RX,
	383	.flags = IORESOURCE_DMA,
	384	},
1394f032 BW	385	};
1394f032 BW	386
a8b19886	387	static unsigned short bfin_uart1_peripherals[] = {
6bd1fbea SZ	388	P_UART1_TX, P_UART1_RX, 0
	389	};
	390
	391	static struct platform_device bfin_uart1_device = {
1394f032 BW	392	.name = "bfin-uart",
1394f032 BW	393	.id = 1,
6bd1fbea SZ	394	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
	395	.resource = bfin_uart1_resources,
	396	.dev = {
	397	.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	398	},
1394f032 BW	399	};
1394f032 BW	400	#endif
6bd1fbea	401	#endif
1394f032	402
5be36d22	403	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	404	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	405	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	406	{
	407	.start = 0xFFC00400,
	408	.end = 0xFFC004FF,
	409	.flags = IORESOURCE_MEM,
	410	},
42bd8bcb GY	411	{
	412	.start = IRQ_UART0_RX,
	413	.end = IRQ_UART0_RX+1,
	414	.flags = IORESOURCE_IRQ,
	415	},
	416	{
	417	.start = CH_UART0_RX,
	418	.end = CH_UART0_RX+1,
	419	.flags = IORESOURCE_DMA,
	420	},
	421	};
	422
	423	static struct platform_device bfin_sir0_device = {
	424	.name = "bfin_sir",
	425	.id = 0,
	426	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	427	.resource = bfin_sir0_resources,
	428	};
5be36d22 GY	429	#endif
5be36d22 GY	430	#ifdef CONFIG_BFIN_SIR1
42bd8bcb	431	static struct resource bfin_sir1_resources[] = {
5be36d22 GY	432	{
	433	.start = 0xFFC02000,
	434	.end = 0xFFC020FF,
	435	.flags = IORESOURCE_MEM,
	436	},
42bd8bcb GY	437	{
	438	.start = IRQ_UART1_RX,
	439	.end = IRQ_UART1_RX+1,
	440	.flags = IORESOURCE_IRQ,
	441	},
	442	{
	443	.start = CH_UART1_RX,
	444	.end = CH_UART1_RX+1,
	445	.flags = IORESOURCE_DMA,
	446	},
5be36d22 GY	447	};
5be36d22 GY	448
42bd8bcb	449	static struct platform_device bfin_sir1_device = {
5be36d22	450	.name = "bfin_sir",
42bd8bcb GY	451	.id = 1,
	452	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	453	.resource = bfin_sir1_resources,
5be36d22 GY	454	};
5be36d22 GY	455	#endif
42bd8bcb	456	#endif
1394f032 BW	457
	458	static struct platform_device *stamp_devices[] __initdata = {
	459	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	460	&bfin_pcmcia_cf_device,
	461	#endif
	462
	463	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	464	&rtc_device,
	465	#endif
	466
1394f032 BW	467	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	468	&smc91x_device,
	469	#endif
	470
	471	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628	472	&bfin_mii_bus,
1394f032 BW	473	&bfin_mac_device,
	474	#endif
	475
	476	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	477	&net2272_bfin_device,
	478	#endif
	479
7d157fb0	480	#if defined(CONFIG_SPI_BFIN5XX) \|\| defined(CONFIG_SPI_BFIN5XX_MODULE)
c6c4d7bb	481	&bfin_spi0_device,
1394f032 BW	482	#endif
	483
	484	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	485	&bfin_fb_device,
	486	#endif
	487
	488	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	489	#ifdef CONFIG_SERIAL_BFIN_UART0
	490	&bfin_uart0_device,
	491	#endif
	492	#ifdef CONFIG_SERIAL_BFIN_UART1
	493	&bfin_uart1_device,
	494	#endif
1394f032	495	#endif
5be36d22 GY	496
5be36d22 GY	497	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	498	#ifdef CONFIG_BFIN_SIR0
	499	&bfin_sir0_device,
	500	#endif
	501	#ifdef CONFIG_BFIN_SIR1
	502	&bfin_sir1_device,
	503	#endif
5be36d22	504	#endif
1394f032 BW	505	};
1394f032 BW	506
7f6678c5	507	static int __init pnav_init(void)
1394f032	508	{
b85d858b	509	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032	510	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
7d157fb0	511	#if defined(CONFIG_SPI_BFIN5XX) \|\| defined(CONFIG_SPI_BFIN5XX_MODULE)
1394f032 BW	512	spi_register_board_info(bfin_spi_board_info,
	513	ARRAY_SIZE(bfin_spi_board_info));
	514	#endif
	515	return 0;
	516	}
	517
7f6678c5	518	arch_initcall(pnav_init);
137b1529	519
c13ce9fd SZ	520	static struct platform_device *stamp_early_devices[] __initdata = {
	521	#if defined(CONFIG_SERIAL_BFIN_CONSOLE) \|\| defined(CONFIG_EARLY_PRINTK)
	522	#ifdef CONFIG_SERIAL_BFIN_UART0
	523	&bfin_uart0_device,
	524	#endif
	525	#ifdef CONFIG_SERIAL_BFIN_UART1
	526	&bfin_uart1_device,
	527	#endif
	528	#endif
	529	};
	530
	531	void __init native_machine_early_platform_add_devices(void)
	532	{
	533	printk(KERN_INFO "register early platform devices\n");
	534	early_platform_add_devices(stamp_early_devices,
	535	ARRAY_SIZE(stamp_early_devices));
	536	}
	537
0eceb82f	538	int bfin_get_ether_addr(char *addr)
137b1529	539	{
0eceb82f	540	return 1;
137b1529	541	}
9862cc52	542	EXPORT_SYMBOL(bfin_get_ether_addr);