[mirror_ubuntu-zesty-kernel.git] / arch / blackfin / mach-bf537 / boards / pnav10.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>

#include <linux/spi/ad7877.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "ADI PNAV-1.0";

/*
 *  Driver needs to know address, irq and flag pin.
 */

#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
static struct resource bfin_pcmcia_cf_resources[] = {
	{
		.start = 0x20310000, /* IO PORT */
		.end = 0x20312000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20311000, /* Attribute Memory */
		.end = 0x20311FFF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF4,
		.end = IRQ_PF4,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	}, {
		.start = 6, /* Card Detect PF6 */
		.end = 6,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pcmcia_cf_device = {
	.name = "bfin_cf_pcmcia",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	.resource = bfin_pcmcia_cf_resources,
};
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {

		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};
static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
#include <linux/bfin_mac.h>
static const unsigned short bfin_mac_peripherals[] = P_RMII0;

static struct bfin_phydev_platform_data bfin_phydev_data[] = {
	{
		.addr = 1,
		.irq = IRQ_MAC_PHYINT,
	},
};

static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
	.phydev_number = 1,
	.phydev_data = bfin_phydev_data,
	.phy_mode = PHY_INTERFACE_MODE_RMII,
	.mac_peripherals = bfin_mac_peripherals,
};

static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
	.dev = {
		.platform_data = &bfin_mii_bus_data,
	}
};

static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev = {
		.platform_data = &bfin_mii_bus,
	}
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_BFIN_SPI_ADC) \
	|| defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
	|| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};

static const struct ad7877_platform_data bfin_ad7877_ts_info = {
	.model			= 7877,
	.vref_delay_usecs	= 50,	/* internal, no capacitor */
	.x_plate_ohms		= 419,
	.y_plate_ohms		= 486,
	.pressure_max		= 1000,
	.pressure_min		= 0,
	.stopacq_polarity 	= 1,
	.first_conversion_delay = 3,
	.acquisition_time 	= 1,
	.averaging 		= 1,
	.pen_down_acc_interval 	= 1,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) \
	|| defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
	|| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
	{
		.modalias = "ad183x",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 4,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 5,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
{
	.modalias		= "ad7877",
	.platform_data		= &bfin_ad7877_ts_info,
	.irq			= IRQ_PF2,
	.max_speed_hz		= 12500000,     /* max spi clock (SCK) speed in HZ */
	.bus_num		= 0,
	.chip_select  		= 5,
	.controller_data = &spi_ad7877_chip_info,
},
#endif

};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
	.name = "bf537-lq035",
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = UART0_THR,
		.end = UART0_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_ERROR,
		.end = IRQ_UART0_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_TX,
		.end = CH_UART0_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX,
		.flags = IORESOURCE_DMA,
	},
};

unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
static struct resource bfin_uart1_resources[] = {
	{
		.start = UART1_THR,
		.end = UART1_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART1_ERROR,
		.end = IRQ_UART1_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_TX,
		.end = CH_UART1_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX,
		.flags = IORESOURCE_DMA,
	},
};

unsigned short bfin_uart1_peripherals[] = {
	P_UART1_TX, P_UART1_RX, 0
};

static struct platform_device bfin_uart1_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
	.resource = bfin_uart1_resources,
	.dev = {
		.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
	{
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
};
#endif
#endif

static struct platform_device *stamp_devices[] __initdata = {
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	&bfin_pcmcia_cf_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
	&bfin_fb_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
	&bfin_uart1_device,
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
#endif
#endif
};

static int __init pnav_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info,
				ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(pnav_init);

static struct platform_device *stamp_early_devices[] __initdata = {
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
	&bfin_uart1_device,
#endif
#endif
};

void __init native_machine_early_platform_add_devices(void)
{
	printk(KERN_INFO "register early platform devices\n");
	early_platform_add_devices(stamp_early_devices,
		ARRAY_SIZE(stamp_early_devices));
}

void bfin_get_ether_addr(char *addr)
{
	random_ether_addr(addr);
	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
}
EXPORT_SYMBOL(bfin_get_ether_addr);
Commit	Line	Data
1394f032	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2005 National ICT Australia (NICTA)
	4	* Aidan Williams <aidan@nicta.com.au>
1394f032	5	*
96f1050d	6	* Licensed under the GPL-2 or later.
1394f032 BW	7	*/
	8
	9	#include <linux/device.h>
43f73fef	10	#include <linux/etherdevice.h>
1394f032 BW	11	#include <linux/platform_device.h>
	12	#include <linux/mtd/mtd.h>
	13	#include <linux/mtd/partitions.h>
	14	#include <linux/spi/spi.h>
	15	#include <linux/spi/flash.h>
1f83b8f1	16	#include <linux/irq.h>
c6c4d7bb	17	#include <asm/dma.h>
1394f032	18	#include <asm/bfin5xx_spi.h>
5d448dd5	19	#include <asm/portmux.h>
1394f032 BW	20
	21	#include <linux/spi/ad7877.h>
	22
	23	/*
	24	* Name the Board for the /proc/cpuinfo
	25	*/
fe85cad2	26	const char bfin_board_name[] = "ADI PNAV-1.0";
1394f032 BW	27
	28	/*
	29	* Driver needs to know address, irq and flag pin.
	30	*/
	31
	32	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	33	static struct resource bfin_pcmcia_cf_resources[] = {
	34	{
	35	.start = 0x20310000, /* IO PORT */
	36	.end = 0x20312000,
	37	.flags = IORESOURCE_MEM,
1f83b8f1	38	}, {
d2d50aa9	39	.start = 0x20311000, /* Attribute Memory */
1394f032 BW	40	.end = 0x20311FFF,
1394f032 BW	41	.flags = IORESOURCE_MEM,
1f83b8f1	42	}, {
1394f032 BW	43	.start = IRQ_PF4,
	44	.end = IRQ_PF4,
	45	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1	46	}, {
1394f032 BW	47	.start = 6, /* Card Detect PF6 */
	48	.end = 6,
	49	.flags = IORESOURCE_IRQ,
	50	},
	51	};
	52
	53	static struct platform_device bfin_pcmcia_cf_device = {
	54	.name = "bfin_cf_pcmcia",
	55	.id = -1,
	56	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	57	.resource = bfin_pcmcia_cf_resources,
	58	};
	59	#endif
	60
	61	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	62	static struct platform_device rtc_device = {
	63	.name = "rtc-bfin",
	64	.id = -1,
	65	};
	66	#endif
	67
	68	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	69	#include <linux/smc91x.h>
	70
	71	static struct smc91x_platdata smc91x_info = {
	72	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	73	.leda = RPC_LED_100_10,
	74	.ledb = RPC_LED_TX_RX,
	75	};
	76
1394f032 BW	77	static struct resource smc91x_resources[] = {
	78	{
	79	.name = "smc91x-regs",
	80	.start = 0x20300300,
	81	.end = 0x20300300 + 16,
	82	.flags = IORESOURCE_MEM,
1f83b8f1	83	}, {
1394f032 BW	84
	85	.start = IRQ_PF7,
	86	.end = IRQ_PF7,
	87	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	88	},
	89	};
	90	static struct platform_device smc91x_device = {
	91	.name = "smc91x",
	92	.id = 0,
	93	.num_resources = ARRAY_SIZE(smc91x_resources),
	94	.resource = smc91x_resources,
61f09b5a MH	95	.dev = {
	96	.platform_data = &smc91x_info,
	97	},
1394f032 BW	98	};
	99	#endif
	100
1394f032	101	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
02460d08 SZ	102	#include <linux/bfin_mac.h>
	103	static const unsigned short bfin_mac_peripherals[] = P_RMII0;
	104
	105	static struct bfin_phydev_platform_data bfin_phydev_data[] = {
	106	{
	107	.addr = 1,
	108	.irq = IRQ_MAC_PHYINT,
	109	},
	110	};
	111
	112	static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
	113	.phydev_number = 1,
	114	.phydev_data = bfin_phydev_data,
	115	.phy_mode = PHY_INTERFACE_MODE_RMII,
	116	.mac_peripherals = bfin_mac_peripherals,
	117	};
	118
65319628 GY	119	static struct platform_device bfin_mii_bus = {
65319628 GY	120	.name = "bfin_mii_bus",
02460d08 SZ	121	.dev = {
	122	.platform_data = &bfin_mii_bus_data,
	123	}
65319628 GY	124	};
65319628 GY	125
1394f032 BW	126	static struct platform_device bfin_mac_device = {
1394f032 BW	127	.name = "bfin_mac",
02460d08 SZ	128	.dev = {
	129	.platform_data = &bfin_mii_bus,
	130	}
1394f032 BW	131	};
	132	#endif
	133
	134	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	135	static struct resource net2272_bfin_resources[] = {
	136	{
	137	.start = 0x20300000,
	138	.end = 0x20300000 + 0x100,
	139	.flags = IORESOURCE_MEM,
1f83b8f1	140	}, {
1394f032 BW	141	.start = IRQ_PF7,
	142	.end = IRQ_PF7,
	143	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	144	},
	145	};
	146
	147	static struct platform_device net2272_bfin_device = {
	148	.name = "net2272",
	149	.id = -1,
	150	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	151	.resource = net2272_bfin_resources,
	152	};
	153	#endif
	154
	155	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	156	/* all SPI peripherals info goes here */
	157
	158	#if defined(CONFIG_MTD_M25P80) \
	159	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	160	static struct mtd_partition bfin_spi_flash_partitions[] = {
	161	{
aa582977	162	.name = "bootloader(spi)",
1394f032 BW	163	.size = 0x00020000,
	164	.offset = 0,
	165	.mask_flags = MTD_CAP_ROM
1f83b8f1	166	}, {
aa582977	167	.name = "linux kernel(spi)",
1394f032 BW	168	.size = 0xe0000,
1394f032 BW	169	.offset = 0x20000
1f83b8f1	170	}, {
aa582977	171	.name = "file system(spi)",
1394f032 BW	172	.size = 0x700000,
	173	.offset = 0x00100000,
	174	}
	175	};
	176
	177	static struct flash_platform_data bfin_spi_flash_data = {
	178	.name = "m25p80",
	179	.parts = bfin_spi_flash_partitions,
	180	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	181	.type = "m25p64",
	182	};
	183
	184	/* SPI flash chip (m25p64) */
	185	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	186	.enable_dma = 0, /* use dma transfer with this chip*/
	187	.bits_per_word = 8,
	188	};
	189	#endif
	190
a261eec0 MF	191	#if defined(CONFIG_BFIN_SPI_ADC) \
a261eec0 MF	192	\|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	193	/* SPI ADC chip */
	194	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	195	.enable_dma = 1, /* use dma transfer with this chip*/
	196	.bits_per_word = 16,
	197	};
	198	#endif
	199
7ba80063 BS	200	#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
7ba80063 BS	201	\|\| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032 BW	202	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	203	.enable_dma = 0,
	204	.bits_per_word = 16,
	205	};
	206	#endif
	207
f3f704d3 MH	208	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	209	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	210	.enable_dma = 0,
1394f032 BW	211	.bits_per_word = 8,
	212	};
	213	#endif
	214
1394f032 BW	215	#if defined(CONFIG_TOUCHSCREEN_AD7877) \|\| defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1394f032 BW	216	static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032 BW	217	.enable_dma = 0,
	218	.bits_per_word = 16,
	219	};
	220
	221	static const struct ad7877_platform_data bfin_ad7877_ts_info = {
	222	.model = 7877,
	223	.vref_delay_usecs = 50, /* internal, no capacitor */
	224	.x_plate_ohms = 419,
	225	.y_plate_ohms = 486,
	226	.pressure_max = 1000,
	227	.pressure_min = 0,
	228	.stopacq_polarity = 1,
	229	.first_conversion_delay = 3,
	230	.acquisition_time = 1,
	231	.averaging = 1,
	232	.pen_down_acc_interval = 1,
	233	};
	234	#endif
	235
	236	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	237	#if defined(CONFIG_MTD_M25P80) \
	238	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	239	{
	240	/* the modalias must be the same as spi device driver name */
	241	.modalias = "m25p80", /* Name of spi_driver for this device */
	242	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	243	.bus_num = 0, /* Framework bus number */
1394f032 BW	244	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	245	.platform_data = &bfin_spi_flash_data,
	246	.controller_data = &spi_flash_chip_info,
	247	.mode = SPI_MODE_3,
	248	},
	249	#endif
	250
a261eec0 MF	251	#if defined(CONFIG_BFIN_SPI_ADC) \
a261eec0 MF	252	\|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	253	{
	254	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	255	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	256	.bus_num = 0, /* Framework bus number */
1394f032 BW	257	.chip_select = 1, /* Framework chip select. */
	258	.platform_data = NULL, /* No spi_driver specific config */
	259	.controller_data = &spi_adc_chip_info,
	260	},
	261	#endif
	262
7ba80063 BS	263	#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
7ba80063 BS	264	\|\| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032	265	{
7ba80063	266	.modalias = "ad183x",
1394f032	267	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	268	.bus_num = 0,
7ba80063	269	.chip_select = 4,
1394f032 BW	270	.controller_data = &ad1836_spi_chip_info,
	271	},
	272	#endif
f3f704d3	273	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
1394f032	274	{
f3f704d3	275	.modalias = "mmc_spi",
1394f032	276	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	277	.bus_num = 0,
f3f704d3 MH	278	.chip_select = 5,
f3f704d3 MH	279	.controller_data = &mmc_spi_chip_info,
1394f032 BW	280	.mode = SPI_MODE_3,
	281	},
	282	#endif
1394f032 BW	283	#if defined(CONFIG_TOUCHSCREEN_AD7877) \|\| defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
	284	{
	285	.modalias = "ad7877",
	286	.platform_data = &bfin_ad7877_ts_info,
	287	.irq = IRQ_PF2,
	288	.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966	289	.bus_num = 0,
1394f032 BW	290	.chip_select = 5,
	291	.controller_data = &spi_ad7877_chip_info,
	292	},
	293	#endif
	294
	295	};
	296
c6c4d7bb BW	297	/* SPI (0) */
	298	static struct resource bfin_spi0_resource[] = {
	299	[0] = {
	300	.start = SPI0_REGBASE,
	301	.end = SPI0_REGBASE + 0xFF,
	302	.flags = IORESOURCE_MEM,
	303	},
	304	[1] = {
	305	.start = CH_SPI,
	306	.end = CH_SPI,
53122693 YL	307	.flags = IORESOURCE_DMA,
	308	},
	309	[2] = {
	310	.start = IRQ_SPI,
	311	.end = IRQ_SPI,
c6c4d7bb	312	.flags = IORESOURCE_IRQ,
53122693	313	},
c6c4d7bb BW	314	};
c6c4d7bb BW	315
1394f032	316	/* SPI controller data */
c6c4d7bb	317	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	318	.num_chipselect = 8,
1394f032 BW	319	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	320	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	321	};
1394f032 BW	322
c6c4d7bb BW	323	static struct platform_device bfin_spi0_device = {
	324	.name = "bfin-spi",
	325	.id = 0, /* Bus number */
	326	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	327	.resource = bfin_spi0_resource,
1394f032	328	.dev = {
c6c4d7bb	329	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	330	},
	331	};
	332	#endif /* spi master and devices */
	333
	334	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	335	static struct platform_device bfin_fb_device = {
c6c4d7bb	336	.name = "bf537-lq035",
1394f032 BW	337	};
	338	#endif
	339
	340	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	341	#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea SZ	342	static struct resource bfin_uart0_resources[] = {
1394f032	343	{
6bd1fbea SZ	344	.start = UART0_THR,
6bd1fbea SZ	345	.end = UART0_GCTL+2,
1394f032	346	.flags = IORESOURCE_MEM,
6bd1fbea SZ	347	},
	348	{
	349	.start = IRQ_UART0_RX,
	350	.end = IRQ_UART0_RX+1,
	351	.flags = IORESOURCE_IRQ,
	352	},
	353	{
	354	.start = IRQ_UART0_ERROR,
	355	.end = IRQ_UART0_ERROR,
	356	.flags = IORESOURCE_IRQ,
	357	},
	358	{
	359	.start = CH_UART0_TX,
	360	.end = CH_UART0_TX,
	361	.flags = IORESOURCE_DMA,
	362	},
	363	{
	364	.start = CH_UART0_RX,
	365	.end = CH_UART0_RX,
	366	.flags = IORESOURCE_DMA,
	367	},
	368	};
	369
	370	unsigned short bfin_uart0_peripherals[] = {
	371	P_UART0_TX, P_UART0_RX, 0
	372	};
	373
	374	static struct platform_device bfin_uart0_device = {
	375	.name = "bfin-uart",
	376	.id = 0,
	377	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	378	.resource = bfin_uart0_resources,
	379	.dev = {
	380	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	381	},
	382	};
	383	#endif
	384	#ifdef CONFIG_SERIAL_BFIN_UART1
	385	static struct resource bfin_uart1_resources[] = {
	386	{
	387	.start = UART1_THR,
	388	.end = UART1_GCTL+2,
1394f032 BW	389	.flags = IORESOURCE_MEM,
1394f032 BW	390	},
6bd1fbea SZ	391	{
	392	.start = IRQ_UART1_RX,
	393	.end = IRQ_UART1_RX+1,
	394	.flags = IORESOURCE_IRQ,
	395	},
	396	{
	397	.start = IRQ_UART1_ERROR,
	398	.end = IRQ_UART1_ERROR,
	399	.flags = IORESOURCE_IRQ,
	400	},
	401	{
	402	.start = CH_UART1_TX,
	403	.end = CH_UART1_TX,
	404	.flags = IORESOURCE_DMA,
	405	},
	406	{
	407	.start = CH_UART1_RX,
	408	.end = CH_UART1_RX,
	409	.flags = IORESOURCE_DMA,
	410	},
1394f032 BW	411	};
1394f032 BW	412
6bd1fbea SZ	413	unsigned short bfin_uart1_peripherals[] = {
	414	P_UART1_TX, P_UART1_RX, 0
	415	};
	416
	417	static struct platform_device bfin_uart1_device = {
1394f032 BW	418	.name = "bfin-uart",
1394f032 BW	419	.id = 1,
6bd1fbea SZ	420	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
	421	.resource = bfin_uart1_resources,
	422	.dev = {
	423	.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	424	},
1394f032 BW	425	};
1394f032 BW	426	#endif
6bd1fbea	427	#endif
1394f032	428
5be36d22	429	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	430	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	431	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	432	{
	433	.start = 0xFFC00400,
	434	.end = 0xFFC004FF,
	435	.flags = IORESOURCE_MEM,
	436	},
42bd8bcb GY	437	{
	438	.start = IRQ_UART0_RX,
	439	.end = IRQ_UART0_RX+1,
	440	.flags = IORESOURCE_IRQ,
	441	},
	442	{
	443	.start = CH_UART0_RX,
	444	.end = CH_UART0_RX+1,
	445	.flags = IORESOURCE_DMA,
	446	},
	447	};
	448
	449	static struct platform_device bfin_sir0_device = {
	450	.name = "bfin_sir",
	451	.id = 0,
	452	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	453	.resource = bfin_sir0_resources,
	454	};
5be36d22 GY	455	#endif
5be36d22 GY	456	#ifdef CONFIG_BFIN_SIR1
42bd8bcb	457	static struct resource bfin_sir1_resources[] = {
5be36d22 GY	458	{
	459	.start = 0xFFC02000,
	460	.end = 0xFFC020FF,
	461	.flags = IORESOURCE_MEM,
	462	},
42bd8bcb GY	463	{
	464	.start = IRQ_UART1_RX,
	465	.end = IRQ_UART1_RX+1,
	466	.flags = IORESOURCE_IRQ,
	467	},
	468	{
	469	.start = CH_UART1_RX,
	470	.end = CH_UART1_RX+1,
	471	.flags = IORESOURCE_DMA,
	472	},
5be36d22 GY	473	};
5be36d22 GY	474
42bd8bcb	475	static struct platform_device bfin_sir1_device = {
5be36d22	476	.name = "bfin_sir",
42bd8bcb GY	477	.id = 1,
	478	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	479	.resource = bfin_sir1_resources,
5be36d22 GY	480	};
5be36d22 GY	481	#endif
42bd8bcb	482	#endif
1394f032 BW	483
	484	static struct platform_device *stamp_devices[] __initdata = {
	485	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	486	&bfin_pcmcia_cf_device,
	487	#endif
	488
	489	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	490	&rtc_device,
	491	#endif
	492
1394f032 BW	493	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	494	&smc91x_device,
	495	#endif
	496
	497	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628	498	&bfin_mii_bus,
1394f032 BW	499	&bfin_mac_device,
	500	#endif
	501
	502	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	503	&net2272_bfin_device,
	504	#endif
	505
	506	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb	507	&bfin_spi0_device,
1394f032 BW	508	#endif
	509
	510	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	511	&bfin_fb_device,
	512	#endif
	513
	514	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	515	#ifdef CONFIG_SERIAL_BFIN_UART0
	516	&bfin_uart0_device,
	517	#endif
	518	#ifdef CONFIG_SERIAL_BFIN_UART1
	519	&bfin_uart1_device,
	520	#endif
1394f032	521	#endif
5be36d22 GY	522
5be36d22 GY	523	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	524	#ifdef CONFIG_BFIN_SIR0
	525	&bfin_sir0_device,
	526	#endif
	527	#ifdef CONFIG_BFIN_SIR1
	528	&bfin_sir1_device,
	529	#endif
5be36d22	530	#endif
1394f032 BW	531	};
1394f032 BW	532
7f6678c5	533	static int __init pnav_init(void)
1394f032	534	{
b85d858b	535	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032 BW	536	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
	537	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	538	spi_register_board_info(bfin_spi_board_info,
	539	ARRAY_SIZE(bfin_spi_board_info));
	540	#endif
	541	return 0;
	542	}
	543
7f6678c5	544	arch_initcall(pnav_init);
137b1529	545
c13ce9fd SZ	546	static struct platform_device *stamp_early_devices[] __initdata = {
	547	#if defined(CONFIG_SERIAL_BFIN_CONSOLE) \|\| defined(CONFIG_EARLY_PRINTK)
	548	#ifdef CONFIG_SERIAL_BFIN_UART0
	549	&bfin_uart0_device,
	550	#endif
	551	#ifdef CONFIG_SERIAL_BFIN_UART1
	552	&bfin_uart1_device,
	553	#endif
	554	#endif
	555	};
	556
	557	void __init native_machine_early_platform_add_devices(void)
	558	{
	559	printk(KERN_INFO "register early platform devices\n");
	560	early_platform_add_devices(stamp_early_devices,
	561	ARRAY_SIZE(stamp_early_devices));
	562	}
	563
9862cc52	564	void bfin_get_ether_addr(char *addr)
137b1529 MF	565	{
	566	random_ether_addr(addr);
	567	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
	568	}
9862cc52	569	EXPORT_SYMBOL(bfin_get_ether_addr);