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Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
[mirror_ubuntu-zesty-kernel.git] / arch / blackfin / mach-bf537 / boards / tcm_bf537.c
CommitLineData
b9da3b92 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
b9da3b92 6 *
96f1050d 7 * Licensed under the GPL-2 or later.
b9da3b92
MF		 8 */
9
10#include <linux/device.h>
11#include <linux/etherdevice.h>
12#include <linux/platform_device.h>
13#include <linux/mtd/mtd.h>
14#include <linux/mtd/partitions.h>
15#include <linux/mtd/physmap.h>
16#include <linux/spi/spi.h>
17#include <linux/spi/flash.h>
18#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
19#include <linux/usb/isp1362.h>
20#endif
21#include <linux/ata_platform.h>
22#include <linux/irq.h>
23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/portmux.h>
26#include <asm/dpmc.h>
9c21453e 27#include <linux/spi/mmc_spi.h>
b9da3b92
MF		 28
29/*
30 * Name the Board for the /proc/cpuinfo
31 */
32const char bfin_board_name[] = "Bluetechnix TCM BF537";
33
34#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
35/* all SPI peripherals info goes here */
36
37#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
38static struct mtd_partition bfin_spi_flash_partitions[] = {
39 {
40 .name = "bootloader(spi)",
41 .size = 0x00020000,
42 .offset = 0,
43 .mask_flags = MTD_CAP_ROM
44 }, {
45 .name = "linux kernel(spi)",
46 .size = 0xe0000,
47 .offset = 0x20000
48 }, {
49 .name = "file system(spi)",
50 .size = 0x700000,
51 .offset = 0x00100000,
52 }
53};
54
55static struct flash_platform_data bfin_spi_flash_data = {
56 .name = "m25p80",
57 .parts = bfin_spi_flash_partitions,
58 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
59 .type = "m25p64",
60};
61
62/* SPI flash chip (m25p64) */
63static struct bfin5xx_spi_chip spi_flash_chip_info = {
64 .enable_dma = 0, /* use dma transfer with this chip*/
65 .bits_per_word = 8,
66};
67#endif
68
a261eec0 69#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
b9da3b92
MF		 70/* SPI ADC chip */
71static struct bfin5xx_spi_chip spi_adc_chip_info = {
72 .enable_dma = 1, /* use dma transfer with this chip*/
73 .bits_per_word = 16,
74};
75#endif
76
77#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
78static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
79 .enable_dma = 0,
80 .bits_per_word = 16,
81};
82#endif
83
f3f704d3
MH		 84#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
85static struct bfin5xx_spi_chip mmc_spi_chip_info = {
86 .enable_dma = 0,
b9da3b92
MF		 87 .bits_per_word = 8,
88};
89#endif
90
91static struct spi_board_info bfin_spi_board_info[] __initdata = {
92#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
93 {
94 /* the modalias must be the same as spi device driver name */
95 .modalias = "m25p80", /* Name of spi_driver for this device */
96 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
97 .bus_num = 0, /* Framework bus number */
98 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
99 .platform_data = &bfin_spi_flash_data,
100 .controller_data = &spi_flash_chip_info,
101 .mode = SPI_MODE_3,
102 },
103#endif
104
a261eec0 105#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
b9da3b92
MF		 106 {
107 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
108 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
109 .bus_num = 0, /* Framework bus number */
110 .chip_select = 1, /* Framework chip select. */
111 .platform_data = NULL, /* No spi_driver specific config */
112 .controller_data = &spi_adc_chip_info,
113 },
114#endif
115
116#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
117 {
dac98174 118 .modalias = "ad1836",
b9da3b92
MF		 119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
120 .bus_num = 0,
121 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
122 .controller_data = &ad1836_spi_chip_info,
123 },
124#endif
125
f3f704d3 126#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
b9da3b92 127 {
f3f704d3 128 .modalias = "mmc_spi",
b9da3b92
MF		 129 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
130 .bus_num = 0,
9c21453e 131 .chip_select = 1,
f3f704d3 132 .controller_data = &mmc_spi_chip_info,
b9da3b92
MF		 133 .mode = SPI_MODE_3,
134 },
135#endif
136};
137
138/* SPI (0) */
139static struct resource bfin_spi0_resource[] = {
140 [0] = {
141 .start = SPI0_REGBASE,
142 .end = SPI0_REGBASE + 0xFF,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = CH_SPI,
147 .end = CH_SPI,
53122693
YL		 148 .flags = IORESOURCE_DMA,
149 },
150 [2] = {
151 .start = IRQ_SPI,
152 .end = IRQ_SPI,
b9da3b92
MF		 153 .flags = IORESOURCE_IRQ,
154 }
155};
156
157/* SPI controller data */
158static struct bfin5xx_spi_master bfin_spi0_info = {
159 .num_chipselect = 8,
160 .enable_dma = 1, /* master has the ability to do dma transfer */
161 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
162};
163
164static struct platform_device bfin_spi0_device = {
165 .name = "bfin-spi",
166 .id = 0, /* Bus number */
167 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
168 .resource = bfin_spi0_resource,
169 .dev = {
170 .platform_data = &bfin_spi0_info, /* Passed to driver */
171 },
172};
173#endif /* spi master and devices */
174
175#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
176static struct platform_device rtc_device = {
177 .name = "rtc-bfin",
178 .id = -1,
179};
180#endif
181
182#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
183static struct platform_device hitachi_fb_device = {
184 .name = "hitachi-tx09",
185};
186#endif
187
188#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 189#include <linux/smc91x.h>
190
191static struct smc91x_platdata smc91x_info = {
192 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
193 .leda = RPC_LED_100_10,
194 .ledb = RPC_LED_TX_RX,
195};
196
b9da3b92
MF		 197static struct resource smc91x_resources[] = {
198 {
199 .start = 0x20200300,
200 .end = 0x20200300 + 16,
201 .flags = IORESOURCE_MEM,
202 }, {
203 .start = IRQ_PF14,
204 .end = IRQ_PF14,
205 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
206 },
207};
208
209static struct platform_device smc91x_device = {
210 .name = "smc91x",
211 .id = 0,
212 .num_resources = ARRAY_SIZE(smc91x_resources),
213 .resource = smc91x_resources,
61f09b5a
MH		 214 .dev = {
215 .platform_data = &smc91x_info,
216 },
b9da3b92
MF		 217};
218#endif
219
220#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
221static struct resource isp1362_hcd_resources[] = {
222 {
223 .start = 0x20308000,
224 .end = 0x20308000,
225 .flags = IORESOURCE_MEM,
226 }, {
227 .start = 0x20308004,
228 .end = 0x20308004,
229 .flags = IORESOURCE_MEM,
230 }, {
231 .start = IRQ_PG15,
232 .end = IRQ_PG15,
233 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
234 },
235};
236
237static struct isp1362_platform_data isp1362_priv = {
238 .sel15Kres = 1,
239 .clknotstop = 0,
240 .oc_enable = 0,
241 .int_act_high = 0,
242 .int_edge_triggered = 0,
243 .remote_wakeup_connected = 0,
244 .no_power_switching = 1,
245 .power_switching_mode = 0,
246};
247
248static struct platform_device isp1362_hcd_device = {
249 .name = "isp1362-hcd",
250 .id = 0,
251 .dev = {
252 .platform_data = &isp1362_priv,
253 },
254 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
255 .resource = isp1362_hcd_resources,
256};
257#endif
258
259#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
260static struct resource net2272_bfin_resources[] = {
261 {
9c21453e
HK		 262 .start = 0x20300000,
263 .end = 0x20300000 + 0x100,
b9da3b92
MF		 264 .flags = IORESOURCE_MEM,
265 }, {
9c21453e
HK		 266 .start = IRQ_PG13,
267 .end = IRQ_PG13,
b9da3b92
MF		 268 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
269 },
270};
271
272static struct platform_device net2272_bfin_device = {
273 .name = "net2272",
274 .id = -1,
275 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
276 .resource = net2272_bfin_resources,
277};
278#endif
279
280#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
281static struct mtd_partition cm_partitions[] = {
282 {
283 .name = "bootloader(nor)",
284 .size = 0x40000,
285 .offset = 0,
286 }, {
287 .name = "linux kernel(nor)",
9c21453e 288 .size = 0x100000,
b9da3b92
MF		 289 .offset = MTDPART_OFS_APPEND,
290 }, {
291 .name = "file system(nor)",
292 .size = MTDPART_SIZ_FULL,
293 .offset = MTDPART_OFS_APPEND,
294 }
295};
296
297static struct physmap_flash_data cm_flash_data = {
298 .width = 2,
299 .parts = cm_partitions,
300 .nr_parts = ARRAY_SIZE(cm_partitions),
301};
302
303static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
304
305static struct resource cm_flash_resource[] = {
306 {
307 .name = "cfi_probe",
308 .start = 0x20000000,
309 .end = 0x201fffff,
310 .flags = IORESOURCE_MEM,
311 }, {
312 .start = (unsigned long)cm_flash_gpios,
313 .end = ARRAY_SIZE(cm_flash_gpios),
314 .flags = IORESOURCE_IRQ,
315 }
316};
317
318static struct platform_device cm_flash_device = {
319 .name = "gpio-addr-flash",
320 .id = 0,
321 .dev = {
322 .platform_data = &cm_flash_data,
323 },
324 .num_resources = ARRAY_SIZE(cm_flash_resource),
325 .resource = cm_flash_resource,
326};
327#endif
328
329#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
330static struct resource bfin_uart_resources[] = {
331 {
332 .start = 0xFFC00400,
333 .end = 0xFFC004FF,
334 .flags = IORESOURCE_MEM,
335 }, {
336 .start = 0xFFC02000,
337 .end = 0xFFC020FF,
338 .flags = IORESOURCE_MEM,
339 },
340};
341
342static struct platform_device bfin_uart_device = {
343 .name = "bfin-uart",
344 .id = 1,
345 .num_resources = ARRAY_SIZE(bfin_uart_resources),
346 .resource = bfin_uart_resources,
347};
348#endif
349
350#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
b9da3b92 351#ifdef CONFIG_BFIN_SIR0
42bd8bcb 352static struct resource bfin_sir0_resources[] = {
b9da3b92
MF		 353 {
354 .start = 0xFFC00400,
355 .end = 0xFFC004FF,
356 .flags = IORESOURCE_MEM,
357 },
42bd8bcb
GY		 358 {
359 .start = IRQ_UART0_RX,
360 .end = IRQ_UART0_RX+1,
361 .flags = IORESOURCE_IRQ,
362 },
363 {
364 .start = CH_UART0_RX,
365 .end = CH_UART0_RX+1,
366 .flags = IORESOURCE_DMA,
367 },
368};
369
370static struct platform_device bfin_sir0_device = {
371 .name = "bfin_sir",
372 .id = 0,
373 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
374 .resource = bfin_sir0_resources,
375};
b9da3b92
MF		 376#endif
377#ifdef CONFIG_BFIN_SIR1
42bd8bcb 378static struct resource bfin_sir1_resources[] = {
b9da3b92
MF		 379 {
380 .start = 0xFFC02000,
381 .end = 0xFFC020FF,
382 .flags = IORESOURCE_MEM,
383 },
42bd8bcb
GY		 384 {
385 .start = IRQ_UART1_RX,
386 .end = IRQ_UART1_RX+1,
387 .flags = IORESOURCE_IRQ,
388 },
389 {
390 .start = CH_UART1_RX,
391 .end = CH_UART1_RX+1,
392 .flags = IORESOURCE_DMA,
393 },
b9da3b92
MF		 394};
395
42bd8bcb 396static struct platform_device bfin_sir1_device = {
b9da3b92 397 .name = "bfin_sir",
42bd8bcb
GY		 398 .id = 1,
399 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
400 .resource = bfin_sir1_resources,
b9da3b92
MF		 401};
402#endif
42bd8bcb 403#endif
b9da3b92
MF		 404
405#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
406static struct resource bfin_twi0_resource[] = {
407 [0] = {
408 .start = TWI0_REGBASE,
409 .end = TWI0_REGBASE,
410 .flags = IORESOURCE_MEM,
411 },
412 [1] = {
413 .start = IRQ_TWI,
414 .end = IRQ_TWI,
415 .flags = IORESOURCE_IRQ,
416 },
417};
418
419static struct platform_device i2c_bfin_twi_device = {
420 .name = "i2c-bfin-twi",
421 .id = 0,
422 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
423 .resource = bfin_twi0_resource,
424};
425#endif
426
427#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
428static struct platform_device bfin_sport0_uart_device = {
429 .name = "bfin-sport-uart",
430 .id = 0,
431};
432
433static struct platform_device bfin_sport1_uart_device = {
434 .name = "bfin-sport-uart",
435 .id = 1,
436};
437#endif
438
439#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 440static struct platform_device bfin_mii_bus = {
441 .name = "bfin_mii_bus",
442};
443
b9da3b92
MF		 444static struct platform_device bfin_mac_device = {
445 .name = "bfin_mac",
65319628 446 .dev.platform_data = &bfin_mii_bus,
b9da3b92
MF		 447};
448#endif
449
450#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
fe5aeb93 451#define PATA_INT IRQ_PF14
b9da3b92
MF		 452
453static struct pata_platform_info bfin_pata_platform_data = {
454 .ioport_shift = 2,
455 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
456};
457
458static struct resource bfin_pata_resources[] = {
459 {
460 .start = 0x2030C000,
461 .end = 0x2030C01F,
462 .flags = IORESOURCE_MEM,
463 },
464 {
465 .start = 0x2030D018,
466 .end = 0x2030D01B,
467 .flags = IORESOURCE_MEM,
468 },
469 {
470 .start = PATA_INT,
471 .end = PATA_INT,
472 .flags = IORESOURCE_IRQ,
473 },
474};
475
476static struct platform_device bfin_pata_device = {
477 .name = "pata_platform",
478 .id = -1,
479 .num_resources = ARRAY_SIZE(bfin_pata_resources),
480 .resource = bfin_pata_resources,
481 .dev = {
482 .platform_data = &bfin_pata_platform_data,
483 }
484};
485#endif
486
487static const unsigned int cclk_vlev_datasheet[] =
488{
489 VRPAIR(VLEV_085, 250000000),
490 VRPAIR(VLEV_090, 376000000),
491 VRPAIR(VLEV_095, 426000000),
492 VRPAIR(VLEV_100, 426000000),
493 VRPAIR(VLEV_105, 476000000),
494 VRPAIR(VLEV_110, 476000000),
495 VRPAIR(VLEV_115, 476000000),
496 VRPAIR(VLEV_120, 500000000),
497 VRPAIR(VLEV_125, 533000000),
498 VRPAIR(VLEV_130, 600000000),
499};
500
501static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
502 .tuple_tab = cclk_vlev_datasheet,
503 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
504 .vr_settling_time = 25 /* us */,
505};
506
507static struct platform_device bfin_dpmc = {
508 .name = "bfin dpmc",
509 .dev = {
510 .platform_data = &bfin_dmpc_vreg_data,
511 },
512};
513
514static struct platform_device *cm_bf537_devices[] __initdata = {
515
516 &bfin_dpmc,
517
518#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
519 &hitachi_fb_device,
520#endif
521
522#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
523 &rtc_device,
524#endif
525
526#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
527 &bfin_uart_device,
528#endif
529
530#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 531#ifdef CONFIG_BFIN_SIR0
532 &bfin_sir0_device,
533#endif
534#ifdef CONFIG_BFIN_SIR1
535 &bfin_sir1_device,
536#endif
b9da3b92
MF		 537#endif
538
539#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
540 &i2c_bfin_twi_device,
541#endif
542
543#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
544 &bfin_sport0_uart_device,
545 &bfin_sport1_uart_device,
546#endif
547
548#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
549 &isp1362_hcd_device,
550#endif
551
552#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
553 &smc91x_device,
554#endif
555
556#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 557 &bfin_mii_bus,
b9da3b92
MF		 558 &bfin_mac_device,
559#endif
560
561#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
562 &net2272_bfin_device,
563#endif
564
565#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
566 &bfin_spi0_device,
567#endif
568
569#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
570 &bfin_pata_device,
571#endif
572
573#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
574 &cm_flash_device,
575#endif
576};
577
7f6678c5 578static int __init tcm_bf537_init(void)
b9da3b92
MF		 579{
580 printk(KERN_INFO "%s(): registering device resources\n", __func__);
581 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
582#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
583 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
584#endif
585
586#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
587 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
588#endif
589 return 0;
590}
591
7f6678c5 592arch_initcall(tcm_bf537_init);
b9da3b92
MF		 593
594void bfin_get_ether_addr(char *addr)
595{
596 random_ether_addr(addr);
597 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
598}
599EXPORT_SYMBOL(bfin_get_ether_addr);
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