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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mm/blackfin_sram.c | |
3 | * Based on: | |
4 | * Author: | |
5 | * | |
6 | * Created: | |
7 | * Description: SRAM driver for Blackfin ADSP-BF5xx | |
8 | * | |
9 | * Modified: | |
321f6e0f | 10 | * Copyright 2004-2007 Analog Devices Inc. |
1394f032 BW |
11 | * |
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, see the file COPYING, or write | |
26 | * to the Free Software Foundation, Inc., | |
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
28 | */ | |
29 | ||
1394f032 BW |
30 | #include <linux/module.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/types.h> | |
33 | #include <linux/miscdevice.h> | |
34 | #include <linux/ioport.h> | |
35 | #include <linux/fcntl.h> | |
36 | #include <linux/init.h> | |
37 | #include <linux/poll.h> | |
38 | #include <linux/proc_fs.h> | |
39 | #include <linux/spinlock.h> | |
40 | #include <linux/rtc.h> | |
41 | #include <asm/blackfin.h> | |
42 | #include "blackfin_sram.h" | |
43 | ||
44 | spinlock_t l1sram_lock, l1_data_sram_lock, l1_inst_sram_lock; | |
45 | ||
46 | #if CONFIG_L1_MAX_PIECE < 16 | |
47 | #undef CONFIG_L1_MAX_PIECE | |
48 | #define CONFIG_L1_MAX_PIECE 16 | |
49 | #endif | |
50 | ||
51 | #if CONFIG_L1_MAX_PIECE > 1024 | |
52 | #undef CONFIG_L1_MAX_PIECE | |
53 | #define CONFIG_L1_MAX_PIECE 1024 | |
54 | #endif | |
55 | ||
56 | #define SRAM_SLT_NULL 0 | |
57 | #define SRAM_SLT_FREE 1 | |
58 | #define SRAM_SLT_ALLOCATED 2 | |
59 | ||
60 | /* the data structure for L1 scratchpad and DATA SRAM */ | |
61 | struct l1_sram_piece { | |
62 | void *paddr; | |
63 | int size; | |
64 | int flag; | |
bc61b4e6 | 65 | pid_t pid; |
1394f032 BW |
66 | }; |
67 | ||
68 | static struct l1_sram_piece l1_ssram[CONFIG_L1_MAX_PIECE]; | |
69 | ||
70 | #if L1_DATA_A_LENGTH != 0 | |
71 | static struct l1_sram_piece l1_data_A_sram[CONFIG_L1_MAX_PIECE]; | |
72 | #endif | |
73 | ||
74 | #if L1_DATA_B_LENGTH != 0 | |
75 | static struct l1_sram_piece l1_data_B_sram[CONFIG_L1_MAX_PIECE]; | |
76 | #endif | |
77 | ||
78 | #if L1_CODE_LENGTH != 0 | |
79 | static struct l1_sram_piece l1_inst_sram[CONFIG_L1_MAX_PIECE]; | |
80 | #endif | |
81 | ||
82 | /* L1 Scratchpad SRAM initialization function */ | |
321f6e0f | 83 | void __init l1sram_init(void) |
1394f032 BW |
84 | { |
85 | printk(KERN_INFO "Blackfin Scratchpad data SRAM: %d KB\n", | |
86 | L1_SCRATCH_LENGTH >> 10); | |
87 | ||
88 | memset(&l1_ssram, 0x00, sizeof(l1_ssram)); | |
1f83b8f1 | 89 | l1_ssram[0].paddr = (void *)L1_SCRATCH_START; |
1394f032 BW |
90 | l1_ssram[0].size = L1_SCRATCH_LENGTH; |
91 | l1_ssram[0].flag = SRAM_SLT_FREE; | |
92 | ||
93 | /* mutex initialize */ | |
94 | spin_lock_init(&l1sram_lock); | |
95 | } | |
96 | ||
321f6e0f | 97 | void __init l1_data_sram_init(void) |
1394f032 BW |
98 | { |
99 | #if L1_DATA_A_LENGTH != 0 | |
1394f032 | 100 | memset(&l1_data_A_sram, 0x00, sizeof(l1_data_A_sram)); |
bc61b4e6 MF |
101 | l1_data_A_sram[0].paddr = (void *)L1_DATA_A_START + |
102 | (_ebss_l1 - _sdata_l1); | |
1394f032 BW |
103 | l1_data_A_sram[0].size = L1_DATA_A_LENGTH - (_ebss_l1 - _sdata_l1); |
104 | l1_data_A_sram[0].flag = SRAM_SLT_FREE; | |
bc61b4e6 MF |
105 | |
106 | printk(KERN_INFO "Blackfin Data A SRAM: %d KB (%d KB free)\n", | |
107 | L1_DATA_A_LENGTH >> 10, l1_data_A_sram[0].size >> 10); | |
1394f032 BW |
108 | #endif |
109 | #if L1_DATA_B_LENGTH != 0 | |
1394f032 | 110 | memset(&l1_data_B_sram, 0x00, sizeof(l1_data_B_sram)); |
43a3188e MF |
111 | l1_data_B_sram[0].paddr = (void *)L1_DATA_B_START + |
112 | (_ebss_b_l1 - _sdata_b_l1); | |
113 | l1_data_B_sram[0].size = L1_DATA_B_LENGTH - (_ebss_b_l1 - _sdata_b_l1); | |
1394f032 | 114 | l1_data_B_sram[0].flag = SRAM_SLT_FREE; |
bc61b4e6 MF |
115 | |
116 | printk(KERN_INFO "Blackfin Data B SRAM: %d KB (%d KB free)\n", | |
117 | L1_DATA_B_LENGTH >> 10, l1_data_B_sram[0].size >> 10); | |
1394f032 BW |
118 | #endif |
119 | ||
120 | /* mutex initialize */ | |
121 | spin_lock_init(&l1_data_sram_lock); | |
122 | } | |
123 | ||
321f6e0f | 124 | void __init l1_inst_sram_init(void) |
1394f032 BW |
125 | { |
126 | #if L1_CODE_LENGTH != 0 | |
1394f032 | 127 | memset(&l1_inst_sram, 0x00, sizeof(l1_inst_sram)); |
1f83b8f1 | 128 | l1_inst_sram[0].paddr = (void *)L1_CODE_START + (_etext_l1 - _stext_l1); |
1394f032 BW |
129 | l1_inst_sram[0].size = L1_CODE_LENGTH - (_etext_l1 - _stext_l1); |
130 | l1_inst_sram[0].flag = SRAM_SLT_FREE; | |
bc61b4e6 MF |
131 | |
132 | printk(KERN_INFO "Blackfin Instruction SRAM: %d KB (%d KB free)\n", | |
133 | L1_CODE_LENGTH >> 10, l1_inst_sram[0].size >> 10); | |
1394f032 BW |
134 | #endif |
135 | ||
136 | /* mutex initialize */ | |
137 | spin_lock_init(&l1_inst_sram_lock); | |
138 | } | |
139 | ||
140 | /* L1 memory allocate function */ | |
141 | static void *_l1_sram_alloc(size_t size, struct l1_sram_piece *pfree, int count) | |
142 | { | |
143 | int i, index = 0; | |
144 | void *addr = NULL; | |
145 | ||
146 | if (size <= 0) | |
147 | return NULL; | |
148 | ||
149 | /* Align the size */ | |
150 | size = (size + 3) & ~3; | |
151 | ||
152 | /* not use the good method to match the best slot !!! */ | |
d2d50aa9 | 153 | /* search an available memory slot */ |
1394f032 BW |
154 | for (i = 0; i < count; i++) { |
155 | if ((pfree[i].flag == SRAM_SLT_FREE) | |
156 | && (pfree[i].size >= size)) { | |
157 | addr = pfree[i].paddr; | |
158 | pfree[i].flag = SRAM_SLT_ALLOCATED; | |
bc61b4e6 | 159 | pfree[i].pid = current->pid; |
1394f032 BW |
160 | index = i; |
161 | break; | |
162 | } | |
163 | } | |
164 | if (i >= count) | |
165 | return NULL; | |
166 | ||
d2d50aa9 | 167 | /* updated the NULL memory slot !!! */ |
1394f032 BW |
168 | if (pfree[i].size > size) { |
169 | for (i = 0; i < count; i++) { | |
170 | if (pfree[i].flag == SRAM_SLT_NULL) { | |
bc61b4e6 | 171 | pfree[i].pid = 0; |
1394f032 BW |
172 | pfree[i].flag = SRAM_SLT_FREE; |
173 | pfree[i].paddr = addr + size; | |
174 | pfree[i].size = pfree[index].size - size; | |
175 | pfree[index].size = size; | |
176 | break; | |
177 | } | |
178 | } | |
179 | } | |
180 | ||
181 | return addr; | |
182 | } | |
183 | ||
184 | /* Allocate the largest available block. */ | |
185 | static void *_l1_sram_alloc_max(struct l1_sram_piece *pfree, int count, | |
186 | unsigned long *psize) | |
187 | { | |
188 | unsigned long best = 0; | |
189 | int i, index = -1; | |
190 | void *addr = NULL; | |
191 | ||
d2d50aa9 | 192 | /* search an available memory slot */ |
1394f032 BW |
193 | for (i = 0; i < count; i++) { |
194 | if (pfree[i].flag == SRAM_SLT_FREE && pfree[i].size > best) { | |
195 | addr = pfree[i].paddr; | |
196 | index = i; | |
197 | best = pfree[i].size; | |
198 | } | |
199 | } | |
200 | if (index < 0) | |
201 | return NULL; | |
202 | *psize = best; | |
203 | ||
bc61b4e6 | 204 | pfree[index].pid = current->pid; |
1394f032 BW |
205 | pfree[index].flag = SRAM_SLT_ALLOCATED; |
206 | return addr; | |
207 | } | |
208 | ||
209 | /* L1 memory free function */ | |
210 | static int _l1_sram_free(const void *addr, | |
bc61b4e6 MF |
211 | struct l1_sram_piece *pfree, |
212 | int count) | |
1394f032 BW |
213 | { |
214 | int i, index = 0; | |
215 | ||
216 | /* search the relevant memory slot */ | |
217 | for (i = 0; i < count; i++) { | |
218 | if (pfree[i].paddr == addr) { | |
219 | if (pfree[i].flag != SRAM_SLT_ALLOCATED) { | |
220 | /* error log */ | |
221 | return -1; | |
222 | } | |
223 | index = i; | |
224 | break; | |
225 | } | |
226 | } | |
227 | if (i >= count) | |
228 | return -1; | |
229 | ||
bc61b4e6 | 230 | pfree[index].pid = 0; |
1394f032 BW |
231 | pfree[index].flag = SRAM_SLT_FREE; |
232 | ||
233 | /* link the next address slot */ | |
234 | for (i = 0; i < count; i++) { | |
235 | if (((pfree[index].paddr + pfree[index].size) == pfree[i].paddr) | |
236 | && (pfree[i].flag == SRAM_SLT_FREE)) { | |
bc61b4e6 | 237 | pfree[i].pid = 0; |
1394f032 BW |
238 | pfree[i].flag = SRAM_SLT_NULL; |
239 | pfree[index].size += pfree[i].size; | |
240 | pfree[index].flag = SRAM_SLT_FREE; | |
241 | break; | |
242 | } | |
243 | } | |
244 | ||
245 | /* link the last address slot */ | |
246 | for (i = 0; i < count; i++) { | |
247 | if (((pfree[i].paddr + pfree[i].size) == pfree[index].paddr) && | |
248 | (pfree[i].flag == SRAM_SLT_FREE)) { | |
249 | pfree[index].flag = SRAM_SLT_NULL; | |
250 | pfree[i].size += pfree[index].size; | |
251 | break; | |
252 | } | |
253 | } | |
254 | ||
255 | return 0; | |
256 | } | |
257 | ||
258 | int sram_free(const void *addr) | |
259 | { | |
260 | if (0) {} | |
261 | #if L1_CODE_LENGTH != 0 | |
262 | else if (addr >= (void *)L1_CODE_START | |
263 | && addr < (void *)(L1_CODE_START + L1_CODE_LENGTH)) | |
264 | return l1_inst_sram_free(addr); | |
265 | #endif | |
266 | #if L1_DATA_A_LENGTH != 0 | |
267 | else if (addr >= (void *)L1_DATA_A_START | |
268 | && addr < (void *)(L1_DATA_A_START + L1_DATA_A_LENGTH)) | |
269 | return l1_data_A_sram_free(addr); | |
270 | #endif | |
271 | #if L1_DATA_B_LENGTH != 0 | |
272 | else if (addr >= (void *)L1_DATA_B_START | |
273 | && addr < (void *)(L1_DATA_B_START + L1_DATA_B_LENGTH)) | |
274 | return l1_data_B_sram_free(addr); | |
275 | #endif | |
276 | else | |
277 | return -1; | |
278 | } | |
279 | EXPORT_SYMBOL(sram_free); | |
280 | ||
281 | void *l1_data_A_sram_alloc(size_t size) | |
282 | { | |
283 | unsigned flags; | |
284 | void *addr = NULL; | |
285 | ||
286 | /* add mutex operation */ | |
287 | spin_lock_irqsave(&l1_data_sram_lock, flags); | |
288 | ||
289 | #if L1_DATA_A_LENGTH != 0 | |
290 | addr = _l1_sram_alloc(size, l1_data_A_sram, ARRAY_SIZE(l1_data_A_sram)); | |
291 | #endif | |
292 | ||
293 | /* add mutex operation */ | |
294 | spin_unlock_irqrestore(&l1_data_sram_lock, flags); | |
295 | ||
296 | pr_debug("Allocated address in l1_data_A_sram_alloc is 0x%lx+0x%lx\n", | |
297 | (long unsigned int)addr, size); | |
298 | ||
299 | return addr; | |
300 | } | |
301 | EXPORT_SYMBOL(l1_data_A_sram_alloc); | |
302 | ||
303 | int l1_data_A_sram_free(const void *addr) | |
304 | { | |
305 | unsigned flags; | |
306 | int ret; | |
307 | ||
308 | /* add mutex operation */ | |
309 | spin_lock_irqsave(&l1_data_sram_lock, flags); | |
310 | ||
311 | #if L1_DATA_A_LENGTH != 0 | |
312 | ret = _l1_sram_free(addr, | |
313 | l1_data_A_sram, ARRAY_SIZE(l1_data_A_sram)); | |
314 | #else | |
315 | ret = -1; | |
316 | #endif | |
317 | ||
318 | /* add mutex operation */ | |
319 | spin_unlock_irqrestore(&l1_data_sram_lock, flags); | |
320 | ||
321 | return ret; | |
322 | } | |
323 | EXPORT_SYMBOL(l1_data_A_sram_free); | |
324 | ||
325 | void *l1_data_B_sram_alloc(size_t size) | |
326 | { | |
327 | #if L1_DATA_B_LENGTH != 0 | |
328 | unsigned flags; | |
329 | void *addr; | |
330 | ||
331 | /* add mutex operation */ | |
332 | spin_lock_irqsave(&l1_data_sram_lock, flags); | |
333 | ||
334 | addr = _l1_sram_alloc(size, l1_data_B_sram, ARRAY_SIZE(l1_data_B_sram)); | |
335 | ||
336 | /* add mutex operation */ | |
337 | spin_unlock_irqrestore(&l1_data_sram_lock, flags); | |
338 | ||
339 | pr_debug("Allocated address in l1_data_B_sram_alloc is 0x%lx+0x%lx\n", | |
340 | (long unsigned int)addr, size); | |
341 | ||
342 | return addr; | |
343 | #else | |
344 | return NULL; | |
345 | #endif | |
346 | } | |
347 | EXPORT_SYMBOL(l1_data_B_sram_alloc); | |
348 | ||
349 | int l1_data_B_sram_free(const void *addr) | |
350 | { | |
351 | #if L1_DATA_B_LENGTH != 0 | |
352 | unsigned flags; | |
353 | int ret; | |
354 | ||
355 | /* add mutex operation */ | |
356 | spin_lock_irqsave(&l1_data_sram_lock, flags); | |
357 | ||
358 | ret = _l1_sram_free(addr, l1_data_B_sram, ARRAY_SIZE(l1_data_B_sram)); | |
359 | ||
360 | /* add mutex operation */ | |
361 | spin_unlock_irqrestore(&l1_data_sram_lock, flags); | |
362 | ||
363 | return ret; | |
364 | #else | |
365 | return -1; | |
366 | #endif | |
367 | } | |
368 | EXPORT_SYMBOL(l1_data_B_sram_free); | |
369 | ||
370 | void *l1_data_sram_alloc(size_t size) | |
371 | { | |
372 | void *addr = l1_data_A_sram_alloc(size); | |
373 | ||
374 | if (!addr) | |
375 | addr = l1_data_B_sram_alloc(size); | |
376 | ||
377 | return addr; | |
378 | } | |
379 | EXPORT_SYMBOL(l1_data_sram_alloc); | |
380 | ||
381 | void *l1_data_sram_zalloc(size_t size) | |
382 | { | |
383 | void *addr = l1_data_sram_alloc(size); | |
384 | ||
385 | if (addr) | |
386 | memset(addr, 0x00, size); | |
387 | ||
388 | return addr; | |
389 | } | |
390 | EXPORT_SYMBOL(l1_data_sram_zalloc); | |
391 | ||
392 | int l1_data_sram_free(const void *addr) | |
393 | { | |
394 | int ret; | |
395 | ret = l1_data_A_sram_free(addr); | |
396 | if (ret == -1) | |
397 | ret = l1_data_B_sram_free(addr); | |
398 | return ret; | |
399 | } | |
400 | EXPORT_SYMBOL(l1_data_sram_free); | |
401 | ||
402 | void *l1_inst_sram_alloc(size_t size) | |
403 | { | |
404 | #if L1_DATA_A_LENGTH != 0 | |
405 | unsigned flags; | |
406 | void *addr; | |
407 | ||
408 | /* add mutex operation */ | |
409 | spin_lock_irqsave(&l1_inst_sram_lock, flags); | |
410 | ||
411 | addr = _l1_sram_alloc(size, l1_inst_sram, ARRAY_SIZE(l1_inst_sram)); | |
412 | ||
413 | /* add mutex operation */ | |
414 | spin_unlock_irqrestore(&l1_inst_sram_lock, flags); | |
415 | ||
416 | pr_debug("Allocated address in l1_inst_sram_alloc is 0x%lx+0x%lx\n", | |
417 | (long unsigned int)addr, size); | |
418 | ||
419 | return addr; | |
420 | #else | |
421 | return NULL; | |
422 | #endif | |
423 | } | |
424 | EXPORT_SYMBOL(l1_inst_sram_alloc); | |
425 | ||
426 | int l1_inst_sram_free(const void *addr) | |
427 | { | |
428 | #if L1_CODE_LENGTH != 0 | |
429 | unsigned flags; | |
430 | int ret; | |
431 | ||
432 | /* add mutex operation */ | |
433 | spin_lock_irqsave(&l1_inst_sram_lock, flags); | |
434 | ||
435 | ret = _l1_sram_free(addr, l1_inst_sram, ARRAY_SIZE(l1_inst_sram)); | |
436 | ||
437 | /* add mutex operation */ | |
438 | spin_unlock_irqrestore(&l1_inst_sram_lock, flags); | |
439 | ||
440 | return ret; | |
441 | #else | |
442 | return -1; | |
443 | #endif | |
444 | } | |
445 | EXPORT_SYMBOL(l1_inst_sram_free); | |
446 | ||
447 | /* L1 Scratchpad memory allocate function */ | |
448 | void *l1sram_alloc(size_t size) | |
449 | { | |
450 | unsigned flags; | |
451 | void *addr; | |
452 | ||
453 | /* add mutex operation */ | |
454 | spin_lock_irqsave(&l1sram_lock, flags); | |
455 | ||
456 | addr = _l1_sram_alloc(size, l1_ssram, ARRAY_SIZE(l1_ssram)); | |
457 | ||
458 | /* add mutex operation */ | |
459 | spin_unlock_irqrestore(&l1sram_lock, flags); | |
460 | ||
461 | return addr; | |
462 | } | |
463 | ||
464 | /* L1 Scratchpad memory allocate function */ | |
465 | void *l1sram_alloc_max(size_t *psize) | |
466 | { | |
467 | unsigned flags; | |
468 | void *addr; | |
469 | ||
470 | /* add mutex operation */ | |
471 | spin_lock_irqsave(&l1sram_lock, flags); | |
472 | ||
473 | addr = _l1_sram_alloc_max(l1_ssram, ARRAY_SIZE(l1_ssram), psize); | |
474 | ||
475 | /* add mutex operation */ | |
476 | spin_unlock_irqrestore(&l1sram_lock, flags); | |
477 | ||
478 | return addr; | |
479 | } | |
480 | ||
481 | /* L1 Scratchpad memory free function */ | |
482 | int l1sram_free(const void *addr) | |
483 | { | |
484 | unsigned flags; | |
485 | int ret; | |
486 | ||
487 | /* add mutex operation */ | |
488 | spin_lock_irqsave(&l1sram_lock, flags); | |
489 | ||
490 | ret = _l1_sram_free(addr, l1_ssram, ARRAY_SIZE(l1_ssram)); | |
491 | ||
492 | /* add mutex operation */ | |
493 | spin_unlock_irqrestore(&l1sram_lock, flags); | |
494 | ||
495 | return ret; | |
496 | } | |
497 | ||
498 | int sram_free_with_lsl(const void *addr) | |
499 | { | |
500 | struct sram_list_struct *lsl, **tmp; | |
501 | struct mm_struct *mm = current->mm; | |
502 | ||
503 | for (tmp = &mm->context.sram_list; *tmp; tmp = &(*tmp)->next) | |
504 | if ((*tmp)->addr == addr) | |
505 | goto found; | |
506 | return -1; | |
507 | found: | |
508 | lsl = *tmp; | |
509 | sram_free(addr); | |
510 | *tmp = lsl->next; | |
511 | kfree(lsl); | |
512 | ||
513 | return 0; | |
514 | } | |
515 | EXPORT_SYMBOL(sram_free_with_lsl); | |
516 | ||
517 | void *sram_alloc_with_lsl(size_t size, unsigned long flags) | |
518 | { | |
519 | void *addr = NULL; | |
520 | struct sram_list_struct *lsl = NULL; | |
521 | struct mm_struct *mm = current->mm; | |
522 | ||
dd00cc48 | 523 | lsl = kzalloc(sizeof(struct sram_list_struct), GFP_KERNEL); |
1394f032 BW |
524 | if (!lsl) |
525 | return NULL; | |
1394f032 BW |
526 | |
527 | if (flags & L1_INST_SRAM) | |
528 | addr = l1_inst_sram_alloc(size); | |
529 | ||
530 | if (addr == NULL && (flags & L1_DATA_A_SRAM)) | |
531 | addr = l1_data_A_sram_alloc(size); | |
532 | ||
533 | if (addr == NULL && (flags & L1_DATA_B_SRAM)) | |
534 | addr = l1_data_B_sram_alloc(size); | |
535 | ||
536 | if (addr == NULL) { | |
537 | kfree(lsl); | |
538 | return NULL; | |
539 | } | |
540 | lsl->addr = addr; | |
541 | lsl->length = size; | |
542 | lsl->next = mm->context.sram_list; | |
543 | mm->context.sram_list = lsl; | |
544 | return addr; | |
545 | } | |
546 | EXPORT_SYMBOL(sram_alloc_with_lsl); | |
bc61b4e6 MF |
547 | |
548 | #ifdef CONFIG_PROC_FS | |
549 | /* Once we get a real allocator, we'll throw all of this away. | |
550 | * Until then, we need some sort of visibility into the L1 alloc. | |
551 | */ | |
552 | static void _l1sram_proc_read(char *buf, int *len, const char *desc, | |
553 | struct l1_sram_piece *pfree, const int array_size) | |
554 | { | |
555 | int i; | |
556 | ||
557 | *len += sprintf(&buf[*len], "--- L1 %-14s Size PID State\n", desc); | |
558 | for (i = 0; i < array_size; ++i) { | |
559 | const char *alloc_type; | |
560 | switch (pfree[i].flag) { | |
561 | case SRAM_SLT_NULL: alloc_type = "NULL"; break; | |
562 | case SRAM_SLT_FREE: alloc_type = "FREE"; break; | |
563 | case SRAM_SLT_ALLOCATED: alloc_type = "ALLOCATED"; break; | |
564 | default: alloc_type = "????"; break; | |
565 | } | |
566 | *len += sprintf(&buf[*len], "%p-%p %8i %4i %s\n", | |
567 | pfree[i].paddr, pfree[i].paddr + pfree[i].size, | |
568 | pfree[i].size, pfree[i].pid, alloc_type); | |
569 | } | |
570 | } | |
571 | static int l1sram_proc_read(char *buf, char **start, off_t offset, int count, | |
572 | int *eof, void *data) | |
573 | { | |
574 | int len = 0; | |
575 | ||
576 | _l1sram_proc_read(buf, &len, "Scratchpad", | |
577 | l1_ssram, ARRAY_SIZE(l1_ssram)); | |
578 | #if L1_DATA_A_LENGTH != 0 | |
579 | _l1sram_proc_read(buf, &len, "Data A", | |
580 | l1_data_A_sram, ARRAY_SIZE(l1_data_A_sram)); | |
581 | #endif | |
582 | #if L1_DATA_B_LENGTH != 0 | |
583 | _l1sram_proc_read(buf, &len, "Data B", | |
584 | l1_data_B_sram, ARRAY_SIZE(l1_data_B_sram)); | |
585 | #endif | |
586 | #if L1_CODE_LENGTH != 0 | |
587 | _l1sram_proc_read(buf, &len, "Instruction", | |
588 | l1_inst_sram, ARRAY_SIZE(l1_inst_sram)); | |
589 | #endif | |
590 | ||
591 | return len; | |
592 | } | |
593 | ||
594 | static int __init l1sram_proc_init(void) | |
595 | { | |
596 | struct proc_dir_entry *ptr; | |
597 | ptr = create_proc_entry("sram", S_IFREG | S_IRUGO, NULL); | |
598 | if (!ptr) { | |
599 | printk(KERN_WARNING "unable to create /proc/sram\n"); | |
600 | return -1; | |
601 | } | |
602 | ptr->owner = THIS_MODULE; | |
603 | ptr->read_proc = l1sram_proc_read; | |
604 | return 0; | |
605 | } | |
606 | late_initcall(l1sram_proc_init); | |
607 | #endif |