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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
64236ac1 AJ |
2 | /* |
3 | * Port on Texas Instruments TMS320C6x architecture | |
4 | * | |
5 | * Copyright (C) 2005, 2009, 2010, 2011 Texas Instruments Incorporated | |
6 | * Author: Thomas Charleux (thomas.charleux@jaluna.com) | |
64236ac1 AJ |
7 | */ |
8 | #include <linux/moduleloader.h> | |
9 | #include <linux/elf.h> | |
10 | #include <linux/vmalloc.h> | |
11 | #include <linux/kernel.h> | |
12 | ||
13 | static inline int fixup_pcr(u32 *ip, Elf32_Addr dest, u32 maskbits, int shift) | |
14 | { | |
15 | u32 opcode; | |
16 | long ep = (long)ip & ~31; | |
17 | long delta = ((long)dest - ep) >> 2; | |
18 | long mask = (1 << maskbits) - 1; | |
19 | ||
20 | if ((delta >> (maskbits - 1)) == 0 || | |
21 | (delta >> (maskbits - 1)) == -1) { | |
22 | opcode = *ip; | |
23 | opcode &= ~(mask << shift); | |
24 | opcode |= ((delta & mask) << shift); | |
25 | *ip = opcode; | |
26 | ||
27 | pr_debug("REL PCR_S%d[%p] dest[%p] opcode[%08x]\n", | |
28 | maskbits, ip, (void *)dest, opcode); | |
29 | ||
30 | return 0; | |
31 | } | |
32 | pr_err("PCR_S%d reloc %p -> %p out of range!\n", | |
33 | maskbits, ip, (void *)dest); | |
34 | ||
35 | return -1; | |
36 | } | |
37 | ||
38 | /* | |
39 | * apply a RELA relocation | |
40 | */ | |
41 | int apply_relocate_add(Elf32_Shdr *sechdrs, | |
42 | const char *strtab, | |
43 | unsigned int symindex, | |
44 | unsigned int relsec, | |
45 | struct module *me) | |
46 | { | |
47 | Elf32_Rela *rel = (void *) sechdrs[relsec].sh_addr; | |
48 | Elf_Sym *sym; | |
49 | u32 *location, opcode; | |
50 | unsigned int i; | |
51 | Elf32_Addr v; | |
52 | Elf_Addr offset = 0; | |
53 | ||
54 | pr_debug("Applying relocate section %u to %u with offset 0x%x\n", | |
55 | relsec, sechdrs[relsec].sh_info, offset); | |
56 | ||
57 | for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { | |
58 | /* This is where to make the change */ | |
59 | location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr | |
60 | + rel[i].r_offset - offset; | |
61 | ||
62 | /* This is the symbol it is referring to. Note that all | |
63 | undefined symbols have been resolved. */ | |
64 | sym = (Elf_Sym *)sechdrs[symindex].sh_addr | |
65 | + ELF32_R_SYM(rel[i].r_info); | |
66 | ||
67 | /* this is the adjustment to be made */ | |
68 | v = sym->st_value + rel[i].r_addend; | |
69 | ||
70 | switch (ELF32_R_TYPE(rel[i].r_info)) { | |
71 | case R_C6000_ABS32: | |
72 | pr_debug("RELA ABS32: [%p] = 0x%x\n", location, v); | |
73 | *location = v; | |
74 | break; | |
75 | case R_C6000_ABS16: | |
76 | pr_debug("RELA ABS16: [%p] = 0x%x\n", location, v); | |
77 | *(u16 *)location = v; | |
78 | break; | |
79 | case R_C6000_ABS8: | |
80 | pr_debug("RELA ABS8: [%p] = 0x%x\n", location, v); | |
81 | *(u8 *)location = v; | |
82 | break; | |
83 | case R_C6000_ABS_L16: | |
84 | opcode = *location; | |
85 | opcode &= ~0x7fff80; | |
86 | opcode |= ((v & 0xffff) << 7); | |
87 | pr_debug("RELA ABS_L16[%p] v[0x%x] opcode[0x%x]\n", | |
88 | location, v, opcode); | |
89 | *location = opcode; | |
90 | break; | |
91 | case R_C6000_ABS_H16: | |
92 | opcode = *location; | |
93 | opcode &= ~0x7fff80; | |
94 | opcode |= ((v >> 9) & 0x7fff80); | |
95 | pr_debug("RELA ABS_H16[%p] v[0x%x] opcode[0x%x]\n", | |
96 | location, v, opcode); | |
97 | *location = opcode; | |
98 | break; | |
99 | case R_C6000_PCR_S21: | |
100 | if (fixup_pcr(location, v, 21, 7)) | |
101 | return -ENOEXEC; | |
102 | break; | |
103 | case R_C6000_PCR_S12: | |
104 | if (fixup_pcr(location, v, 12, 16)) | |
105 | return -ENOEXEC; | |
106 | break; | |
107 | case R_C6000_PCR_S10: | |
108 | if (fixup_pcr(location, v, 10, 13)) | |
109 | return -ENOEXEC; | |
110 | break; | |
111 | default: | |
112 | pr_err("module %s: Unknown RELA relocation: %u\n", | |
113 | me->name, ELF32_R_TYPE(rel[i].r_info)); | |
114 | return -ENOEXEC; | |
115 | } | |
116 | } | |
117 | ||
118 | return 0; | |
119 | } |