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5f526d14 | 1 | /* |
1da177e4 LT |
2 | * Head of the kernel - alter with care |
3 | * | |
4 | * Copyright (C) 2000, 2001 Axis Communications AB | |
5 | * | |
6 | * Authors: Bjorn Wesen (bjornw@axis.com) | |
7 | * | |
1da177e4 LT |
8 | */ |
9 | ||
1da177e4 LT |
10 | #define ASSEMBLER_MACROS_ONLY |
11 | /* The IO_* macros use the ## token concatenation operator, so | |
12 | -traditional must not be used when assembling this file. */ | |
556dcee7 | 13 | #include <arch/sv_addr_ag.h> |
1da177e4 LT |
14 | |
15 | #define CRAMFS_MAGIC 0x28cd3d45 | |
16 | #define RAM_INIT_MAGIC 0x56902387 | |
63245d2c | 17 | #define COMMAND_LINE_MAGIC 0x87109563 |
1da177e4 LT |
18 | |
19 | #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\ | |
20 | IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) | |
21 | ||
22 | ;; exported symbols | |
23 | ||
24 | .globl etrax_irv | |
25 | .globl romfs_start | |
26 | .globl romfs_length | |
27 | .globl romfs_in_flash | |
28 | .globl swapper_pg_dir | |
29 | ||
30 | .text | |
31 | ||
32 | ;; This is the entry point of the kernel. We are in supervisor mode. | |
33 | ;; 0x00000000 if Flash, 0x40004000 if DRAM | |
34 | ;; since etrax actually starts at address 2 when booting from flash, we | |
35 | ;; put a nop (2 bytes) here first so we dont accidentally skip the di | |
36 | ;; | |
37 | ;; NOTICE! The registers r8 and r9 are used as parameters carrying | |
38 | ;; information from the decompressor (if the kernel was compressed). | |
39 | ;; They should not be used in the code below until read. | |
40 | ||
41 | nop | |
42 | di | |
43 | ||
44 | ;; First setup the kseg_c mapping from where the kernel is linked | |
45 | ;; to 0x40000000 (where the actual DRAM resides) otherwise | |
46 | ;; we cannot do very much! See arch/cris/README.mm | |
47 | ;; | |
48 | ;; Notice that since we're potentially running at 0x00 or 0x40 right now, | |
49 | ;; we will get a fault as soon as we enable the MMU if we dont | |
50 | ;; temporarily map those segments linearily. | |
51 | ;; | |
52 | ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory | |
53 | ;; slightly different. The bug is that you can't remap bit 31 of | |
54 | ;; an address. Though we can check the version register for | |
55 | ;; whether the bug is present, some constants would then have to | |
56 | ;; be variables, so we don't. The drawback is that you can "only" map | |
57 | ;; 1G per process with CONFIG_CRIS_LOW_MAP. | |
58 | ||
59 | #ifdef CONFIG_CRIS_LOW_MAP | |
60 | ; kseg mappings, temporary map of 0xc0->0x40 | |
61 | move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ | |
62 | | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \ | |
63 | | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \ | |
64 | | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0 | |
65 | move.d $r0, [R_MMU_KBASE_HI] | |
66 | ||
67 | ; temporary map of 0x40->0x40 and 0x60->0x40 | |
68 | move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \ | |
69 | | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 | |
70 | move.d $r0, [R_MMU_KBASE_LO] | |
71 | ||
72 | ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped | |
73 | move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ | |
74 | | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ | |
75 | | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ | |
76 | | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ | |
77 | | IO_STATE (R_MMU_CONFIG, seg_f, page) \ | |
78 | | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ | |
79 | | IO_STATE (R_MMU_CONFIG, seg_d, page) \ | |
80 | | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ | |
81 | | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ | |
82 | | IO_STATE (R_MMU_CONFIG, seg_a, seg) \ | |
83 | | IO_STATE (R_MMU_CONFIG, seg_9, page) \ | |
84 | | IO_STATE (R_MMU_CONFIG, seg_8, page) \ | |
85 | | IO_STATE (R_MMU_CONFIG, seg_7, page) \ | |
86 | | IO_STATE (R_MMU_CONFIG, seg_6, seg) \ | |
87 | | IO_STATE (R_MMU_CONFIG, seg_5, seg) \ | |
88 | | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ | |
89 | | IO_STATE (R_MMU_CONFIG, seg_3, page) \ | |
90 | | IO_STATE (R_MMU_CONFIG, seg_2, page) \ | |
91 | | IO_STATE (R_MMU_CONFIG, seg_1, page) \ | |
92 | | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 | |
93 | move.d $r0, [R_MMU_CONFIG] | |
94 | #else | |
95 | ; kseg mappings | |
96 | move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \ | |
97 | | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ | |
98 | | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0 | |
99 | move.d $r0, [R_MMU_KBASE_HI] | |
100 | ||
101 | ; temporary map of 0x40->0x40 and 0x00->0x00 | |
102 | move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 | |
103 | move.d $r0, [R_MMU_KBASE_LO] | |
104 | ||
105 | ; mmu enable, segs f,e,c,b,4,0 segment mapped | |
106 | move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ | |
107 | | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ | |
108 | | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ | |
109 | | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ | |
110 | | IO_STATE (R_MMU_CONFIG, seg_f, seg) \ | |
111 | | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ | |
112 | | IO_STATE (R_MMU_CONFIG, seg_d, page) \ | |
113 | | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ | |
114 | | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ | |
115 | | IO_STATE (R_MMU_CONFIG, seg_a, page) \ | |
116 | | IO_STATE (R_MMU_CONFIG, seg_9, page) \ | |
117 | | IO_STATE (R_MMU_CONFIG, seg_8, page) \ | |
118 | | IO_STATE (R_MMU_CONFIG, seg_7, page) \ | |
119 | | IO_STATE (R_MMU_CONFIG, seg_6, page) \ | |
120 | | IO_STATE (R_MMU_CONFIG, seg_5, page) \ | |
121 | | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ | |
122 | | IO_STATE (R_MMU_CONFIG, seg_3, page) \ | |
123 | | IO_STATE (R_MMU_CONFIG, seg_2, page) \ | |
124 | | IO_STATE (R_MMU_CONFIG, seg_1, page) \ | |
125 | | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 | |
126 | move.d $r0, [R_MMU_CONFIG] | |
127 | #endif | |
128 | ||
129 | ;; Now we need to sort out the segments and their locations in RAM or | |
130 | ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces: | |
131 | ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image | |
132 | ;; But the linker has linked the kernel to expect this layout in | |
133 | ;; DRAM memory: | |
134 | ;; 1) kernel text, 2) kernel data, 3) kernel BSS | |
135 | ;; (the location of the ROM filesystem is determined by the krom driver) | |
136 | ;; If we boot this from Flash, we want to keep the ROM filesystem in | |
137 | ;; the flash, we want to copy the text and need to copy the data to DRAM. | |
138 | ;; But if we boot from DRAM, we need to move the ROMFS image | |
139 | ;; from its position after kernel data, to after kernel BSS, BEFORE the | |
140 | ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS) | |
141 | ;; | |
142 | ;; In both cases, we start in un-cached mode, and need to jump into a | |
143 | ;; cached PC after we're done fiddling around with the segments. | |
144 | ;; | |
145 | ;; arch/etrax100/etrax100.ld sets some symbols that define the start | |
146 | ;; and end of each segment. | |
147 | ||
148 | ;; Check if we start from DRAM or FLASH by testing PC | |
149 | ||
150 | move.d $pc,$r0 | |
151 | and.d 0x7fffffff,$r0 ; get rid of the non-cache bit | |
152 | cmp.d 0x10000,$r0 ; arbitrary... just something above this code | |
153 | blo _inflash0 | |
154 | nop | |
155 | ||
156 | jump _inram ; enter cached ram | |
157 | ||
158 | ;; Jumpgate for branches. | |
159 | _inflash0: | |
160 | jump _inflash | |
161 | ||
162 | ;; Put this in a suitable section where we can reclaim storage | |
163 | ;; after init. | |
164 | .section ".init.text", "ax" | |
165 | _inflash: | |
166 | #ifdef CONFIG_ETRAX_ETHERNET | |
167 | ;; Start MII clock to make sure it is running when tranceiver is reset | |
168 | move.d START_ETHERNET_CLOCK, $r0 | |
169 | move.d $r0, [R_NETWORK_GEN_CONFIG] | |
170 | #endif | |
171 | ||
172 | ;; Set up waitstates etc according to kernel configuration. | |
173 | #ifndef CONFIG_SVINTO_SIM | |
174 | move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0 | |
175 | move.d $r0, [R_WAITSTATES] | |
176 | ||
177 | move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0 | |
178 | move.d $r0, [R_BUS_CONFIG] | |
179 | #endif | |
180 | ||
181 | ;; We need to initialze DRAM registers before we start using the DRAM | |
182 | ||
183 | cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized? | |
184 | beq _dram_init_finished | |
185 | nop | |
186 | ||
187 | #include "../lib/dram_init.S" | |
188 | ||
189 | _dram_init_finished: | |
190 | ;; Copy text+data to DRAM | |
191 | ;; This is fragile - the calculation of r4 as the image size depends | |
192 | ;; on that the labels below actually are the first and last positions | |
193 | ;; in the linker-script. | |
194 | ;; | |
195 | ;; Then the locating of the cramfs image depends on the aforementioned | |
196 | ;; image being located in the flash at 0. This is most often not true, | |
197 | ;; thus the following does not work (normally there is a rescue-block | |
198 | ;; between the physical start of the flash and the flash-image start, | |
199 | ;; and when run with compression, the kernel is actually unpacked to | |
200 | ;; DRAM and we never get here in the first place :)) | |
201 | ||
202 | moveq 0, $r0 ; source | |
203 | move.d text_start, $r1 ; destination | |
204 | move.d __vmlinux_end, $r2 ; end destination | |
205 | move.d $r2, $r4 | |
206 | sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below | |
207 | 1: move.w [$r0+], $r3 | |
208 | move.w $r3, [$r1+] | |
209 | cmp.d $r2, $r1 | |
210 | blo 1b | |
211 | nop | |
212 | ||
213 | ;; We keep the cramfs in the flash. | |
214 | ;; There might be none, but that does not matter because | |
215 | ;; we don't do anything than read some bytes here. | |
216 | ||
217 | moveq 0, $r0 | |
218 | move.d $r0, [romfs_length] ; default if there is no cramfs | |
219 | ||
220 | move.d [$r4], $r0 ; cramfs_super.magic | |
221 | cmp.d CRAMFS_MAGIC, $r0 | |
222 | bne 1f | |
223 | nop | |
224 | move.d [$r4 + 4], $r0 ; cramfs_super.size | |
225 | move.d $r0, [romfs_length] | |
226 | #ifdef CONFIG_CRIS_LOW_MAP | |
227 | add.d 0x50000000, $r4 ; add flash start in virtual memory (cached) | |
228 | #else | |
229 | add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached) | |
230 | #endif | |
231 | move.d $r4, [romfs_start] | |
232 | 1: | |
233 | moveq 1, $r0 | |
234 | move.d $r0, [romfs_in_flash] | |
235 | ||
236 | jump _start_it ; enter code, cached this time | |
237 | ||
238 | _inram: | |
239 | ;; Move the ROM fs to after BSS end. This assumes that the cramfs | |
240 | ;; second longword contains the length of the cramfs | |
241 | ||
242 | moveq 0, $r0 | |
243 | move.d $r0, [romfs_length] ; default if there is no cramfs | |
244 | ||
245 | ;; The kernel could have been unpacked to DRAM by the loader, but | |
246 | ;; the cramfs image could still be in the Flash directly after the | |
247 | ;; compressed kernel image. The loader passes the address of the | |
248 | ;; byte succeeding the last compressed byte in the flash in the | |
249 | ;; register r9 when starting the kernel. Check if r9 points to a | |
250 | ;; decent cramfs image! | |
251 | ;; (Notice that if this is not booted from the loader, r9 will be | |
252 | ;; garbage but we do sanity checks on it, the chance that it points | |
253 | ;; to a cramfs magic is small.. ) | |
254 | ||
255 | cmp.d 0x0ffffff8, $r9 | |
256 | bhs _no_romfs_in_flash ; r9 points outside the flash area | |
257 | nop | |
258 | move.d [$r9], $r0 ; cramfs_super.magic | |
259 | cmp.d CRAMFS_MAGIC, $r0 | |
260 | bne _no_romfs_in_flash | |
261 | nop | |
262 | move.d [$r9+4], $r0 ; cramfs_super.length | |
263 | move.d $r0, [romfs_length] | |
264 | #ifdef CONFIG_CRIS_LOW_MAP | |
265 | add.d 0x50000000, $r9 ; add flash start in virtual memory (cached) | |
266 | #else | |
267 | add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached) | |
268 | #endif | |
269 | move.d $r9, [romfs_start] | |
270 | ||
271 | moveq 1, $r0 | |
272 | move.d $r0, [romfs_in_flash] | |
273 | ||
274 | jump _start_it ; enter code, cached this time | |
275 | ||
276 | _no_romfs_in_flash: | |
277 | ||
278 | ;; Check if there is a cramfs (magic value). | |
279 | ;; Notice that we check for cramfs magic value - which is | |
280 | ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does | |
281 | ;; not need this mechanism anyway) | |
282 | ||
b4973ae9 | 283 | move.d __init_end, $r0; the image will be after the end of init |
1da177e4 LT |
284 | move.d [$r0], $r1 ; cramfs assumes same endian on host/target |
285 | cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock | |
286 | bne 2f | |
287 | nop | |
288 | ||
289 | ;; Ok. What is its size ? | |
290 | ||
291 | move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb) | |
292 | ||
293 | ;; We want to copy it to the end of the BSS | |
294 | ||
295 | move.d _end, $r1 | |
296 | ||
297 | ;; Remember values so cramfs and setup can find this info | |
298 | ||
299 | move.d $r1, [romfs_start] ; new romfs location | |
300 | move.d $r2, [romfs_length] | |
301 | ||
302 | ;; We need to copy it backwards, since they can be overlapping | |
303 | ||
304 | add.d $r2, $r0 | |
305 | add.d $r2, $r1 | |
306 | ||
307 | ;; Go ahead. Make my loop. | |
308 | ||
309 | lsrq 1, $r2 ; size is in bytes, we copy words | |
310 | ||
311 | 1: move.w [$r0=$r0-2],$r3 | |
312 | move.w $r3,[$r1=$r1-2] | |
313 | subq 1, $r2 | |
314 | bne 1b | |
315 | nop | |
316 | ||
317 | 2: | |
318 | ;; Dont worry that the BSS is tainted. It will be cleared later. | |
319 | ||
320 | moveq 0, $r0 | |
321 | move.d $r0, [romfs_in_flash] | |
322 | ||
323 | jump _start_it ; better skip the additional cramfs check below | |
324 | ||
325 | _start_it: | |
326 | ||
63245d2c MS |
327 | ;; Check if kernel command line is supplied |
328 | cmp.d COMMAND_LINE_MAGIC, $r10 | |
329 | bne no_command_line | |
330 | nop | |
331 | ||
332 | move.d 256, $r13 | |
333 | move.d cris_command_line, $r10 | |
334 | or.d 0x80000000, $r11 ; Make it virtual | |
335 | 1: | |
336 | move.b [$r11+], $r12 | |
337 | move.b $r12, [$r10+] | |
338 | subq 1, $r13 | |
339 | bne 1b | |
340 | nop | |
341 | ||
342 | no_command_line: | |
343 | ||
1da177e4 LT |
344 | ;; the kernel stack is overlayed with the task structure for each |
345 | ;; task. thus the initial kernel stack is in the same page as the | |
346 | ;; init_task (but starts in the top of the page, size 8192) | |
347 | move.d init_thread_union + 8192, $sp | |
348 | move.d ibr_start,$r0 ; this symbol is set by the linker script | |
349 | move $r0,$ibr | |
350 | move.d $r0,[etrax_irv] ; set the interrupt base register and pointer | |
351 | ||
352 | ;; Clear BSS region, from _bss_start to _end | |
353 | ||
354 | move.d __bss_start, $r0 | |
355 | move.d _end, $r1 | |
356 | 1: clear.d [$r0+] | |
357 | cmp.d $r1, $r0 | |
358 | blo 1b | |
359 | nop | |
360 | ||
361 | #ifdef CONFIG_BLK_DEV_ETRAXIDE | |
362 | ;; disable ATA before enabling it in genconfig below | |
363 | moveq 0,$r0 | |
364 | move.d $r0,[R_ATA_CTRL_DATA] | |
365 | move.d $r0,[R_ATA_TRANSFER_CNT] | |
366 | move.d $r0,[R_ATA_CONFIG] | |
367 | #if 0 | |
368 | move.d R_PORT_G_DATA, $r1 | |
369 | move.d $r0, [$r1]; assert ATA bus-reset | |
370 | nop | |
371 | nop | |
372 | nop | |
373 | nop | |
374 | nop | |
375 | nop | |
376 | move.d 0x08000000,$r0 | |
377 | move.d $r0,[$r1] | |
378 | #endif | |
379 | #endif | |
380 | ||
381 | #ifdef CONFIG_JULIETTE | |
382 | ;; configure external DMA channel 0 before enabling it in genconfig | |
383 | ||
384 | moveq 0,$r0 | |
385 | move.d $r0,[R_EXT_DMA_0_ADDR] | |
386 | ; cnt enable, word size, output, stop, size 0 | |
387 | move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \ | |
388 | | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \ | |
389 | | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \ | |
390 | | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \ | |
391 | | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \ | |
392 | | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \ | |
393 | | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \ | |
394 | | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0 | |
395 | move.d $r0,[R_EXT_DMA_0_CMD] | |
396 | ||
397 | ;; reset dma4 and wait for completion | |
398 | ||
399 | moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 | |
400 | move.b $r0,[R_DMA_CH4_CMD] | |
401 | 1: move.b [R_DMA_CH4_CMD],$r0 | |
402 | and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0 | |
403 | cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 | |
404 | beq 1b | |
405 | nop | |
406 | ||
407 | ;; reset dma5 and wait for completion | |
408 | ||
409 | moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 | |
410 | move.b $r0,[R_DMA_CH5_CMD] | |
411 | 1: move.b [R_DMA_CH5_CMD],$r0 | |
412 | and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0 | |
413 | cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 | |
414 | beq 1b | |
415 | nop | |
416 | #endif | |
417 | ||
418 | ;; Etrax product HW genconfig setup | |
419 | ||
420 | moveq 0,$r0 | |
63245d2c | 421 | |
5f526d14 JN |
422 | ;; Select or disable serial port 2 |
423 | #ifdef CONFIG_ETRAX_SERIAL_PORT2 | |
424 | or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0 | |
425 | #else | |
426 | or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0 | |
427 | #endif | |
428 | ||
63245d2c MS |
429 | ;; Init interfaces (disable them). |
430 | or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \ | |
431 | | IO_STATE (R_GEN_CONFIG, ata, disable) \ | |
432 | | IO_STATE (R_GEN_CONFIG, par0, disable) \ | |
63245d2c MS |
433 | | IO_STATE (R_GEN_CONFIG, mio, disable) \ |
434 | | IO_STATE (R_GEN_CONFIG, scsi1, disable) \ | |
435 | | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \ | |
436 | | IO_STATE (R_GEN_CONFIG, par1, disable) \ | |
437 | | IO_STATE (R_GEN_CONFIG, ser3, disable) \ | |
438 | | IO_STATE (R_GEN_CONFIG, mio_w, disable) \ | |
439 | | IO_STATE (R_GEN_CONFIG, usb1, disable) \ | |
440 | | IO_STATE (R_GEN_CONFIG, usb2, disable) \ | |
441 | | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0 | |
442 | ||
443 | ;; Init DMA channel muxing (set to unused clients). | |
444 | or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \ | |
445 | | IO_STATE (R_GEN_CONFIG, dma3, ata) \ | |
446 | | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \ | |
447 | | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \ | |
448 | | IO_STATE (R_GEN_CONFIG, dma6, unused) \ | |
449 | | IO_STATE (R_GEN_CONFIG, dma7, unused) \ | |
450 | | IO_STATE (R_GEN_CONFIG, dma8, usb) \ | |
451 | | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0 | |
452 | ||
1da177e4 LT |
453 | |
454 | #if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT) | |
455 | or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0 | |
456 | #endif | |
457 | ||
458 | #if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT) | |
459 | or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0 | |
460 | #endif | |
461 | #if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT) | |
462 | or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0 | |
463 | #endif | |
464 | ||
465 | #if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT) | |
466 | or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0 | |
467 | #endif | |
468 | ||
469 | move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG | |
470 | ||
471 | #ifndef CONFIG_SVINTO_SIM | |
472 | move.d $r0,[R_GEN_CONFIG] | |
473 | ||
474 | #if 0 | |
475 | moveq 4,$r0 | |
476 | move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out) | |
477 | move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in) | |
478 | 1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish | |
479 | and.b 7,$r0 | |
480 | cmp.b 4,$r0 | |
481 | beq 1b | |
482 | nop | |
483 | 1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish | |
484 | and.b 7,$r0 | |
485 | cmp.b 4,$r0 | |
486 | beq 1b | |
487 | nop | |
488 | #endif | |
489 | ||
490 | moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 | |
491 | move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out) | |
492 | move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in) | |
493 | 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish | |
494 | andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0 | |
495 | cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 | |
496 | beq 1b | |
497 | nop | |
498 | 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish | |
499 | andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0 | |
500 | cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0 | |
501 | beq 1b | |
502 | nop | |
503 | ||
504 | ;; setup port PA and PB default initial directions and data | |
505 | ;; including their shadow registers | |
506 | ||
507 | move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0 | |
508 | #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) | |
509 | or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0 | |
510 | #endif | |
511 | move.b $r0,[port_pa_dir_shadow] | |
512 | move.b $r0,[R_PORT_PA_DIR] | |
513 | move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0 | |
514 | #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) | |
515 | #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) | |
516 | and.b ~(1 << 7),$r0 | |
517 | #else | |
518 | or.b (1 << 7),$r0 | |
519 | #endif | |
520 | #endif | |
521 | move.b $r0,[port_pa_data_shadow] | |
522 | move.b $r0,[R_PORT_PA_DATA] | |
523 | ||
524 | move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0 | |
525 | move.b $r0,[port_pb_config_shadow] | |
526 | move.b $r0,[R_PORT_PB_CONFIG] | |
527 | move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0 | |
528 | #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) | |
529 | or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0 | |
530 | #endif | |
531 | move.b $r0,[port_pb_dir_shadow] | |
532 | move.b $r0,[R_PORT_PB_DIR] | |
533 | move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0 | |
534 | #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) | |
535 | #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) | |
536 | and.b ~(1 << 5),$r0 | |
537 | #else | |
538 | or.b (1 << 5),$r0 | |
539 | #endif | |
540 | #endif | |
541 | move.b $r0,[port_pb_data_shadow] | |
542 | move.b $r0,[R_PORT_PB_DATA] | |
543 | ||
544 | moveq 0, $r0 | |
545 | move.d $r0,[port_pb_i2c_shadow] | |
546 | move.d $r0, [R_PORT_PB_I2C] | |
547 | ||
548 | moveq 0,$r0 | |
549 | #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10) | |
550 | #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) | |
551 | and.d ~(1 << 10),$r0 | |
552 | #else | |
553 | or.d (1 << 10),$r0 | |
554 | #endif | |
555 | #endif | |
556 | #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11) | |
557 | #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) | |
558 | and.d ~(1 << 11),$r0 | |
559 | #else | |
560 | or.d (1 << 11),$r0 | |
561 | #endif | |
562 | #endif | |
563 | move.d $r0,[port_g_data_shadow] | |
564 | move.d $r0,[R_PORT_G_DATA] | |
565 | ||
566 | ;; setup the serial port 0 at 115200 baud for debug purposes | |
567 | ||
568 | moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \ | |
569 | | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \ | |
570 | | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0 | |
571 | move.d $r0,[R_SERIAL0_XOFF] | |
572 | ||
573 | ; 115.2kbaud for both transmit and receive | |
574 | move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \ | |
575 | | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0 | |
576 | move.b $r0,[R_SERIAL0_BAUD] | |
577 | ||
578 | ; Set up and enable the serial0 receiver. | |
579 | move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \ | |
580 | | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \ | |
581 | | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \ | |
582 | | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \ | |
583 | | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \ | |
584 | | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \ | |
585 | | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \ | |
586 | | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0 | |
587 | move.b $r0,[R_SERIAL0_REC_CTRL] | |
588 | ||
589 | ; Set up and enable the serial0 transmitter. | |
590 | move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \ | |
591 | | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \ | |
592 | | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \ | |
593 | | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \ | |
594 | | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \ | |
595 | | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \ | |
596 | | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \ | |
597 | | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0 | |
598 | move.b $r0,[R_SERIAL0_TR_CTRL] | |
599 | ||
600 | ;; setup the serial port 1 at 115200 baud for debug purposes | |
601 | ||
602 | moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \ | |
603 | | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \ | |
604 | | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0 | |
605 | move.d $r0,[R_SERIAL1_XOFF] | |
606 | ||
607 | ; 115.2kbaud for both transmit and receive | |
608 | move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \ | |
609 | | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0 | |
610 | move.b $r0,[R_SERIAL1_BAUD] | |
611 | ||
612 | ; Set up and enable the serial1 receiver. | |
613 | move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \ | |
614 | | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \ | |
615 | | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \ | |
616 | | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \ | |
617 | | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \ | |
618 | | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \ | |
619 | | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \ | |
620 | | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0 | |
621 | move.b $r0,[R_SERIAL1_REC_CTRL] | |
622 | ||
623 | ; Set up and enable the serial1 transmitter. | |
624 | move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \ | |
625 | | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \ | |
626 | | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \ | |
627 | | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \ | |
628 | | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \ | |
629 | | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \ | |
630 | | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \ | |
631 | | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0 | |
632 | move.b $r0,[R_SERIAL1_TR_CTRL] | |
633 | ||
5f526d14 JN |
634 | #ifdef CONFIG_ETRAX_SERIAL_PORT2 |
635 | ;; setup the serial port 2 at 115200 baud for debug purposes | |
636 | ||
637 | moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \ | |
638 | | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \ | |
639 | | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0 | |
640 | move.d $r0,[R_SERIAL2_XOFF] | |
641 | ||
642 | ; 115.2kbaud for both transmit and receive | |
643 | move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \ | |
644 | | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0 | |
645 | move.b $r0,[R_SERIAL2_BAUD] | |
646 | ||
647 | ; Set up and enable the serial2 receiver. | |
648 | move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \ | |
649 | | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \ | |
650 | | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \ | |
651 | | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \ | |
652 | | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \ | |
653 | | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \ | |
654 | | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \ | |
655 | | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0 | |
656 | move.b $r0,[R_SERIAL2_REC_CTRL] | |
657 | ||
658 | ; Set up and enable the serial2 transmitter. | |
659 | move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \ | |
660 | | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \ | |
661 | | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \ | |
662 | | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \ | |
663 | | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \ | |
664 | | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \ | |
665 | | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \ | |
666 | | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0 | |
667 | move.b $r0,[R_SERIAL2_TR_CTRL] | |
668 | #endif | |
1da177e4 LT |
669 | |
670 | #ifdef CONFIG_ETRAX_SERIAL_PORT3 | |
671 | ;; setup the serial port 3 at 115200 baud for debug purposes | |
672 | ||
673 | moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \ | |
674 | | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \ | |
675 | | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0 | |
676 | move.d $r0,[R_SERIAL3_XOFF] | |
677 | ||
678 | ; 115.2kbaud for both transmit and receive | |
679 | move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \ | |
680 | | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0 | |
681 | move.b $r0,[R_SERIAL3_BAUD] | |
682 | ||
683 | ; Set up and enable the serial3 receiver. | |
684 | move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \ | |
685 | | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \ | |
686 | | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \ | |
687 | | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \ | |
688 | | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \ | |
689 | | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \ | |
690 | | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \ | |
691 | | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0 | |
692 | move.b $r0,[R_SERIAL3_REC_CTRL] | |
693 | ||
694 | ; Set up and enable the serial3 transmitter. | |
695 | move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \ | |
696 | | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \ | |
697 | | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \ | |
698 | | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \ | |
699 | | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \ | |
700 | | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \ | |
701 | | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \ | |
702 | | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0 | |
703 | move.b $r0,[R_SERIAL3_TR_CTRL] | |
704 | #endif | |
705 | ||
706 | #endif /* CONFIG_SVINTO_SIM */ | |
707 | ||
708 | jump start_kernel ; jump into the C-function start_kernel in init/main.c | |
709 | ||
710 | .data | |
711 | etrax_irv: | |
712 | .dword 0 | |
713 | romfs_start: | |
714 | .dword 0 | |
715 | romfs_length: | |
716 | .dword 0 | |
717 | romfs_in_flash: | |
718 | .dword 0 | |
719 | ||
720 | ;; put some special pages at the beginning of the kernel aligned | |
721 | ;; to page boundaries - the kernel cannot start until after this | |
722 | ||
723 | #ifdef CONFIG_CRIS_LOW_MAP | |
724 | swapper_pg_dir = 0x60002000 | |
725 | #else | |
726 | swapper_pg_dir = 0xc0002000 | |
727 | #endif | |
728 | ||
729 | .section ".init.data", "aw" | |
730 | #include "../lib/hw_settings.S" |