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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
63245d2c | 2 | /* IO interface mux allocator for ETRAX100LX. |
b1220e2e | 3 | * Copyright 2004-2007, Axis Communications AB |
63245d2c MS |
4 | */ |
5 | ||
6 | ||
b1220e2e | 7 | /* C.f. ETRAX100LX Designer's Reference chapter 19.9 */ |
63245d2c MS |
8 | |
9 | #include <linux/kernel.h> | |
10 | #include <linux/slab.h> | |
11 | #include <linux/errno.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | ||
556dcee7 | 15 | #include <arch/svinto.h> |
63245d2c | 16 | #include <asm/io.h> |
556dcee7 | 17 | #include <arch/io_interface_mux.h> |
b1a154db | 18 | #include <arch/system.h> |
63245d2c MS |
19 | |
20 | ||
21 | #define DBG(s) | |
22 | ||
23 | /* Macro to access ETRAX 100 registers */ | |
24 | #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \ | |
25 | IO_STATE_(reg##_, field##_, _##val) | |
26 | ||
27 | enum io_if_group { | |
28 | group_a = (1<<0), | |
29 | group_b = (1<<1), | |
30 | group_c = (1<<2), | |
31 | group_d = (1<<3), | |
32 | group_e = (1<<4), | |
33 | group_f = (1<<5) | |
34 | }; | |
35 | ||
36 | struct watcher | |
37 | { | |
38 | void (*notify)(const unsigned int gpio_in_available, | |
39 | const unsigned int gpio_out_available, | |
40 | const unsigned char pa_available, | |
41 | const unsigned char pb_available); | |
42 | struct watcher *next; | |
43 | }; | |
44 | ||
45 | ||
46 | struct if_group | |
47 | { | |
48 | enum io_if_group group; | |
b1220e2e JN |
49 | /* name - the name of the group 'A' to 'F' */ |
50 | char *name; | |
51 | /* used - a bit mask of all pins in the group in the order listed | |
52 | * in the tables in 19.9.1 to 19.9.6. Note that no | |
53 | * distinction is made between in, out and in/out pins. */ | |
54 | unsigned int used; | |
63245d2c MS |
55 | }; |
56 | ||
57 | ||
58 | struct interface | |
59 | { | |
60 | enum cris_io_interface ioif; | |
b1220e2e JN |
61 | /* name - the name of the interface */ |
62 | char *name; | |
63 | /* groups - OR'ed together io_if_group flags describing what pin groups | |
64 | * the interface uses pins in. */ | |
63245d2c | 65 | unsigned char groups; |
b1220e2e | 66 | /* used - set when the interface is allocated. */ |
63245d2c MS |
67 | unsigned char used; |
68 | char *owner; | |
b1220e2e JN |
69 | /* group_a through group_f - bit masks describing what pins in the |
70 | * pin groups the interface uses. */ | |
71 | unsigned int group_a; | |
72 | unsigned int group_b; | |
73 | unsigned int group_c; | |
74 | unsigned int group_d; | |
75 | unsigned int group_e; | |
76 | unsigned int group_f; | |
77 | ||
78 | /* gpio_g_in, gpio_g_out, gpio_b - bit masks telling what pins in the | |
79 | * GPIO ports the interface uses. This could be reconstucted using | |
80 | * the group_X masks and a table of what pins the GPIO ports use, | |
81 | * but that would be messy. */ | |
63245d2c MS |
82 | unsigned int gpio_g_in; |
83 | unsigned int gpio_g_out; | |
84 | unsigned char gpio_b; | |
85 | }; | |
86 | ||
87 | static struct if_group if_groups[6] = { | |
88 | { | |
89 | .group = group_a, | |
b1220e2e | 90 | .name = "A", |
63245d2c MS |
91 | .used = 0, |
92 | }, | |
93 | { | |
94 | .group = group_b, | |
b1220e2e | 95 | .name = "B", |
63245d2c MS |
96 | .used = 0, |
97 | }, | |
98 | { | |
99 | .group = group_c, | |
b1220e2e | 100 | .name = "C", |
63245d2c MS |
101 | .used = 0, |
102 | }, | |
103 | { | |
104 | .group = group_d, | |
b1220e2e | 105 | .name = "D", |
63245d2c MS |
106 | .used = 0, |
107 | }, | |
108 | { | |
109 | .group = group_e, | |
b1220e2e | 110 | .name = "E", |
63245d2c MS |
111 | .used = 0, |
112 | }, | |
113 | { | |
114 | .group = group_f, | |
b1220e2e | 115 | .name = "F", |
63245d2c MS |
116 | .used = 0, |
117 | } | |
118 | }; | |
119 | ||
120 | /* The order in the array must match the order of enum | |
121 | * cris_io_interface in io_interface_mux.h */ | |
122 | static struct interface interfaces[] = { | |
123 | /* Begin Non-multiplexed interfaces */ | |
124 | { | |
125 | .ioif = if_eth, | |
b1220e2e | 126 | .name = "ethernet", |
63245d2c | 127 | .groups = 0, |
b1220e2e JN |
128 | |
129 | .group_a = 0, | |
130 | .group_b = 0, | |
131 | .group_c = 0, | |
132 | .group_d = 0, | |
133 | .group_e = 0, | |
134 | .group_f = 0, | |
135 | ||
63245d2c MS |
136 | .gpio_g_in = 0, |
137 | .gpio_g_out = 0, | |
138 | .gpio_b = 0 | |
139 | }, | |
140 | { | |
141 | .ioif = if_serial_0, | |
b1220e2e | 142 | .name = "serial_0", |
63245d2c | 143 | .groups = 0, |
b1220e2e JN |
144 | |
145 | .group_a = 0, | |
146 | .group_b = 0, | |
147 | .group_c = 0, | |
148 | .group_d = 0, | |
149 | .group_e = 0, | |
150 | .group_f = 0, | |
151 | ||
63245d2c MS |
152 | .gpio_g_in = 0, |
153 | .gpio_g_out = 0, | |
154 | .gpio_b = 0 | |
155 | }, | |
156 | /* End Non-multiplexed interfaces */ | |
157 | { | |
158 | .ioif = if_serial_1, | |
b1220e2e | 159 | .name = "serial_1", |
63245d2c | 160 | .groups = group_e, |
b1220e2e JN |
161 | |
162 | .group_a = 0, | |
163 | .group_b = 0, | |
164 | .group_c = 0, | |
165 | .group_d = 0, | |
166 | .group_e = 0x0f, | |
167 | .group_f = 0, | |
168 | ||
63245d2c MS |
169 | .gpio_g_in = 0x00000000, |
170 | .gpio_g_out = 0x00000000, | |
171 | .gpio_b = 0x00 | |
172 | }, | |
173 | { | |
174 | .ioif = if_serial_2, | |
b1220e2e | 175 | .name = "serial_2", |
63245d2c | 176 | .groups = group_b, |
b1220e2e JN |
177 | |
178 | .group_a = 0, | |
179 | .group_b = 0x0f, | |
180 | .group_c = 0, | |
181 | .group_d = 0, | |
182 | .group_e = 0, | |
183 | .group_f = 0, | |
184 | ||
63245d2c MS |
185 | .gpio_g_in = 0x000000c0, |
186 | .gpio_g_out = 0x000000c0, | |
187 | .gpio_b = 0x00 | |
188 | }, | |
189 | { | |
190 | .ioif = if_serial_3, | |
b1220e2e | 191 | .name = "serial_3", |
63245d2c | 192 | .groups = group_c, |
b1220e2e JN |
193 | |
194 | .group_a = 0, | |
195 | .group_b = 0, | |
196 | .group_c = 0x0f, | |
197 | .group_d = 0, | |
198 | .group_e = 0, | |
199 | .group_f = 0, | |
200 | ||
63245d2c MS |
201 | .gpio_g_in = 0xc0000000, |
202 | .gpio_g_out = 0xc0000000, | |
203 | .gpio_b = 0x00 | |
204 | }, | |
205 | { | |
206 | .ioif = if_sync_serial_1, | |
b1220e2e JN |
207 | .name = "sync_serial_1", |
208 | .groups = group_e | group_f, | |
209 | ||
210 | .group_a = 0, | |
211 | .group_b = 0, | |
212 | .group_c = 0, | |
213 | .group_d = 0, | |
214 | .group_e = 0x0f, | |
215 | .group_f = 0x10, | |
216 | ||
63245d2c MS |
217 | .gpio_g_in = 0x00000000, |
218 | .gpio_g_out = 0x00000000, | |
219 | .gpio_b = 0x10 | |
220 | }, | |
221 | { | |
222 | .ioif = if_sync_serial_3, | |
b1220e2e | 223 | .name = "sync_serial_3", |
63245d2c | 224 | .groups = group_c | group_f, |
b1220e2e JN |
225 | |
226 | .group_a = 0, | |
227 | .group_b = 0, | |
228 | .group_c = 0x0f, | |
229 | .group_d = 0, | |
230 | .group_e = 0, | |
231 | .group_f = 0x80, | |
232 | ||
63245d2c MS |
233 | .gpio_g_in = 0xc0000000, |
234 | .gpio_g_out = 0xc0000000, | |
235 | .gpio_b = 0x80 | |
236 | }, | |
237 | { | |
238 | .ioif = if_shared_ram, | |
b1220e2e | 239 | .name = "shared_ram", |
63245d2c | 240 | .groups = group_a, |
b1220e2e JN |
241 | |
242 | .group_a = 0x7f8ff, | |
243 | .group_b = 0, | |
244 | .group_c = 0, | |
245 | .group_d = 0, | |
246 | .group_e = 0, | |
247 | .group_f = 0, | |
248 | ||
63245d2c MS |
249 | .gpio_g_in = 0x0000ff3e, |
250 | .gpio_g_out = 0x0000ff38, | |
251 | .gpio_b = 0x00 | |
252 | }, | |
253 | { | |
254 | .ioif = if_shared_ram_w, | |
b1220e2e | 255 | .name = "shared_ram_w", |
63245d2c | 256 | .groups = group_a | group_d, |
b1220e2e JN |
257 | |
258 | .group_a = 0x7f8ff, | |
259 | .group_b = 0, | |
260 | .group_c = 0, | |
261 | .group_d = 0xff, | |
262 | .group_e = 0, | |
263 | .group_f = 0, | |
264 | ||
63245d2c MS |
265 | .gpio_g_in = 0x00ffff3e, |
266 | .gpio_g_out = 0x00ffff38, | |
267 | .gpio_b = 0x00 | |
268 | }, | |
269 | { | |
270 | .ioif = if_par_0, | |
b1220e2e | 271 | .name = "par_0", |
63245d2c | 272 | .groups = group_a, |
b1220e2e JN |
273 | |
274 | .group_a = 0x7fbff, | |
275 | .group_b = 0, | |
276 | .group_c = 0, | |
277 | .group_d = 0, | |
278 | .group_e = 0, | |
279 | .group_f = 0, | |
280 | ||
63245d2c MS |
281 | .gpio_g_in = 0x0000ff3e, |
282 | .gpio_g_out = 0x0000ff3e, | |
283 | .gpio_b = 0x00 | |
284 | }, | |
285 | { | |
286 | .ioif = if_par_1, | |
b1220e2e | 287 | .name = "par_1", |
63245d2c | 288 | .groups = group_d, |
b1220e2e JN |
289 | |
290 | .group_a = 0, | |
291 | .group_b = 0, | |
292 | .group_c = 0, | |
293 | .group_d = 0x7feff, | |
294 | .group_e = 0, | |
295 | .group_f = 0, | |
296 | ||
63245d2c MS |
297 | .gpio_g_in = 0x3eff0000, |
298 | .gpio_g_out = 0x3eff0000, | |
299 | .gpio_b = 0x00 | |
300 | }, | |
301 | { | |
302 | .ioif = if_par_w, | |
b1220e2e | 303 | .name = "par_w", |
63245d2c | 304 | .groups = group_a | group_d, |
b1220e2e JN |
305 | |
306 | .group_a = 0x7fbff, | |
307 | .group_b = 0, | |
308 | .group_c = 0, | |
309 | .group_d = 0xff, | |
310 | .group_e = 0, | |
311 | .group_f = 0, | |
312 | ||
63245d2c MS |
313 | .gpio_g_in = 0x00ffff3e, |
314 | .gpio_g_out = 0x00ffff3e, | |
315 | .gpio_b = 0x00 | |
316 | }, | |
317 | { | |
318 | .ioif = if_scsi8_0, | |
b1220e2e JN |
319 | .name = "scsi8_0", |
320 | .groups = group_a | group_b | group_f, | |
321 | ||
322 | .group_a = 0x7ffff, | |
323 | .group_b = 0x0f, | |
324 | .group_c = 0, | |
325 | .group_d = 0, | |
326 | .group_e = 0, | |
327 | .group_f = 0x10, | |
328 | ||
63245d2c MS |
329 | .gpio_g_in = 0x0000ffff, |
330 | .gpio_g_out = 0x0000ffff, | |
331 | .gpio_b = 0x10 | |
332 | }, | |
333 | { | |
334 | .ioif = if_scsi8_1, | |
b1220e2e JN |
335 | .name = "scsi8_1", |
336 | .groups = group_c | group_d | group_f, | |
337 | ||
338 | .group_a = 0, | |
339 | .group_b = 0, | |
340 | .group_c = 0x0f, | |
341 | .group_d = 0x7ffff, | |
342 | .group_e = 0, | |
343 | .group_f = 0x80, | |
344 | ||
63245d2c MS |
345 | .gpio_g_in = 0xffff0000, |
346 | .gpio_g_out = 0xffff0000, | |
347 | .gpio_b = 0x80 | |
348 | }, | |
349 | { | |
350 | .ioif = if_scsi_w, | |
b1220e2e | 351 | .name = "scsi_w", |
63245d2c | 352 | .groups = group_a | group_b | group_d | group_f, |
b1220e2e JN |
353 | |
354 | .group_a = 0x7ffff, | |
355 | .group_b = 0x0f, | |
356 | .group_c = 0, | |
357 | .group_d = 0x601ff, | |
358 | .group_e = 0, | |
359 | .group_f = 0x90, | |
360 | ||
63245d2c MS |
361 | .gpio_g_in = 0x01ffffff, |
362 | .gpio_g_out = 0x07ffffff, | |
363 | .gpio_b = 0x80 | |
364 | }, | |
365 | { | |
366 | .ioif = if_ata, | |
b1220e2e | 367 | .name = "ata", |
63245d2c | 368 | .groups = group_a | group_b | group_c | group_d, |
b1220e2e JN |
369 | |
370 | .group_a = 0x7ffff, | |
371 | .group_b = 0x0f, | |
372 | .group_c = 0x0f, | |
373 | .group_d = 0x7cfff, | |
374 | .group_e = 0, | |
375 | .group_f = 0, | |
376 | ||
63245d2c MS |
377 | .gpio_g_in = 0xf9ffffff, |
378 | .gpio_g_out = 0xffffffff, | |
379 | .gpio_b = 0x80 | |
380 | }, | |
381 | { | |
382 | .ioif = if_csp, | |
b1220e2e JN |
383 | .name = "csp", |
384 | .groups = group_f, | |
385 | ||
386 | .group_a = 0, | |
387 | .group_b = 0, | |
388 | .group_c = 0, | |
389 | .group_d = 0, | |
390 | .group_e = 0, | |
391 | .group_f = 0xfc, | |
392 | ||
63245d2c MS |
393 | .gpio_g_in = 0x00000000, |
394 | .gpio_g_out = 0x00000000, | |
395 | .gpio_b = 0xfc | |
396 | }, | |
397 | { | |
398 | .ioif = if_i2c, | |
b1220e2e JN |
399 | .name = "i2c", |
400 | .groups = group_f, | |
401 | ||
402 | .group_a = 0, | |
403 | .group_b = 0, | |
404 | .group_c = 0, | |
405 | .group_d = 0, | |
406 | .group_e = 0, | |
407 | .group_f = 0x03, | |
408 | ||
63245d2c MS |
409 | .gpio_g_in = 0x00000000, |
410 | .gpio_g_out = 0x00000000, | |
411 | .gpio_b = 0x03 | |
412 | }, | |
413 | { | |
414 | .ioif = if_usb_1, | |
b1220e2e | 415 | .name = "usb_1", |
63245d2c | 416 | .groups = group_e | group_f, |
b1220e2e JN |
417 | |
418 | .group_a = 0, | |
419 | .group_b = 0, | |
420 | .group_c = 0, | |
421 | .group_d = 0, | |
422 | .group_e = 0x0f, | |
423 | .group_f = 0x2c, | |
424 | ||
63245d2c MS |
425 | .gpio_g_in = 0x00000000, |
426 | .gpio_g_out = 0x00000000, | |
427 | .gpio_b = 0x2c | |
428 | }, | |
429 | { | |
430 | .ioif = if_usb_2, | |
b1220e2e | 431 | .name = "usb_2", |
63245d2c | 432 | .groups = group_d, |
b1220e2e JN |
433 | |
434 | .group_a = 0, | |
435 | .group_b = 0, | |
436 | .group_c = 0, | |
437 | .group_d = 0, | |
438 | .group_e = 0x33e00, | |
439 | .group_f = 0, | |
440 | ||
441 | .gpio_g_in = 0x3e000000, | |
442 | .gpio_g_out = 0x0c000000, | |
63245d2c MS |
443 | .gpio_b = 0x00 |
444 | }, | |
445 | /* GPIO pins */ | |
446 | { | |
447 | .ioif = if_gpio_grp_a, | |
b1220e2e | 448 | .name = "gpio_a", |
63245d2c | 449 | .groups = group_a, |
b1220e2e JN |
450 | |
451 | .group_a = 0, | |
452 | .group_b = 0, | |
453 | .group_c = 0, | |
454 | .group_d = 0, | |
455 | .group_e = 0, | |
456 | .group_f = 0, | |
457 | ||
63245d2c MS |
458 | .gpio_g_in = 0x0000ff3f, |
459 | .gpio_g_out = 0x0000ff3f, | |
460 | .gpio_b = 0x00 | |
461 | }, | |
462 | { | |
463 | .ioif = if_gpio_grp_b, | |
b1220e2e | 464 | .name = "gpio_b", |
63245d2c | 465 | .groups = group_b, |
b1220e2e JN |
466 | |
467 | .group_a = 0, | |
468 | .group_b = 0, | |
469 | .group_c = 0, | |
470 | .group_d = 0, | |
471 | .group_e = 0, | |
472 | .group_f = 0, | |
473 | ||
63245d2c MS |
474 | .gpio_g_in = 0x000000c0, |
475 | .gpio_g_out = 0x000000c0, | |
476 | .gpio_b = 0x00 | |
477 | }, | |
478 | { | |
479 | .ioif = if_gpio_grp_c, | |
b1220e2e | 480 | .name = "gpio_c", |
63245d2c | 481 | .groups = group_c, |
b1220e2e JN |
482 | |
483 | .group_a = 0, | |
484 | .group_b = 0, | |
485 | .group_c = 0, | |
486 | .group_d = 0, | |
487 | .group_e = 0, | |
488 | .group_f = 0, | |
489 | ||
63245d2c MS |
490 | .gpio_g_in = 0xc0000000, |
491 | .gpio_g_out = 0xc0000000, | |
492 | .gpio_b = 0x00 | |
493 | }, | |
494 | { | |
495 | .ioif = if_gpio_grp_d, | |
b1220e2e | 496 | .name = "gpio_d", |
63245d2c | 497 | .groups = group_d, |
b1220e2e JN |
498 | |
499 | .group_a = 0, | |
500 | .group_b = 0, | |
501 | .group_c = 0, | |
502 | .group_d = 0, | |
503 | .group_e = 0, | |
504 | .group_f = 0, | |
505 | ||
63245d2c MS |
506 | .gpio_g_in = 0x3fff0000, |
507 | .gpio_g_out = 0x3fff0000, | |
508 | .gpio_b = 0x00 | |
509 | }, | |
510 | { | |
511 | .ioif = if_gpio_grp_e, | |
b1220e2e | 512 | .name = "gpio_e", |
63245d2c | 513 | .groups = group_e, |
b1220e2e JN |
514 | |
515 | .group_a = 0, | |
516 | .group_b = 0, | |
517 | .group_c = 0, | |
518 | .group_d = 0, | |
519 | .group_e = 0, | |
520 | .group_f = 0, | |
521 | ||
63245d2c MS |
522 | .gpio_g_in = 0x00000000, |
523 | .gpio_g_out = 0x00000000, | |
524 | .gpio_b = 0x00 | |
525 | }, | |
526 | { | |
527 | .ioif = if_gpio_grp_f, | |
b1220e2e | 528 | .name = "gpio_f", |
63245d2c | 529 | .groups = group_f, |
b1220e2e JN |
530 | |
531 | .group_a = 0, | |
532 | .group_b = 0, | |
533 | .group_c = 0, | |
534 | .group_d = 0, | |
535 | .group_e = 0, | |
536 | .group_f = 0, | |
537 | ||
63245d2c MS |
538 | .gpio_g_in = 0x00000000, |
539 | .gpio_g_out = 0x00000000, | |
540 | .gpio_b = 0xff | |
541 | } | |
542 | /* Array end */ | |
543 | }; | |
544 | ||
545 | static struct watcher *watchers = NULL; | |
546 | ||
b1220e2e | 547 | /* The pins that are free to use in the GPIO ports. */ |
63245d2c MS |
548 | static unsigned int gpio_in_pins = 0xffffffff; |
549 | static unsigned int gpio_out_pins = 0xffffffff; | |
550 | static unsigned char gpio_pb_pins = 0xff; | |
551 | static unsigned char gpio_pa_pins = 0xff; | |
552 | ||
b1220e2e | 553 | /* Identifiers for the owners of the GPIO pins. */ |
63245d2c MS |
554 | static enum cris_io_interface gpio_pa_owners[8]; |
555 | static enum cris_io_interface gpio_pb_owners[8]; | |
556 | static enum cris_io_interface gpio_pg_owners[32]; | |
557 | ||
558 | static int cris_io_interface_init(void); | |
559 | ||
560 | static unsigned char clear_group_from_set(const unsigned char groups, struct if_group *group) | |
561 | { | |
562 | return (groups & ~group->group); | |
563 | } | |
564 | ||
565 | ||
566 | static struct if_group *get_group(const unsigned char groups) | |
567 | { | |
568 | int i; | |
16ad1b49 | 569 | for (i = 0; i < ARRAY_SIZE(if_groups); i++) { |
63245d2c MS |
570 | if (groups & if_groups[i].group) { |
571 | return &if_groups[i]; | |
572 | } | |
573 | } | |
574 | return NULL; | |
575 | } | |
576 | ||
577 | ||
578 | static void notify_watchers(void) | |
579 | { | |
580 | struct watcher *w = watchers; | |
581 | ||
582 | DBG(printk("io_interface_mux: notifying watchers\n")); | |
583 | ||
584 | while (NULL != w) { | |
585 | w->notify((const unsigned int)gpio_in_pins, | |
586 | (const unsigned int)gpio_out_pins, | |
587 | (const unsigned char)gpio_pa_pins, | |
588 | (const unsigned char)gpio_pb_pins); | |
589 | w = w->next; | |
590 | } | |
591 | } | |
592 | ||
593 | ||
594 | int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id) | |
595 | { | |
596 | int set_gen_config = 0; | |
597 | int set_gen_config_ii = 0; | |
598 | unsigned long int gens; | |
599 | unsigned long int gens_ii; | |
600 | struct if_group *grp; | |
601 | unsigned char group_set; | |
602 | unsigned long flags; | |
b1220e2e | 603 | int res = 0; |
63245d2c MS |
604 | |
605 | (void)cris_io_interface_init(); | |
606 | ||
607 | DBG(printk("cris_request_io_interface(%d, \"%s\")\n", ioif, device_id)); | |
608 | ||
609 | if ((ioif >= if_max_interfaces) || (ioif < 0)) { | |
b1220e2e JN |
610 | printk(KERN_CRIT "cris_request_io_interface: Bad interface " |
611 | "%u submitted for %s\n", | |
63245d2c MS |
612 | ioif, |
613 | device_id); | |
614 | return -EINVAL; | |
615 | } | |
616 | ||
617 | local_irq_save(flags); | |
618 | ||
619 | if (interfaces[ioif].used) { | |
b1220e2e JN |
620 | printk(KERN_CRIT "cris_io_interface: Cannot allocate interface " |
621 | "%s for %s, in use by %s\n", | |
622 | interfaces[ioif].name, | |
63245d2c MS |
623 | device_id, |
624 | interfaces[ioif].owner); | |
b1220e2e JN |
625 | res = -EBUSY; |
626 | goto exit; | |
63245d2c MS |
627 | } |
628 | ||
b1220e2e JN |
629 | /* Check that all required pins in the used groups are free |
630 | * before allocating. */ | |
63245d2c MS |
631 | group_set = interfaces[ioif].groups; |
632 | while (NULL != (grp = get_group(group_set))) { | |
b1220e2e JN |
633 | unsigned int if_group_use = 0; |
634 | ||
635 | switch (grp->group) { | |
636 | case group_a: | |
637 | if_group_use = interfaces[ioif].group_a; | |
638 | break; | |
639 | case group_b: | |
640 | if_group_use = interfaces[ioif].group_b; | |
641 | break; | |
642 | case group_c: | |
643 | if_group_use = interfaces[ioif].group_c; | |
644 | break; | |
645 | case group_d: | |
646 | if_group_use = interfaces[ioif].group_d; | |
647 | break; | |
648 | case group_e: | |
649 | if_group_use = interfaces[ioif].group_e; | |
650 | break; | |
651 | case group_f: | |
652 | if_group_use = interfaces[ioif].group_f; | |
653 | break; | |
654 | default: | |
655 | BUG_ON(1); | |
656 | } | |
657 | ||
658 | if (if_group_use & grp->used) { | |
659 | printk(KERN_INFO "cris_request_io_interface: group " | |
660 | "%s needed by %s not available\n", | |
661 | grp->name, interfaces[ioif].name); | |
662 | res = -EBUSY; | |
663 | goto exit; | |
63245d2c | 664 | } |
b1220e2e | 665 | |
63245d2c MS |
666 | group_set = clear_group_from_set(group_set, grp); |
667 | } | |
668 | ||
669 | /* Are the required GPIO pins available too? */ | |
b1220e2e JN |
670 | if (((interfaces[ioif].gpio_g_in & gpio_in_pins) != |
671 | interfaces[ioif].gpio_g_in) || | |
672 | ((interfaces[ioif].gpio_g_out & gpio_out_pins) != | |
673 | interfaces[ioif].gpio_g_out) || | |
674 | ((interfaces[ioif].gpio_b & gpio_pb_pins) != | |
675 | interfaces[ioif].gpio_b)) { | |
676 | printk(KERN_CRIT "cris_request_io_interface: Could not get " | |
677 | "required pins for interface %u\n", ioif); | |
678 | res = -EBUSY; | |
679 | goto exit; | |
63245d2c MS |
680 | } |
681 | ||
b1220e2e | 682 | /* Check which registers need to be reconfigured. */ |
63245d2c MS |
683 | gens = genconfig_shadow; |
684 | gens_ii = gen_config_ii_shadow; | |
685 | ||
686 | set_gen_config = 1; | |
687 | switch (ioif) | |
688 | { | |
689 | /* Begin Non-multiplexed interfaces */ | |
690 | case if_eth: | |
691 | /* fall through */ | |
692 | case if_serial_0: | |
693 | set_gen_config = 0; | |
694 | break; | |
695 | /* End Non-multiplexed interfaces */ | |
696 | case if_serial_1: | |
697 | set_gen_config_ii = 1; | |
698 | SETS(gens_ii, R_GEN_CONFIG_II, sermode1, async); | |
699 | break; | |
700 | case if_serial_2: | |
701 | SETS(gens, R_GEN_CONFIG, ser2, select); | |
702 | break; | |
703 | case if_serial_3: | |
704 | SETS(gens, R_GEN_CONFIG, ser3, select); | |
705 | set_gen_config_ii = 1; | |
706 | SETS(gens_ii, R_GEN_CONFIG_II, sermode3, async); | |
707 | break; | |
708 | case if_sync_serial_1: | |
709 | set_gen_config_ii = 1; | |
710 | SETS(gens_ii, R_GEN_CONFIG_II, sermode1, sync); | |
711 | break; | |
712 | case if_sync_serial_3: | |
713 | SETS(gens, R_GEN_CONFIG, ser3, select); | |
714 | set_gen_config_ii = 1; | |
715 | SETS(gens_ii, R_GEN_CONFIG_II, sermode3, sync); | |
716 | break; | |
717 | case if_shared_ram: | |
718 | SETS(gens, R_GEN_CONFIG, mio, select); | |
719 | break; | |
720 | case if_shared_ram_w: | |
721 | SETS(gens, R_GEN_CONFIG, mio_w, select); | |
722 | break; | |
723 | case if_par_0: | |
724 | SETS(gens, R_GEN_CONFIG, par0, select); | |
725 | break; | |
726 | case if_par_1: | |
727 | SETS(gens, R_GEN_CONFIG, par1, select); | |
728 | break; | |
729 | case if_par_w: | |
730 | SETS(gens, R_GEN_CONFIG, par0, select); | |
731 | SETS(gens, R_GEN_CONFIG, par_w, select); | |
732 | break; | |
733 | case if_scsi8_0: | |
734 | SETS(gens, R_GEN_CONFIG, scsi0, select); | |
735 | break; | |
736 | case if_scsi8_1: | |
737 | SETS(gens, R_GEN_CONFIG, scsi1, select); | |
738 | break; | |
739 | case if_scsi_w: | |
740 | SETS(gens, R_GEN_CONFIG, scsi0, select); | |
741 | SETS(gens, R_GEN_CONFIG, scsi0w, select); | |
742 | break; | |
743 | case if_ata: | |
744 | SETS(gens, R_GEN_CONFIG, ata, select); | |
745 | break; | |
746 | case if_csp: | |
747 | /* fall through */ | |
748 | case if_i2c: | |
749 | set_gen_config = 0; | |
750 | break; | |
751 | case if_usb_1: | |
752 | SETS(gens, R_GEN_CONFIG, usb1, select); | |
753 | break; | |
754 | case if_usb_2: | |
755 | SETS(gens, R_GEN_CONFIG, usb2, select); | |
756 | break; | |
757 | case if_gpio_grp_a: | |
758 | /* GPIO groups are only accounted, don't do configuration changes. */ | |
759 | /* fall through */ | |
760 | case if_gpio_grp_b: | |
761 | /* fall through */ | |
762 | case if_gpio_grp_c: | |
763 | /* fall through */ | |
764 | case if_gpio_grp_d: | |
765 | /* fall through */ | |
766 | case if_gpio_grp_e: | |
767 | /* fall through */ | |
768 | case if_gpio_grp_f: | |
769 | set_gen_config = 0; | |
770 | break; | |
771 | default: | |
b1220e2e JN |
772 | printk(KERN_INFO "cris_request_io_interface: Bad interface " |
773 | "%u submitted for %s\n", | |
774 | ioif, device_id); | |
775 | res = -EBUSY; | |
776 | goto exit; | |
777 | } | |
778 | ||
779 | /* All needed I/O pins and pin groups are free, allocate. */ | |
780 | group_set = interfaces[ioif].groups; | |
781 | while (NULL != (grp = get_group(group_set))) { | |
782 | unsigned int if_group_use = 0; | |
783 | ||
784 | switch (grp->group) { | |
785 | case group_a: | |
786 | if_group_use = interfaces[ioif].group_a; | |
787 | break; | |
788 | case group_b: | |
789 | if_group_use = interfaces[ioif].group_b; | |
790 | break; | |
791 | case group_c: | |
792 | if_group_use = interfaces[ioif].group_c; | |
793 | break; | |
794 | case group_d: | |
795 | if_group_use = interfaces[ioif].group_d; | |
796 | break; | |
797 | case group_e: | |
798 | if_group_use = interfaces[ioif].group_e; | |
799 | break; | |
800 | case group_f: | |
801 | if_group_use = interfaces[ioif].group_f; | |
802 | break; | |
803 | default: | |
804 | BUG_ON(1); | |
805 | } | |
806 | grp->used |= if_group_use; | |
807 | ||
808 | group_set = clear_group_from_set(group_set, grp); | |
63245d2c MS |
809 | } |
810 | ||
811 | interfaces[ioif].used = 1; | |
812 | interfaces[ioif].owner = (char*)device_id; | |
813 | ||
814 | if (set_gen_config) { | |
815 | volatile int i; | |
816 | genconfig_shadow = gens; | |
817 | *R_GEN_CONFIG = genconfig_shadow; | |
818 | /* Wait 12 cycles before doing any DMA command */ | |
819 | for(i = 6; i > 0; i--) | |
820 | nop(); | |
821 | } | |
822 | if (set_gen_config_ii) { | |
823 | gen_config_ii_shadow = gens_ii; | |
824 | *R_GEN_CONFIG_II = gen_config_ii_shadow; | |
825 | } | |
826 | ||
b1220e2e JN |
827 | DBG(printk(KERN_DEBUG "GPIO pins: available before: " |
828 | "g_in=0x%08x g_out=0x%08x pb=0x%02x\n", | |
829 | gpio_in_pins, gpio_out_pins, gpio_pb_pins)); | |
830 | DBG(printk(KERN_DEBUG | |
831 | "grabbing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n", | |
832 | interfaces[ioif].gpio_g_in, | |
833 | interfaces[ioif].gpio_g_out, | |
834 | interfaces[ioif].gpio_b)); | |
63245d2c MS |
835 | |
836 | gpio_in_pins &= ~interfaces[ioif].gpio_g_in; | |
837 | gpio_out_pins &= ~interfaces[ioif].gpio_g_out; | |
838 | gpio_pb_pins &= ~interfaces[ioif].gpio_b; | |
839 | ||
b1220e2e JN |
840 | DBG(printk(KERN_DEBUG "GPIO pins: available after: " |
841 | "g_in=0x%08x g_out=0x%08x pb=0x%02x\n", | |
842 | gpio_in_pins, gpio_out_pins, gpio_pb_pins)); | |
63245d2c | 843 | |
b1220e2e | 844 | exit: |
63245d2c | 845 | local_irq_restore(flags); |
b1220e2e JN |
846 | if (res == 0) |
847 | notify_watchers(); | |
848 | return res; | |
63245d2c MS |
849 | } |
850 | ||
851 | ||
852 | void cris_free_io_interface(enum cris_io_interface ioif) | |
853 | { | |
854 | struct if_group *grp; | |
855 | unsigned char group_set; | |
856 | unsigned long flags; | |
857 | ||
858 | (void)cris_io_interface_init(); | |
859 | ||
860 | if ((ioif >= if_max_interfaces) || (ioif < 0)) { | |
861 | printk(KERN_CRIT "cris_free_io_interface: Bad interface %u\n", | |
862 | ioif); | |
863 | return; | |
864 | } | |
865 | local_irq_save(flags); | |
866 | if (!interfaces[ioif].used) { | |
867 | printk(KERN_CRIT "cris_free_io_interface: Freeing free interface %u\n", | |
868 | ioif); | |
869 | local_irq_restore(flags); | |
870 | return; | |
871 | } | |
872 | group_set = interfaces[ioif].groups; | |
873 | while (NULL != (grp = get_group(group_set))) { | |
b1220e2e JN |
874 | unsigned int if_group_use = 0; |
875 | ||
876 | switch (grp->group) { | |
877 | case group_a: | |
878 | if_group_use = interfaces[ioif].group_a; | |
879 | break; | |
880 | case group_b: | |
881 | if_group_use = interfaces[ioif].group_b; | |
882 | break; | |
883 | case group_c: | |
884 | if_group_use = interfaces[ioif].group_c; | |
885 | break; | |
886 | case group_d: | |
887 | if_group_use = interfaces[ioif].group_d; | |
888 | break; | |
889 | case group_e: | |
890 | if_group_use = interfaces[ioif].group_e; | |
891 | break; | |
892 | case group_f: | |
893 | if_group_use = interfaces[ioif].group_f; | |
894 | break; | |
895 | default: | |
896 | BUG_ON(1); | |
63245d2c | 897 | } |
b1220e2e JN |
898 | |
899 | if ((grp->used & if_group_use) != if_group_use) | |
900 | BUG_ON(1); | |
901 | grp->used = grp->used & ~if_group_use; | |
902 | ||
63245d2c MS |
903 | group_set = clear_group_from_set(group_set, grp); |
904 | } | |
905 | interfaces[ioif].used = 0; | |
906 | interfaces[ioif].owner = NULL; | |
907 | ||
908 | DBG(printk("GPIO pins: available before: g_in=0x%08x g_out=0x%08x pb=0x%02x\n", | |
909 | gpio_in_pins, gpio_out_pins, gpio_pb_pins)); | |
910 | DBG(printk("freeing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n", | |
911 | interfaces[ioif].gpio_g_in, | |
912 | interfaces[ioif].gpio_g_out, | |
913 | interfaces[ioif].gpio_b)); | |
914 | ||
915 | gpio_in_pins |= interfaces[ioif].gpio_g_in; | |
916 | gpio_out_pins |= interfaces[ioif].gpio_g_out; | |
917 | gpio_pb_pins |= interfaces[ioif].gpio_b; | |
918 | ||
919 | DBG(printk("GPIO pins: available after: g_in=0x%08x g_out=0x%08x pb=0x%02x\n", | |
920 | gpio_in_pins, gpio_out_pins, gpio_pb_pins)); | |
921 | ||
922 | local_irq_restore(flags); | |
923 | ||
924 | notify_watchers(); | |
925 | } | |
926 | ||
927 | /* Create a bitmask from bit 0 (inclusive) to bit stop_bit | |
928 | (non-inclusive). stop_bit == 0 returns 0x0 */ | |
929 | static inline unsigned int create_mask(const unsigned stop_bit) | |
930 | { | |
931 | /* Avoid overflow */ | |
932 | if (stop_bit >= 32) { | |
933 | return 0xffffffff; | |
934 | } | |
935 | return (1<<stop_bit)-1; | |
936 | } | |
937 | ||
938 | ||
939 | /* port can be 'a', 'b' or 'g' */ | |
940 | int cris_io_interface_allocate_pins(const enum cris_io_interface ioif, | |
941 | const char port, | |
942 | const unsigned start_bit, | |
943 | const unsigned stop_bit) | |
944 | { | |
945 | unsigned int i; | |
946 | unsigned int mask = 0; | |
947 | unsigned int tmp_mask; | |
948 | unsigned long int flags; | |
949 | enum cris_io_interface *owners; | |
950 | ||
951 | (void)cris_io_interface_init(); | |
952 | ||
953 | DBG(printk("cris_io_interface_allocate_pins: if=%d port=%c start=%u stop=%u\n", | |
954 | ioif, port, start_bit, stop_bit)); | |
955 | ||
956 | if (!((start_bit <= stop_bit) && | |
957 | ((((port == 'a') || (port == 'b')) && (stop_bit < 8)) || | |
958 | ((port == 'g') && (stop_bit < 32))))) { | |
959 | return -EINVAL; | |
960 | } | |
961 | ||
962 | mask = create_mask(stop_bit + 1); | |
963 | tmp_mask = create_mask(start_bit); | |
964 | mask &= ~tmp_mask; | |
965 | ||
966 | DBG(printk("cris_io_interface_allocate_pins: port=%c start=%u stop=%u mask=0x%08x\n", | |
967 | port, start_bit, stop_bit, mask)); | |
968 | ||
969 | local_irq_save(flags); | |
970 | ||
971 | switch (port) { | |
972 | case 'a': | |
973 | if ((gpio_pa_pins & mask) != mask) { | |
974 | local_irq_restore(flags); | |
975 | return -EBUSY; | |
976 | } | |
977 | owners = gpio_pa_owners; | |
978 | gpio_pa_pins &= ~mask; | |
979 | break; | |
980 | case 'b': | |
981 | if ((gpio_pb_pins & mask) != mask) { | |
982 | local_irq_restore(flags); | |
983 | return -EBUSY; | |
984 | } | |
985 | owners = gpio_pb_owners; | |
986 | gpio_pb_pins &= ~mask; | |
987 | break; | |
988 | case 'g': | |
989 | if (((gpio_in_pins & mask) != mask) || | |
990 | ((gpio_out_pins & mask) != mask)) { | |
991 | local_irq_restore(flags); | |
992 | return -EBUSY; | |
993 | } | |
994 | owners = gpio_pg_owners; | |
995 | gpio_in_pins &= ~mask; | |
996 | gpio_out_pins &= ~mask; | |
997 | break; | |
998 | default: | |
999 | local_irq_restore(flags); | |
1000 | return -EINVAL; | |
1001 | } | |
1002 | ||
1003 | for (i = start_bit; i <= stop_bit; i++) { | |
1004 | owners[i] = ioif; | |
1005 | } | |
1006 | local_irq_restore(flags); | |
1007 | ||
1008 | notify_watchers(); | |
1009 | return 0; | |
1010 | } | |
1011 | ||
1012 | ||
1013 | /* port can be 'a', 'b' or 'g' */ | |
1014 | int cris_io_interface_free_pins(const enum cris_io_interface ioif, | |
1015 | const char port, | |
1016 | const unsigned start_bit, | |
1017 | const unsigned stop_bit) | |
1018 | { | |
1019 | unsigned int i; | |
1020 | unsigned int mask = 0; | |
1021 | unsigned int tmp_mask; | |
1022 | unsigned long int flags; | |
1023 | enum cris_io_interface *owners; | |
1024 | ||
1025 | (void)cris_io_interface_init(); | |
1026 | ||
1027 | if (!((start_bit <= stop_bit) && | |
1028 | ((((port == 'a') || (port == 'b')) && (stop_bit < 8)) || | |
1029 | ((port == 'g') && (stop_bit < 32))))) { | |
1030 | return -EINVAL; | |
1031 | } | |
1032 | ||
1033 | mask = create_mask(stop_bit + 1); | |
1034 | tmp_mask = create_mask(start_bit); | |
1035 | mask &= ~tmp_mask; | |
1036 | ||
1037 | DBG(printk("cris_io_interface_free_pins: port=%c start=%u stop=%u mask=0x%08x\n", | |
1038 | port, start_bit, stop_bit, mask)); | |
1039 | ||
1040 | local_irq_save(flags); | |
1041 | ||
1042 | switch (port) { | |
1043 | case 'a': | |
1044 | if ((~gpio_pa_pins & mask) != mask) { | |
1045 | local_irq_restore(flags); | |
1046 | printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins"); | |
1047 | } | |
1048 | owners = gpio_pa_owners; | |
1049 | break; | |
1050 | case 'b': | |
1051 | if ((~gpio_pb_pins & mask) != mask) { | |
1052 | local_irq_restore(flags); | |
1053 | printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins"); | |
1054 | } | |
1055 | owners = gpio_pb_owners; | |
1056 | break; | |
1057 | case 'g': | |
1058 | if (((~gpio_in_pins & mask) != mask) || | |
1059 | ((~gpio_out_pins & mask) != mask)) { | |
1060 | local_irq_restore(flags); | |
1061 | printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins"); | |
1062 | } | |
1063 | owners = gpio_pg_owners; | |
1064 | break; | |
1065 | default: | |
1066 | owners = NULL; /* Cannot happen. Shut up, gcc! */ | |
1067 | } | |
1068 | ||
1069 | for (i = start_bit; i <= stop_bit; i++) { | |
1070 | if (owners[i] != ioif) { | |
1071 | printk(KERN_CRIT "cris_io_interface_free_pins: Freeing unowned pins"); | |
1072 | } | |
1073 | } | |
1074 | ||
1075 | /* All was ok, change data. */ | |
1076 | switch (port) { | |
1077 | case 'a': | |
1078 | gpio_pa_pins |= mask; | |
1079 | break; | |
1080 | case 'b': | |
1081 | gpio_pb_pins |= mask; | |
1082 | break; | |
1083 | case 'g': | |
1084 | gpio_in_pins |= mask; | |
1085 | gpio_out_pins |= mask; | |
1086 | break; | |
1087 | } | |
1088 | ||
1089 | for (i = start_bit; i <= stop_bit; i++) { | |
1090 | owners[i] = if_unclaimed; | |
1091 | } | |
1092 | local_irq_restore(flags); | |
1093 | notify_watchers(); | |
1094 | ||
1095 | return 0; | |
1096 | } | |
1097 | ||
1098 | ||
1099 | int cris_io_interface_register_watcher(void (*notify)(const unsigned int gpio_in_available, | |
1100 | const unsigned int gpio_out_available, | |
1101 | const unsigned char pa_available, | |
1102 | const unsigned char pb_available)) | |
1103 | { | |
1104 | struct watcher *w; | |
1105 | ||
1106 | (void)cris_io_interface_init(); | |
1107 | ||
1108 | if (NULL == notify) { | |
1109 | return -EINVAL; | |
1110 | } | |
1111 | w = kmalloc(sizeof(*w), GFP_KERNEL); | |
1112 | if (!w) { | |
1113 | return -ENOMEM; | |
1114 | } | |
1115 | w->notify = notify; | |
1116 | w->next = watchers; | |
1117 | watchers = w; | |
1118 | ||
1119 | w->notify((const unsigned int)gpio_in_pins, | |
1120 | (const unsigned int)gpio_out_pins, | |
1121 | (const unsigned char)gpio_pa_pins, | |
1122 | (const unsigned char)gpio_pb_pins); | |
1123 | ||
1124 | return 0; | |
1125 | } | |
1126 | ||
1127 | void cris_io_interface_delete_watcher(void (*notify)(const unsigned int gpio_in_available, | |
1128 | const unsigned int gpio_out_available, | |
1129 | const unsigned char pa_available, | |
1130 | const unsigned char pb_available)) | |
1131 | { | |
1132 | struct watcher *w = watchers, *prev = NULL; | |
1133 | ||
1134 | (void)cris_io_interface_init(); | |
1135 | ||
1136 | while ((NULL != w) && (w->notify != notify)){ | |
1137 | prev = w; | |
1138 | w = w->next; | |
1139 | } | |
1140 | if (NULL != w) { | |
1141 | if (NULL != prev) { | |
1142 | prev->next = w->next; | |
1143 | } else { | |
1144 | watchers = w->next; | |
1145 | } | |
1146 | kfree(w); | |
1147 | return; | |
1148 | } | |
1149 | printk(KERN_WARNING "cris_io_interface_delete_watcher: Deleting unknown watcher 0x%p\n", notify); | |
1150 | } | |
1151 | ||
1152 | ||
1153 | static int cris_io_interface_init(void) | |
1154 | { | |
1155 | static int first = 1; | |
1156 | int i; | |
1157 | ||
1158 | if (!first) { | |
1159 | return 0; | |
1160 | } | |
1161 | first = 0; | |
1162 | ||
1163 | for (i = 0; i<8; i++) { | |
1164 | gpio_pa_owners[i] = if_unclaimed; | |
1165 | gpio_pb_owners[i] = if_unclaimed; | |
1166 | gpio_pg_owners[i] = if_unclaimed; | |
1167 | } | |
1168 | for (; i<32; i++) { | |
1169 | gpio_pg_owners[i] = if_unclaimed; | |
1170 | } | |
1171 | return 0; | |
1172 | } | |
1173 | ||
1174 | ||
1175 | module_init(cris_io_interface_init); | |
1176 | ||
1177 | ||
1178 | EXPORT_SYMBOL(cris_request_io_interface); | |
1179 | EXPORT_SYMBOL(cris_free_io_interface); | |
1180 | EXPORT_SYMBOL(cris_io_interface_allocate_pins); | |
1181 | EXPORT_SYMBOL(cris_io_interface_free_pins); | |
1182 | EXPORT_SYMBOL(cris_io_interface_register_watcher); | |
1183 | EXPORT_SYMBOL(cris_io_interface_delete_watcher); |