[mirror_ubuntu-hirsute-kernel.git] / arch / cris / arch-v32 / kernel / ptrace.c

/*
 * Copyright (C) 2000-2003, Axis Communications AB.
 */

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/user.h>
#include <linux/signal.h>
#include <linux/security.h>

#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/processor.h>
#include <asm/arch/hwregs/supp_reg.h>

/*
 * Determines which bits in CCS the user has access to.
 * 1 = access, 0 = no access.
 */
#define CCS_MASK 0x00087c00     /* SXNZVC */

#define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))

static int put_debugreg(long pid, unsigned int regno, long data);
static long get_debugreg(long pid, unsigned int regno);
static unsigned long get_pseudo_pc(struct task_struct *child);
void deconfigure_bp(long pid);

extern unsigned long cris_signal_return_page;

/*
 * Get contents of register REGNO in task TASK.
 */
long get_reg(struct task_struct *task, unsigned int regno)
{
	/* USP is a special case, it's not in the pt_regs struct but
	 * in the tasks thread struct
	 */
	unsigned long ret;

	if (regno <= PT_EDA)
		ret = ((unsigned long *)user_regs(task->thread_info))[regno];
	else if (regno == PT_USP)
		ret = task->thread.usp;
	else if (regno == PT_PPC)
		ret = get_pseudo_pc(task);
	else if (regno <= PT_MAX)
		ret = get_debugreg(task->pid, regno);
	else
		ret = 0;

	return ret;
}

/*
 * Write contents of register REGNO in task TASK.
 */
int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
{
	if (regno <= PT_EDA)
		((unsigned long *)user_regs(task->thread_info))[regno] = data;
	else if (regno == PT_USP)
		task->thread.usp = data;
	else if (regno == PT_PPC) {
		/* Write pseudo-PC to ERP only if changed. */
		if (data != get_pseudo_pc(task))
			((unsigned long *)user_regs(task->thread_info))[PT_ERP] = data;
	} else if (regno <= PT_MAX)
		return put_debugreg(task->pid, regno, data);
	else
		return -1;
	return 0;
}

/*
 * Called by kernel/ptrace.c when detaching.
 *
 * Make sure the single step bit is not set.
 */
void
ptrace_disable(struct task_struct *child)
{
	unsigned long tmp;

	/* Deconfigure SPC and S-bit. */
	tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
	put_reg(child, PT_CCS, tmp);
	put_reg(child, PT_SPC, 0);

	/* Deconfigure any watchpoints associated with the child. */
	deconfigure_bp(child->pid);
}


long arch_ptrace(struct task_struct *child, long request, long addr, long data)
{
	int ret;
	unsigned long __user *datap = (unsigned long __user *)data;

	switch (request) {
		/* Read word at location address. */
		case PTRACE_PEEKTEXT:
		case PTRACE_PEEKDATA: {
			unsigned long tmp;
			int copied;

			ret = -EIO;

			/* The signal trampoline page is outside the normal user-addressable
			 * space but still accessible. This is hack to make it possible to
			 * access the signal handler code in GDB.
			 */
			if ((addr & PAGE_MASK) == cris_signal_return_page) {
				/* The trampoline page is globally mapped, no page table to traverse.*/
				tmp = *(unsigned long*)addr;
			} else {
				copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);

				if (copied != sizeof(tmp))
					break;
			}

			ret = put_user(tmp,datap);
			break;
		}

		/* Read the word at location address in the USER area. */
		case PTRACE_PEEKUSR: {
			unsigned long tmp;

			ret = -EIO;
			if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
				break;

			tmp = get_reg(child, addr >> 2);
			ret = put_user(tmp, datap);
			break;
		}

		/* Write the word at location address. */
		case PTRACE_POKETEXT:
		case PTRACE_POKEDATA:
			ret = 0;

			if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
				break;

			ret = -EIO;
			break;

 		/* Write the word at location address in the USER area. */
		case PTRACE_POKEUSR:
			ret = -EIO;
			if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
				break;

			addr >>= 2;

			if (addr == PT_CCS) {
				/* don't allow the tracing process to change stuff like
				 * interrupt enable, kernel/user bit, dma enables etc.
				 */
				data &= CCS_MASK;
				data |= get_reg(child, PT_CCS) & ~CCS_MASK;
			}
			if (put_reg(child, addr, data))
				break;
			ret = 0;
			break;

		case PTRACE_SYSCALL:
		case PTRACE_CONT:
			ret = -EIO;

			if (!valid_signal(data))
				break;

			/* Continue means no single-step. */
			put_reg(child, PT_SPC, 0);

			if (!get_debugreg(child->pid, PT_BP_CTRL)) {
				unsigned long tmp;
				/* If no h/w bp configured, disable S bit. */
				tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
				put_reg(child, PT_CCS, tmp);
			}

			if (request == PTRACE_SYSCALL) {
				set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
			}
			else {
				clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
			}

			child->exit_code = data;

			/* TODO: make sure any pending breakpoint is killed */
			wake_up_process(child);
			ret = 0;

			break;

 		/* Make the child exit by sending it a sigkill. */
		case PTRACE_KILL:
			ret = 0;

			if (child->exit_state == EXIT_ZOMBIE)
				break;

			child->exit_code = SIGKILL;

			/* Deconfigure single-step and h/w bp. */
			ptrace_disable(child);

			/* TODO: make sure any pending breakpoint is killed */
			wake_up_process(child);
			break;

		/* Set the trap flag. */
		case PTRACE_SINGLESTEP:	{
			unsigned long tmp;
			ret = -EIO;

			/* Set up SPC if not set already (in which case we have
			   no other choice but to trust it). */
			if (!get_reg(child, PT_SPC)) {
				/* In case we're stopped in a delay slot. */
				tmp = get_reg(child, PT_ERP) & ~1;
				put_reg(child, PT_SPC, tmp);
			}
			tmp = get_reg(child, PT_CCS) | SBIT_USER;
			put_reg(child, PT_CCS, tmp);

			if (!valid_signal(data))
				break;

			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);

			/* TODO: set some clever breakpoint mechanism... */

			child->exit_code = data;
			wake_up_process(child);
			ret = 0;
			break;

		}
		case PTRACE_DETACH:
			ret = ptrace_detach(child, data);
			break;

		/* Get all GP registers from the child. */
		case PTRACE_GETREGS: {
		  	int i;
			unsigned long tmp;

			for (i = 0; i <= PT_MAX; i++) {
				tmp = get_reg(child, i);

				if (put_user(tmp, datap)) {
					ret = -EFAULT;
					goto out_tsk;
				}

				datap++;
			}

			ret = 0;
			break;
		}

		/* Set all GP registers in the child. */
		case PTRACE_SETREGS: {
			int i;
			unsigned long tmp;

			for (i = 0; i <= PT_MAX; i++) {
				if (get_user(tmp, datap)) {
					ret = -EFAULT;
					goto out_tsk;
				}

				if (i == PT_CCS) {
					tmp &= CCS_MASK;
					tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
				}

				put_reg(child, i, tmp);
				datap++;
			}

			ret = 0;
			break;
		}

		default:
			ret = ptrace_request(child, request, addr, data);
			break;
	}

	return ret;
}

void do_syscall_trace(void)
{
	if (!test_thread_flag(TIF_SYSCALL_TRACE))
		return;

	if (!(current->ptrace & PT_PTRACED))
		return;

	/* the 0x80 provides a way for the tracing parent to distinguish
	   between a syscall stop and SIGTRAP delivery */
	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
				 ? 0x80 : 0));

	/*
	 * This isn't the same as continuing with a signal, but it will do for
	 * normal use.
	 */
	if (current->exit_code) {
		send_sig(current->exit_code, current, 1);
		current->exit_code = 0;
	}
}

/* Returns the size of an instruction that has a delay slot. */

static int insn_size(struct task_struct *child, unsigned long pc)
{
  unsigned long opcode;
  int copied;
  int opsize = 0;

  /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
  copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
  if (copied != sizeof(opcode))
    return 0;

  switch ((opcode & 0x0f00) >> 8) {
  case 0x0:
  case 0x9:
  case 0xb:
	  opsize = 2;
	  break;
  case 0xe:
  case 0xf:
	  opsize = 6;
	  break;
  case 0xd:
	  /* Could be 4 or 6; check more bits. */
	  if ((opcode & 0xff) == 0xff)
		  opsize = 4;
	  else
		  opsize = 6;
	  break;
  default:
	  panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
		opcode, pc);
  }

  return opsize;
}

static unsigned long get_pseudo_pc(struct task_struct *child)
{
	/* Default value for PC is ERP. */
	unsigned long pc = get_reg(child, PT_ERP);

	if (pc & 0x1) {
		unsigned long spc = get_reg(child, PT_SPC);
		/* Delay slot bit set. Report as stopped on proper
		   instruction. */
		if (spc) {
			/* Rely on SPC if set. FIXME: We might want to check
			   that EXS indicates we stopped due to a single-step
			   exception. */
			pc = spc;
		} else {
			/* Calculate the PC from the size of the instruction
			   that the delay slot we're in belongs to. */
			pc += insn_size(child, pc & ~1) - 1;
		}
	}
	return pc;
}

static long bp_owner = 0;

/* Reachable from exit_thread in signal.c, so not static. */
void deconfigure_bp(long pid)
{
	int bp;

	/* Only deconfigure if the pid is the owner. */
	if (bp_owner != pid)
		return;

	for (bp = 0; bp < 6; bp++) {
		unsigned long tmp;
		/* Deconfigure start and end address (also gets rid of ownership). */
		put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
		put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);

		/* Deconfigure relevant bits in control register. */
		tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
		put_debugreg(pid, PT_BP_CTRL, tmp);
	}
	/* No owner now. */
	bp_owner = 0;
}

static int put_debugreg(long pid, unsigned int regno, long data)
{
	int ret = 0;
	register int old_srs;

#ifdef CONFIG_ETRAX_KGDB
	/* Ignore write, but pretend it was ok if value is 0
	   (we don't want POKEUSR/SETREGS failing unnessecarily). */
	return (data == 0) ? ret : -1;
#endif

	/* Simple owner management. */
	if (!bp_owner)
		bp_owner = pid;
	else if (bp_owner != pid) {
		/* Ignore write, but pretend it was ok if value is 0
		   (we don't want POKEUSR/SETREGS failing unnessecarily). */
		return (data == 0) ? ret : -1;
	}

	/* Remember old SRS. */
	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
	/* Switch to BP bank. */
	SUPP_BANK_SEL(BANK_BP);

	switch (regno - PT_BP) {
	case 0:
		SUPP_REG_WR(0, data); break;
	case 1:
	case 2:
		if (data)
			ret = -1;
		break;
	case 3:
		SUPP_REG_WR(3, data); break;
	case 4:
		SUPP_REG_WR(4, data); break;
	case 5:
		SUPP_REG_WR(5, data); break;
	case 6:
		SUPP_REG_WR(6, data); break;
	case 7:
		SUPP_REG_WR(7, data); break;
	case 8:
		SUPP_REG_WR(8, data); break;
	case 9:
		SUPP_REG_WR(9, data); break;
	case 10:
		SUPP_REG_WR(10, data); break;
	case 11:
		SUPP_REG_WR(11, data); break;
	case 12:
		SUPP_REG_WR(12, data); break;
	case 13:
		SUPP_REG_WR(13, data); break;
	case 14:
		SUPP_REG_WR(14, data); break;
	default:
		ret = -1;
		break;
	}

	/* Restore SRS. */
	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
	/* Just for show. */
	NOP();
	NOP();
	NOP();

	return ret;
}

static long get_debugreg(long pid, unsigned int regno)
{
	register int old_srs;
	register long data;

	if (pid != bp_owner) {
		return 0;
	}

	/* Remember old SRS. */
	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
	/* Switch to BP bank. */
	SUPP_BANK_SEL(BANK_BP);

	switch (regno - PT_BP) {
	case 0:
		SUPP_REG_RD(0, data); break;
	case 1:
	case 2:
		/* error return value? */
		data = 0;
		break;
	case 3:
		SUPP_REG_RD(3, data); break;
	case 4:
		SUPP_REG_RD(4, data); break;
	case 5:
		SUPP_REG_RD(5, data); break;
	case 6:
		SUPP_REG_RD(6, data); break;
	case 7:
		SUPP_REG_RD(7, data); break;
	case 8:
		SUPP_REG_RD(8, data); break;
	case 9:
		SUPP_REG_RD(9, data); break;
	case 10:
		SUPP_REG_RD(10, data); break;
	case 11:
		SUPP_REG_RD(11, data); break;
	case 12:
		SUPP_REG_RD(12, data); break;
	case 13:
		SUPP_REG_RD(13, data); break;
	case 14:
		SUPP_REG_RD(14, data); break;
	default:
		/* error return value? */
		data = 0;
	}

	/* Restore SRS. */
	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
	/* Just for show. */
	NOP();
	NOP();
	NOP();

	return data;
}
Commit	Line	Data
51533b61 MS	1	/*
	2	* Copyright (C) 2000-2003, Axis Communications AB.
	3	*/
	4
	5	#include <linux/kernel.h>
	6	#include <linux/sched.h>
	7	#include <linux/mm.h>
	8	#include <linux/smp.h>
	9	#include <linux/smp_lock.h>
	10	#include <linux/errno.h>
	11	#include <linux/ptrace.h>
	12	#include <linux/user.h>
	13	#include <linux/signal.h>
	14	#include <linux/security.h>
	15
	16	#include <asm/uaccess.h>
	17	#include <asm/page.h>
	18	#include <asm/pgtable.h>
	19	#include <asm/system.h>
	20	#include <asm/processor.h>
	21	#include <asm/arch/hwregs/supp_reg.h>
	22
	23	/*
	24	* Determines which bits in CCS the user has access to.
	25	* 1 = access, 0 = no access.
	26	*/
	27	#define CCS_MASK 0x00087c00 /* SXNZVC */
	28
	29	#define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
	30
	31	static int put_debugreg(long pid, unsigned int regno, long data);
	32	static long get_debugreg(long pid, unsigned int regno);
	33	static unsigned long get_pseudo_pc(struct task_struct *child);
	34	void deconfigure_bp(long pid);
	35
	36	extern unsigned long cris_signal_return_page;
	37
	38	/*
	39	* Get contents of register REGNO in task TASK.
	40	*/
	41	long get_reg(struct task_struct *task, unsigned int regno)
	42	{
	43	/* USP is a special case, it's not in the pt_regs struct but
	44	* in the tasks thread struct
	45	*/
	46	unsigned long ret;
	47
	48	if (regno <= PT_EDA)
	49	ret = ((unsigned long *)user_regs(task->thread_info))[regno];
	50	else if (regno == PT_USP)
	51	ret = task->thread.usp;
	52	else if (regno == PT_PPC)
	53	ret = get_pseudo_pc(task);
	54	else if (regno <= PT_MAX)
	55	ret = get_debugreg(task->pid, regno);
	56	else
	57	ret = 0;
	58
	59	return ret;
	60	}
	61
	62	/*
	63	* Write contents of register REGNO in task TASK.
	64	*/
65	int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
66	{
67	if (regno <= PT_EDA)
68	((unsigned long *)user_regs(task->thread_info))[regno] = data;
69	else if (regno == PT_USP)
70	task->thread.usp = data;
71	else if (regno == PT_PPC) {
72	/* Write pseudo-PC to ERP only if changed. */
73	if (data != get_pseudo_pc(task))
74	((unsigned long *)user_regs(task->thread_info))[PT_ERP] = data;
75	} else if (regno <= PT_MAX)
76	return put_debugreg(task->pid, regno, data);
77	else
78	return -1;
79	return 0;
80	}
81
82	/*
83	* Called by kernel/ptrace.c when detaching.
84	*
85	* Make sure the single step bit is not set.
86	*/
87	void
88	ptrace_disable(struct task_struct *child)
89	{
90	unsigned long tmp;
91
92	/* Deconfigure SPC and S-bit. */
93	tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
94	put_reg(child, PT_CCS, tmp);
95	put_reg(child, PT_SPC, 0);
96
97	/* Deconfigure any watchpoints associated with the child. */
98	deconfigure_bp(child->pid);
99	}
100
101
481bed45	102	long arch_ptrace(struct task_struct *child, long request, long addr, long data)
51533b61	103	{
51533b61 MS	104	int ret;
	105	unsigned long __user datap = (unsigned long __user )data;
	106
51533b61 MS	107	switch (request) {
	108	/* Read word at location address. */
	109	case PTRACE_PEEKTEXT:
	110	case PTRACE_PEEKDATA: {
	111	unsigned long tmp;
	112	int copied;
	113
	114	ret = -EIO;
	115
	116	/* The signal trampoline page is outside the normal user-addressable
	117	* space but still accessible. This is hack to make it possible to
	118	* access the signal handler code in GDB.
	119	*/
	120	if ((addr & PAGE_MASK) == cris_signal_return_page) {
	121	/* The trampoline page is globally mapped, no page table to traverse.*/
	122	tmp = (unsigned long)addr;
	123	} else {
	124	copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
	125
	126	if (copied != sizeof(tmp))
	127	break;
	128	}
	129
	130	ret = put_user(tmp,datap);
	131	break;
	132	}
	133
	134	/* Read the word at location address in the USER area. */
	135	case PTRACE_PEEKUSR: {
	136	unsigned long tmp;
	137
	138	ret = -EIO;
	139	if ((addr & 3) \|\| addr < 0 \|\| addr > PT_MAX << 2)
	140	break;
	141
	142	tmp = get_reg(child, addr >> 2);
	143	ret = put_user(tmp, datap);
	144	break;
	145	}
	146
	147	/* Write the word at location address. */
	148	case PTRACE_POKETEXT:
	149	case PTRACE_POKEDATA:
	150	ret = 0;
	151
	152	if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
	153	break;
	154
	155	ret = -EIO;
	156	break;
	157
	158	/* Write the word at location address in the USER area. */
	159	case PTRACE_POKEUSR:
	160	ret = -EIO;
	161	if ((addr & 3) \|\| addr < 0 \|\| addr > PT_MAX << 2)
	162	break;
	163
	164	addr >>= 2;
	165
	166	if (addr == PT_CCS) {
	167	/* don't allow the tracing process to change stuff like
	168	* interrupt enable, kernel/user bit, dma enables etc.
	169	*/
	170	data &= CCS_MASK;
171	data \|= get_reg(child, PT_CCS) & ~CCS_MASK;
172	}
173	if (put_reg(child, addr, data))
174	break;
175	ret = 0;
176	break;
177
178	case PTRACE_SYSCALL:
179	case PTRACE_CONT:
180	ret = -EIO;
181
182	if (!valid_signal(data))
183	break;
184
185	/* Continue means no single-step. */
186	put_reg(child, PT_SPC, 0);
187
188	if (!get_debugreg(child->pid, PT_BP_CTRL)) {
189	unsigned long tmp;
190	/* If no h/w bp configured, disable S bit. */
191	tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
192	put_reg(child, PT_CCS, tmp);
193	}
194
195	if (request == PTRACE_SYSCALL) {
196	set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
197	}
198	else {
199	clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
200	}
201
202	child->exit_code = data;
203
204	/* TODO: make sure any pending breakpoint is killed */
205	wake_up_process(child);
206	ret = 0;
207
208	break;
209
210	/* Make the child exit by sending it a sigkill. */
211	case PTRACE_KILL:
212	ret = 0;
213
214	if (child->exit_state == EXIT_ZOMBIE)
215	break;
216
217	child->exit_code = SIGKILL;
218
219	/* Deconfigure single-step and h/w bp. */
220	ptrace_disable(child);
221
222	/* TODO: make sure any pending breakpoint is killed */
223	wake_up_process(child);
224	break;
225
226	/* Set the trap flag. */
227	case PTRACE_SINGLESTEP: {
228	unsigned long tmp;
229	ret = -EIO;
230
231	/* Set up SPC if not set already (in which case we have
232	no other choice but to trust it). */
233	if (!get_reg(child, PT_SPC)) {
234	/* In case we're stopped in a delay slot. */
235	tmp = get_reg(child, PT_ERP) & ~1;
236	put_reg(child, PT_SPC, tmp);
237	}
238	tmp = get_reg(child, PT_CCS) \| SBIT_USER;
239	put_reg(child, PT_CCS, tmp);
240
241	if (!valid_signal(data))
242	break;
243
244	clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
245
246	/* TODO: set some clever breakpoint mechanism... */
247
248	child->exit_code = data;
249	wake_up_process(child);
250	ret = 0;
251	break;
252
253	}
254	case PTRACE_DETACH:
255	ret = ptrace_detach(child, data);
256	break;
257
258	/* Get all GP registers from the child. */
259	case PTRACE_GETREGS: {
260	int i;
261	unsigned long tmp;
262
263	for (i = 0; i <= PT_MAX; i++) {
264	tmp = get_reg(child, i);
265
266	if (put_user(tmp, datap)) {
267	ret = -EFAULT;
268	goto out_tsk;
269	}
270
271	datap++;
272	}
273
274	ret = 0;
275	break;
276	}
277
278	/* Set all GP registers in the child. */
279	case PTRACE_SETREGS: {
280	int i;
281	unsigned long tmp;
282
283	for (i = 0; i <= PT_MAX; i++) {
284	if (get_user(tmp, datap)) {
285	ret = -EFAULT;
286	goto out_tsk;
287	}
288
289	if (i == PT_CCS) {
290	tmp &= CCS_MASK;
291	tmp \|= get_reg(child, PT_CCS) & ~CCS_MASK;
292	}
293
294	put_reg(child, i, tmp);
295	datap++;
296	}
297
298	ret = 0;
299	break;
300	}
301
302	default:
303	ret = ptrace_request(child, request, addr, data);
304	break;
305	}
481bed45	306
51533b61 MS	307	return ret;
	308	}
	309
	310	void do_syscall_trace(void)
	311	{
	312	if (!test_thread_flag(TIF_SYSCALL_TRACE))
	313	return;
	314
	315	if (!(current->ptrace & PT_PTRACED))
	316	return;
	317
	318	/* the 0x80 provides a way for the tracing parent to distinguish
	319	between a syscall stop and SIGTRAP delivery */
	320	ptrace_notify(SIGTRAP \| ((current->ptrace & PT_TRACESYSGOOD)
	321	? 0x80 : 0));
	322
	323	/*
	324	* This isn't the same as continuing with a signal, but it will do for
	325	* normal use.
	326	*/
	327	if (current->exit_code) {
	328	send_sig(current->exit_code, current, 1);
	329	current->exit_code = 0;
	330	}
	331	}
	332
	333	/* Returns the size of an instruction that has a delay slot. */
	334
	335	static int insn_size(struct task_struct *child, unsigned long pc)
	336	{
	337	unsigned long opcode;
	338	int copied;
	339	int opsize = 0;
	340
	341	/* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
	342	copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
	343	if (copied != sizeof(opcode))
	344	return 0;
	345
	346	switch ((opcode & 0x0f00) >> 8) {
	347	case 0x0:
	348	case 0x9:
	349	case 0xb:
	350	opsize = 2;
	351	break;
	352	case 0xe:
	353	case 0xf:
	354	opsize = 6;
	355	break;
	356	case 0xd:
	357	/* Could be 4 or 6; check more bits. */
	358	if ((opcode & 0xff) == 0xff)
	359	opsize = 4;
	360	else
	361	opsize = 6;
	362	break;
	363	default:
	364	panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
	365	opcode, pc);
	366	}
	367
	368	return opsize;
	369	}
	370
371	static unsigned long get_pseudo_pc(struct task_struct *child)
372	{
373	/* Default value for PC is ERP. */
374	unsigned long pc = get_reg(child, PT_ERP);
375
376	if (pc & 0x1) {
377	unsigned long spc = get_reg(child, PT_SPC);
378	/* Delay slot bit set. Report as stopped on proper
379	instruction. */
380	if (spc) {
381	/* Rely on SPC if set. FIXME: We might want to check
382	that EXS indicates we stopped due to a single-step
383	exception. */
384	pc = spc;
385	} else {
386	/* Calculate the PC from the size of the instruction
387	that the delay slot we're in belongs to. */
388	pc += insn_size(child, pc & ~1) - 1;
389	}
390	}
391	return pc;
392	}
393
394	static long bp_owner = 0;
395
396	/* Reachable from exit_thread in signal.c, so not static. */
397	void deconfigure_bp(long pid)
398	{
399	int bp;
400
401	/* Only deconfigure if the pid is the owner. */
402	if (bp_owner != pid)
403	return;
404
405	for (bp = 0; bp < 6; bp++) {
406	unsigned long tmp;
407	/* Deconfigure start and end address (also gets rid of ownership). */
408	put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
409	put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
410
411	/* Deconfigure relevant bits in control register. */
412	tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
413	put_debugreg(pid, PT_BP_CTRL, tmp);
414	}
415	/* No owner now. */
416	bp_owner = 0;
417	}
418
419	static int put_debugreg(long pid, unsigned int regno, long data)
420	{
421	int ret = 0;
422	register int old_srs;
423
424	#ifdef CONFIG_ETRAX_KGDB
425	/* Ignore write, but pretend it was ok if value is 0
426	(we don't want POKEUSR/SETREGS failing unnessecarily). */
427	return (data == 0) ? ret : -1;
428	#endif
429
430	/* Simple owner management. */
431	if (!bp_owner)
432	bp_owner = pid;
433	else if (bp_owner != pid) {
434	/* Ignore write, but pretend it was ok if value is 0
435	(we don't want POKEUSR/SETREGS failing unnessecarily). */
436	return (data == 0) ? ret : -1;
437	}
438
439	/* Remember old SRS. */
440	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
441	/* Switch to BP bank. */
442	SUPP_BANK_SEL(BANK_BP);
443
444	switch (regno - PT_BP) {
445	case 0:
446	SUPP_REG_WR(0, data); break;
447	case 1:
448	case 2:
449	if (data)
450	ret = -1;
451	break;
452	case 3:
453	SUPP_REG_WR(3, data); break;
454	case 4:
455	SUPP_REG_WR(4, data); break;
456	case 5:
457	SUPP_REG_WR(5, data); break;
458	case 6:
459	SUPP_REG_WR(6, data); break;
460	case 7:
461	SUPP_REG_WR(7, data); break;
462	case 8:
463	SUPP_REG_WR(8, data); break;
464	case 9:
465	SUPP_REG_WR(9, data); break;
466	case 10:
467	SUPP_REG_WR(10, data); break;
468	case 11:
469	SUPP_REG_WR(11, data); break;
470	case 12:
471	SUPP_REG_WR(12, data); break;
472	case 13:
473	SUPP_REG_WR(13, data); break;
474	case 14:
475	SUPP_REG_WR(14, data); break;
476	default:
477	ret = -1;
478	break;
479	}
480
481	/* Restore SRS. */
482	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
483	/* Just for show. */
484	NOP();
485	NOP();
486	NOP();
487
488	return ret;
489	}
490
491	static long get_debugreg(long pid, unsigned int regno)
492	{
493	register int old_srs;
494	register long data;
495
496	if (pid != bp_owner) {
497	return 0;
498	}
499
500	/* Remember old SRS. */
501	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
502	/* Switch to BP bank. */
503	SUPP_BANK_SEL(BANK_BP);
504
505	switch (regno - PT_BP) {
506	case 0:
507	SUPP_REG_RD(0, data); break;
508	case 1:
509	case 2:
510	/* error return value? */
511	data = 0;
512	break;
513	case 3:
514	SUPP_REG_RD(3, data); break;
515	case 4:
516	SUPP_REG_RD(4, data); break;
517	case 5:
518	SUPP_REG_RD(5, data); break;
519	case 6:
520	SUPP_REG_RD(6, data); break;
521	case 7:
522	SUPP_REG_RD(7, data); break;
523	case 8:
524	SUPP_REG_RD(8, data); break;
525	case 9:
526	SUPP_REG_RD(9, data); break;
527	case 10:
528	SUPP_REG_RD(10, data); break;
529	case 11:
530	SUPP_REG_RD(11, data); break;
531	case 12:
532	SUPP_REG_RD(12, data); break;
533	case 13:
534	SUPP_REG_RD(13, data); break;
535	case 14:
536	SUPP_REG_RD(14, data); break;
537	default:
538	/* error return value? */
539	data = 0;
540	}
541
542	/* Restore SRS. */
543	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
544	/* Just for show. */
545	NOP();
546	NOP();
547	NOP();
548
549	return data;
550	}