projects / mirror_ubuntu-focal-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 51533b61 MS |
2 | #ifndef __strcop_defs_asm_h |
| 3 | #define __strcop_defs_asm_h | |
| 4 | ||
| 5 | /* | |
| 6 | * This file is autogenerated from | |
| 7 | * file: ../../inst/strcop/rtl/strcop_regs.r | |
| 8 | * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp | |
| 9 | * last modfied: Mon Apr 11 16:09:38 2005 | |
| 10 | * | |
| 11 | * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/strcop_defs_asm.h ../../inst/strcop/rtl/strcop_regs.r | |
| 12 | * id: $Id: strcop_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $ | |
| 13 | * Any changes here will be lost. | |
| 14 | * | |
| 15 | * -*- buffer-read-only: t -*- | |
| 16 | */ | |
| 17 | ||
| 18 | #ifndef REG_FIELD | |
| 19 | #define REG_FIELD( scope, reg, field, value ) \ | |
| 20 | REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb ) | |
| 21 | #define REG_FIELD_X_( value, shift ) ((value) << shift) | |
| 22 | #endif | |
| 23 | ||
| 24 | #ifndef REG_STATE | |
| 25 | #define REG_STATE( scope, reg, field, symbolic_value ) \ | |
| 26 | REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb ) | |
| 27 | #define REG_STATE_X_( k, shift ) (k << shift) | |
| 28 | #endif | |
| 29 | ||
| 30 | #ifndef REG_MASK | |
| 31 | #define REG_MASK( scope, reg, field ) \ | |
| 32 | REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb ) | |
| 33 | #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb) | |
| 34 | #endif | |
| 35 | ||
| 36 | #ifndef REG_LSB | |
| 37 | #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb | |
| 38 | #endif | |
| 39 | ||
| 40 | #ifndef REG_BIT | |
| 41 | #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit | |
| 42 | #endif | |
| 43 | ||
| 44 | #ifndef REG_ADDR | |
| 45 | #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) | |
| 46 | #define REG_ADDR_X_( inst, offs ) ((inst) + offs) | |
| 47 | #endif | |
| 48 | ||
| 49 | #ifndef REG_ADDR_VECT | |
| 50 | #define REG_ADDR_VECT( scope, inst, reg, index ) \ | |
| 51 | REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \ | |
| 52 | STRIDE_##scope##_##reg ) | |
| 53 | #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ | |
| 54 | ((inst) + offs + (index) * stride) | |
| 55 | #endif | |
| 56 | ||
| 57 | /* Register rw_cfg, scope strcop, type rw */ | |
| 58 | #define reg_strcop_rw_cfg___td3___lsb 0 | |
| 59 | #define reg_strcop_rw_cfg___td3___width 1 | |
| 60 | #define reg_strcop_rw_cfg___td3___bit 0 | |
| 61 | #define reg_strcop_rw_cfg___td2___lsb 1 | |
| 62 | #define reg_strcop_rw_cfg___td2___width 1 | |
| 63 | #define reg_strcop_rw_cfg___td2___bit 1 | |
| 64 | #define reg_strcop_rw_cfg___td1___lsb 2 | |
| 65 | #define reg_strcop_rw_cfg___td1___width 1 | |
| 66 | #define reg_strcop_rw_cfg___td1___bit 2 | |
| 67 | #define reg_strcop_rw_cfg___ipend___lsb 3 | |
| 68 | #define reg_strcop_rw_cfg___ipend___width 1 | |
| 69 | #define reg_strcop_rw_cfg___ipend___bit 3 | |
| 70 | #define reg_strcop_rw_cfg___ignore_sync___lsb 4 | |
| 71 | #define reg_strcop_rw_cfg___ignore_sync___width 1 | |
| 72 | #define reg_strcop_rw_cfg___ignore_sync___bit 4 | |
| 73 | #define reg_strcop_rw_cfg___en___lsb 5 | |
| 74 | #define reg_strcop_rw_cfg___en___width 1 | |
| 75 | #define reg_strcop_rw_cfg___en___bit 5 | |
| 76 | #define reg_strcop_rw_cfg_offset 0 | |
| 77 | ||
| 78 | ||
| 79 | /* Constants */ | |
| 80 | #define regk_strcop_big 0x00000001 | |
| 81 | #define regk_strcop_d 0x00000001 | |
| 82 | #define regk_strcop_e 0x00000000 | |
| 83 | #define regk_strcop_little 0x00000000 | |
| 84 | #define regk_strcop_rw_cfg_default 0x00000002 | |
| 85 | #endif /* __strcop_defs_asm_h */ |