[mirror_ubuntu-focal-kernel.git] / arch / cris / include / arch-v32 / arch / hwregs / iop / iop_dmc_in_defs.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __iop_dmc_in_defs_h
#define __iop_dmc_in_defs_h

/*
 * This file is autogenerated from
 *   file:           ../../inst/io_proc/rtl/iop_dmc_in.r
 *     id:           iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
 *     last modfied: Mon Apr 11 16:08:45 2005
 *
 *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_in_defs.h ../../inst/io_proc/rtl/iop_dmc_in.r
 *      id: $Id: iop_dmc_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
 * Any changes here will be lost.
 *
 * -*- buffer-read-only: t -*-
 */
/* Main access macros */
#ifndef REG_RD
#define REG_RD( scope, inst, reg ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR
#define REG_WR( scope, inst, reg, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_VECT
#define REG_RD_VECT( scope, inst, reg, index ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_VECT
#define REG_WR_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT
#define REG_RD_INT( scope, inst, reg ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR_INT
#define REG_WR_INT( scope, inst, reg, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT_VECT
#define REG_RD_INT_VECT( scope, inst, reg, index ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_INT_VECT
#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_TYPE_CONV
#define REG_TYPE_CONV( type, orgtype, val ) \
  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
#endif

#ifndef reg_page_size
#define reg_page_size 8192
#endif

#ifndef REG_ADDR
#define REG_ADDR( scope, inst, reg ) \
  ( (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_ADDR_VECT
#define REG_ADDR_VECT( scope, inst, reg, index ) \
  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
    (index) * STRIDE_##scope##_##reg )
#endif

/* C-code for register scope iop_dmc_in */

/* Register rw_cfg, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int sth_intr     : 3;
  unsigned int last_dis_dif : 1;
  unsigned int dummy1       : 28;
} reg_iop_dmc_in_rw_cfg;
#define REG_RD_ADDR_iop_dmc_in_rw_cfg 0
#define REG_WR_ADDR_iop_dmc_in_rw_cfg 0

/* Register rw_ctrl, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dif_en     : 1;
  unsigned int dif_dis    : 1;
  unsigned int stream_clr : 1;
  unsigned int dummy1     : 29;
} reg_iop_dmc_in_rw_ctrl;
#define REG_RD_ADDR_iop_dmc_in_rw_ctrl 4
#define REG_WR_ADDR_iop_dmc_in_rw_ctrl 4

/* Register r_stat, scope iop_dmc_in, type r */
typedef struct {
  unsigned int dif_en : 1;
  unsigned int dummy1 : 31;
} reg_iop_dmc_in_r_stat;
#define REG_RD_ADDR_iop_dmc_in_r_stat 8

/* Register rw_stream_cmd, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int cmd : 10;
  unsigned int dummy1 : 6;
  unsigned int n   : 8;
  unsigned int dummy2 : 8;
} reg_iop_dmc_in_rw_stream_cmd;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_cmd 12
#define REG_WR_ADDR_iop_dmc_in_rw_stream_cmd 12

/* Register rw_stream_wr_data, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data 16
#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data 16

/* Register rw_stream_wr_data_last, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data_last;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data_last 20
#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data_last 20

/* Register rw_stream_ctrl, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int eop     : 1;
  unsigned int wait    : 1;
  unsigned int keep_md : 1;
  unsigned int size    : 3;
  unsigned int dummy1  : 26;
} reg_iop_dmc_in_rw_stream_ctrl;
#define REG_RD_ADDR_iop_dmc_in_rw_stream_ctrl 24
#define REG_WR_ADDR_iop_dmc_in_rw_stream_ctrl 24

/* Register r_stream_stat, scope iop_dmc_in, type r */
typedef struct {
  unsigned int sth            : 7;
  unsigned int dummy1         : 9;
  unsigned int full           : 1;
  unsigned int last_pkt       : 1;
  unsigned int data_md_valid  : 1;
  unsigned int ctxt_md_valid  : 1;
  unsigned int group_md_valid : 1;
  unsigned int stream_busy    : 1;
  unsigned int cmd_rdy        : 1;
  unsigned int dummy2         : 9;
} reg_iop_dmc_in_r_stream_stat;
#define REG_RD_ADDR_iop_dmc_in_r_stream_stat 28

/* Register r_data_descr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int ctrl : 8;
  unsigned int stat : 8;
  unsigned int md   : 16;
} reg_iop_dmc_in_r_data_descr;
#define REG_RD_ADDR_iop_dmc_in_r_data_descr 32

/* Register r_ctxt_descr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int ctrl : 8;
  unsigned int stat : 8;
  unsigned int md0  : 16;
} reg_iop_dmc_in_r_ctxt_descr;
#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr 36

/* Register r_ctxt_descr_md1, scope iop_dmc_in, type r */
typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md1;
#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md1 40

/* Register r_ctxt_descr_md2, scope iop_dmc_in, type r */
typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md2;
#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md2 44

/* Register r_group_descr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int ctrl : 8;
  unsigned int stat : 8;
  unsigned int md   : 16;
} reg_iop_dmc_in_r_group_descr;
#define REG_RD_ADDR_iop_dmc_in_r_group_descr 56

/* Register rw_data_descr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dummy1 : 16;
  unsigned int md : 16;
} reg_iop_dmc_in_rw_data_descr;
#define REG_RD_ADDR_iop_dmc_in_rw_data_descr 60
#define REG_WR_ADDR_iop_dmc_in_rw_data_descr 60

/* Register rw_ctxt_descr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dummy1 : 16;
  unsigned int md0 : 16;
} reg_iop_dmc_in_rw_ctxt_descr;
#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr 64
#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr 64

/* Register rw_ctxt_descr_md1, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md1;
#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68
#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68

/* Register rw_ctxt_descr_md2, scope iop_dmc_in, type rw */
typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md2;
#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72
#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72

/* Register rw_group_descr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int dummy1 : 16;
  unsigned int md : 16;
} reg_iop_dmc_in_rw_group_descr;
#define REG_RD_ADDR_iop_dmc_in_rw_group_descr 84
#define REG_WR_ADDR_iop_dmc_in_rw_group_descr 84

/* Register rw_intr_mask, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_rw_intr_mask;
#define REG_RD_ADDR_iop_dmc_in_rw_intr_mask 88
#define REG_WR_ADDR_iop_dmc_in_rw_intr_mask 88

/* Register rw_ack_intr, scope iop_dmc_in, type rw */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_rw_ack_intr;
#define REG_RD_ADDR_iop_dmc_in_rw_ack_intr 92
#define REG_WR_ADDR_iop_dmc_in_rw_ack_intr 92

/* Register r_intr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_r_intr;
#define REG_RD_ADDR_iop_dmc_in_r_intr 96

/* Register r_masked_intr, scope iop_dmc_in, type r */
typedef struct {
  unsigned int data_md  : 1;
  unsigned int ctxt_md  : 1;
  unsigned int group_md : 1;
  unsigned int cmd_rdy  : 1;
  unsigned int sth      : 1;
  unsigned int full     : 1;
  unsigned int dummy1   : 26;
} reg_iop_dmc_in_r_masked_intr;
#define REG_RD_ADDR_iop_dmc_in_r_masked_intr 100


/* Constants */
enum {
  regk_iop_dmc_in_ack_pkt                  = 0x00000100,
  regk_iop_dmc_in_array                    = 0x00000008,
  regk_iop_dmc_in_burst                    = 0x00000020,
  regk_iop_dmc_in_copy_next                = 0x00000010,
  regk_iop_dmc_in_copy_up                  = 0x00000020,
  regk_iop_dmc_in_dis_c                    = 0x00000010,
  regk_iop_dmc_in_dis_g                    = 0x00000020,
  regk_iop_dmc_in_lim1                     = 0x00000000,
  regk_iop_dmc_in_lim16                    = 0x00000004,
  regk_iop_dmc_in_lim2                     = 0x00000001,
  regk_iop_dmc_in_lim32                    = 0x00000005,
  regk_iop_dmc_in_lim4                     = 0x00000002,
  regk_iop_dmc_in_lim64                    = 0x00000006,
  regk_iop_dmc_in_lim8                     = 0x00000003,
  regk_iop_dmc_in_load_c                   = 0x00000200,
  regk_iop_dmc_in_load_c_n                 = 0x00000280,
  regk_iop_dmc_in_load_c_next              = 0x00000240,
  regk_iop_dmc_in_load_d                   = 0x00000140,
  regk_iop_dmc_in_load_g                   = 0x00000300,
  regk_iop_dmc_in_load_g_down              = 0x000003c0,
  regk_iop_dmc_in_load_g_next              = 0x00000340,
  regk_iop_dmc_in_load_g_up                = 0x00000380,
  regk_iop_dmc_in_next_en                  = 0x00000010,
  regk_iop_dmc_in_next_pkt                 = 0x00000010,
  regk_iop_dmc_in_no                       = 0x00000000,
  regk_iop_dmc_in_restore                  = 0x00000020,
  regk_iop_dmc_in_rw_cfg_default           = 0x00000000,
  regk_iop_dmc_in_rw_ctxt_descr_default    = 0x00000000,
  regk_iop_dmc_in_rw_ctxt_descr_md1_default = 0x00000000,
  regk_iop_dmc_in_rw_ctxt_descr_md2_default = 0x00000000,
  regk_iop_dmc_in_rw_data_descr_default    = 0x00000000,
  regk_iop_dmc_in_rw_group_descr_default   = 0x00000000,
  regk_iop_dmc_in_rw_intr_mask_default     = 0x00000000,
  regk_iop_dmc_in_rw_stream_ctrl_default   = 0x00000000,
  regk_iop_dmc_in_save_down                = 0x00000020,
  regk_iop_dmc_in_save_up                  = 0x00000020,
  regk_iop_dmc_in_set_reg                  = 0x00000050,
  regk_iop_dmc_in_set_w_size1              = 0x00000190,
  regk_iop_dmc_in_set_w_size2              = 0x000001a0,
  regk_iop_dmc_in_set_w_size4              = 0x000001c0,
  regk_iop_dmc_in_store_c                  = 0x00000002,
  regk_iop_dmc_in_store_descr              = 0x00000000,
  regk_iop_dmc_in_store_g                  = 0x00000004,
  regk_iop_dmc_in_store_md                 = 0x00000001,
  regk_iop_dmc_in_update_down              = 0x00000020,
  regk_iop_dmc_in_yes                      = 0x00000001
};
#endif /* __iop_dmc_in_defs_h */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
51533b61 MS	2	#ifndef __iop_dmc_in_defs_h
	3	#define __iop_dmc_in_defs_h
	4
	5	/*
	6	* This file is autogenerated from
	7	* file: ../../inst/io_proc/rtl/iop_dmc_in.r
	8	* id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
	9	* last modfied: Mon Apr 11 16:08:45 2005
	10	*
	11	* by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_in_defs.h ../../inst/io_proc/rtl/iop_dmc_in.r
	12	* id: $Id: iop_dmc_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
	13	* Any changes here will be lost.
	14	*
	15	* -- buffer-read-only: t --
	16	*/
	17	/* Main access macros */
	18	#ifndef REG_RD
	19	#define REG_RD( scope, inst, reg ) \
	20	REG_READ( reg_##scope##_##reg, \
	21	(inst) + REG_RD_ADDR_##scope##_##reg )
	22	#endif
	23
	24	#ifndef REG_WR
	25	#define REG_WR( scope, inst, reg, val ) \
	26	REG_WRITE( reg_##scope##_##reg, \
	27	(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	28	#endif
	29
	30	#ifndef REG_RD_VECT
	31	#define REG_RD_VECT( scope, inst, reg, index ) \
	32	REG_READ( reg_##scope##_##reg, \
	33	(inst) + REG_RD_ADDR_##scope##_##reg + \
	34	(index) * STRIDE_##scope##_##reg )
	35	#endif
	36
	37	#ifndef REG_WR_VECT
	38	#define REG_WR_VECT( scope, inst, reg, index, val ) \
	39	REG_WRITE( reg_##scope##_##reg, \
	40	(inst) + REG_WR_ADDR_##scope##_##reg + \
	41	(index) * STRIDE_##scope##_##reg, (val) )
	42	#endif
	43
	44	#ifndef REG_RD_INT
	45	#define REG_RD_INT( scope, inst, reg ) \
	46	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
	47	#endif
	48
	49	#ifndef REG_WR_INT
	50	#define REG_WR_INT( scope, inst, reg, val ) \
	51	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	52	#endif
	53
	54	#ifndef REG_RD_INT_VECT
	55	#define REG_RD_INT_VECT( scope, inst, reg, index ) \
	56	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	57	(index) * STRIDE_##scope##_##reg )
	58	#endif
	59
	60	#ifndef REG_WR_INT_VECT
	61	#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
	62	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	63	(index) * STRIDE_##scope##_##reg, (val) )
	64	#endif
	65
66	#ifndef REG_TYPE_CONV
67	#define REG_TYPE_CONV( type, orgtype, val ) \
68	( { union { orgtype o; type n; } r; r.o = val; r.n; } )
69	#endif
70
71	#ifndef reg_page_size
72	#define reg_page_size 8192
73	#endif
74
75	#ifndef REG_ADDR
76	#define REG_ADDR( scope, inst, reg ) \
77	( (inst) + REG_RD_ADDR_##scope##_##reg )
78	#endif
79
80	#ifndef REG_ADDR_VECT
81	#define REG_ADDR_VECT( scope, inst, reg, index ) \
82	( (inst) + REG_RD_ADDR_##scope##_##reg + \
83	(index) * STRIDE_##scope##_##reg )
84	#endif
85
86	/* C-code for register scope iop_dmc_in */
87
88	/* Register rw_cfg, scope iop_dmc_in, type rw */
89	typedef struct {
90	unsigned int sth_intr : 3;
91	unsigned int last_dis_dif : 1;
92	unsigned int dummy1 : 28;
93	} reg_iop_dmc_in_rw_cfg;
94	#define REG_RD_ADDR_iop_dmc_in_rw_cfg 0
95	#define REG_WR_ADDR_iop_dmc_in_rw_cfg 0
96
97	/* Register rw_ctrl, scope iop_dmc_in, type rw */
98	typedef struct {
99	unsigned int dif_en : 1;
100	unsigned int dif_dis : 1;
101	unsigned int stream_clr : 1;
102	unsigned int dummy1 : 29;
103	} reg_iop_dmc_in_rw_ctrl;
104	#define REG_RD_ADDR_iop_dmc_in_rw_ctrl 4
105	#define REG_WR_ADDR_iop_dmc_in_rw_ctrl 4
106
107	/* Register r_stat, scope iop_dmc_in, type r */
108	typedef struct {
109	unsigned int dif_en : 1;
110	unsigned int dummy1 : 31;
111	} reg_iop_dmc_in_r_stat;
112	#define REG_RD_ADDR_iop_dmc_in_r_stat 8
113
114	/* Register rw_stream_cmd, scope iop_dmc_in, type rw */
115	typedef struct {
116	unsigned int cmd : 10;
117	unsigned int dummy1 : 6;
118	unsigned int n : 8;
119	unsigned int dummy2 : 8;
120	} reg_iop_dmc_in_rw_stream_cmd;
121	#define REG_RD_ADDR_iop_dmc_in_rw_stream_cmd 12
122	#define REG_WR_ADDR_iop_dmc_in_rw_stream_cmd 12
123
124	/* Register rw_stream_wr_data, scope iop_dmc_in, type rw */
125	typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data;
126	#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data 16
127	#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data 16
128
129	/* Register rw_stream_wr_data_last, scope iop_dmc_in, type rw */
130	typedef unsigned int reg_iop_dmc_in_rw_stream_wr_data_last;
131	#define REG_RD_ADDR_iop_dmc_in_rw_stream_wr_data_last 20
132	#define REG_WR_ADDR_iop_dmc_in_rw_stream_wr_data_last 20
133
134	/* Register rw_stream_ctrl, scope iop_dmc_in, type rw */
135	typedef struct {
136	unsigned int eop : 1;
137	unsigned int wait : 1;
138	unsigned int keep_md : 1;
139	unsigned int size : 3;
140	unsigned int dummy1 : 26;
141	} reg_iop_dmc_in_rw_stream_ctrl;
142	#define REG_RD_ADDR_iop_dmc_in_rw_stream_ctrl 24
143	#define REG_WR_ADDR_iop_dmc_in_rw_stream_ctrl 24
144
145	/* Register r_stream_stat, scope iop_dmc_in, type r */
146	typedef struct {
147	unsigned int sth : 7;
148	unsigned int dummy1 : 9;
149	unsigned int full : 1;
150	unsigned int last_pkt : 1;
151	unsigned int data_md_valid : 1;
152	unsigned int ctxt_md_valid : 1;
153	unsigned int group_md_valid : 1;
154	unsigned int stream_busy : 1;
155	unsigned int cmd_rdy : 1;
156	unsigned int dummy2 : 9;
157	} reg_iop_dmc_in_r_stream_stat;
158	#define REG_RD_ADDR_iop_dmc_in_r_stream_stat 28
159
160	/* Register r_data_descr, scope iop_dmc_in, type r */
161	typedef struct {
162	unsigned int ctrl : 8;
163	unsigned int stat : 8;
164	unsigned int md : 16;
165	} reg_iop_dmc_in_r_data_descr;
166	#define REG_RD_ADDR_iop_dmc_in_r_data_descr 32
167
168	/* Register r_ctxt_descr, scope iop_dmc_in, type r */
169	typedef struct {
170	unsigned int ctrl : 8;
171	unsigned int stat : 8;
172	unsigned int md0 : 16;
173	} reg_iop_dmc_in_r_ctxt_descr;
174	#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr 36
175
176	/* Register r_ctxt_descr_md1, scope iop_dmc_in, type r */
177	typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md1;
178	#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md1 40
179
180	/* Register r_ctxt_descr_md2, scope iop_dmc_in, type r */
181	typedef unsigned int reg_iop_dmc_in_r_ctxt_descr_md2;
182	#define REG_RD_ADDR_iop_dmc_in_r_ctxt_descr_md2 44
183
184	/* Register r_group_descr, scope iop_dmc_in, type r */
185	typedef struct {
186	unsigned int ctrl : 8;
187	unsigned int stat : 8;
188	unsigned int md : 16;
189	} reg_iop_dmc_in_r_group_descr;
190	#define REG_RD_ADDR_iop_dmc_in_r_group_descr 56
191
192	/* Register rw_data_descr, scope iop_dmc_in, type rw */
193	typedef struct {
194	unsigned int dummy1 : 16;
195	unsigned int md : 16;
196	} reg_iop_dmc_in_rw_data_descr;
197	#define REG_RD_ADDR_iop_dmc_in_rw_data_descr 60
198	#define REG_WR_ADDR_iop_dmc_in_rw_data_descr 60
199
200	/* Register rw_ctxt_descr, scope iop_dmc_in, type rw */
201	typedef struct {
202	unsigned int dummy1 : 16;
203	unsigned int md0 : 16;
204	} reg_iop_dmc_in_rw_ctxt_descr;
205	#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr 64
206	#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr 64
207
208	/* Register rw_ctxt_descr_md1, scope iop_dmc_in, type rw */
209	typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md1;
210	#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68
211	#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md1 68
212
213	/* Register rw_ctxt_descr_md2, scope iop_dmc_in, type rw */
214	typedef unsigned int reg_iop_dmc_in_rw_ctxt_descr_md2;
215	#define REG_RD_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72
216	#define REG_WR_ADDR_iop_dmc_in_rw_ctxt_descr_md2 72
217
218	/* Register rw_group_descr, scope iop_dmc_in, type rw */
219	typedef struct {
220	unsigned int dummy1 : 16;
221	unsigned int md : 16;
222	} reg_iop_dmc_in_rw_group_descr;
223	#define REG_RD_ADDR_iop_dmc_in_rw_group_descr 84
224	#define REG_WR_ADDR_iop_dmc_in_rw_group_descr 84
225
226	/* Register rw_intr_mask, scope iop_dmc_in, type rw */
227	typedef struct {
228	unsigned int data_md : 1;
229	unsigned int ctxt_md : 1;
230	unsigned int group_md : 1;
231	unsigned int cmd_rdy : 1;
232	unsigned int sth : 1;
233	unsigned int full : 1;
234	unsigned int dummy1 : 26;
235	} reg_iop_dmc_in_rw_intr_mask;
236	#define REG_RD_ADDR_iop_dmc_in_rw_intr_mask 88
237	#define REG_WR_ADDR_iop_dmc_in_rw_intr_mask 88
238
239	/* Register rw_ack_intr, scope iop_dmc_in, type rw */
240	typedef struct {
241	unsigned int data_md : 1;
242	unsigned int ctxt_md : 1;
243	unsigned int group_md : 1;
244	unsigned int cmd_rdy : 1;
245	unsigned int sth : 1;
246	unsigned int full : 1;
247	unsigned int dummy1 : 26;
248	} reg_iop_dmc_in_rw_ack_intr;
249	#define REG_RD_ADDR_iop_dmc_in_rw_ack_intr 92
250	#define REG_WR_ADDR_iop_dmc_in_rw_ack_intr 92
251
252	/* Register r_intr, scope iop_dmc_in, type r */
253	typedef struct {
254	unsigned int data_md : 1;
255	unsigned int ctxt_md : 1;
256	unsigned int group_md : 1;
257	unsigned int cmd_rdy : 1;
258	unsigned int sth : 1;
259	unsigned int full : 1;
260	unsigned int dummy1 : 26;
261	} reg_iop_dmc_in_r_intr;
262	#define REG_RD_ADDR_iop_dmc_in_r_intr 96
263
264	/* Register r_masked_intr, scope iop_dmc_in, type r */
265	typedef struct {
266	unsigned int data_md : 1;
267	unsigned int ctxt_md : 1;
268	unsigned int group_md : 1;
269	unsigned int cmd_rdy : 1;
270	unsigned int sth : 1;
271	unsigned int full : 1;
272	unsigned int dummy1 : 26;
273	} reg_iop_dmc_in_r_masked_intr;
274	#define REG_RD_ADDR_iop_dmc_in_r_masked_intr 100
275
276
277	/* Constants */
278	enum {
279	regk_iop_dmc_in_ack_pkt = 0x00000100,
280	regk_iop_dmc_in_array = 0x00000008,
281	regk_iop_dmc_in_burst = 0x00000020,
282	regk_iop_dmc_in_copy_next = 0x00000010,
283	regk_iop_dmc_in_copy_up = 0x00000020,
284	regk_iop_dmc_in_dis_c = 0x00000010,
285	regk_iop_dmc_in_dis_g = 0x00000020,
286	regk_iop_dmc_in_lim1 = 0x00000000,
287	regk_iop_dmc_in_lim16 = 0x00000004,
288	regk_iop_dmc_in_lim2 = 0x00000001,
289	regk_iop_dmc_in_lim32 = 0x00000005,
290	regk_iop_dmc_in_lim4 = 0x00000002,
291	regk_iop_dmc_in_lim64 = 0x00000006,
292	regk_iop_dmc_in_lim8 = 0x00000003,
293	regk_iop_dmc_in_load_c = 0x00000200,
294	regk_iop_dmc_in_load_c_n = 0x00000280,
295	regk_iop_dmc_in_load_c_next = 0x00000240,
296	regk_iop_dmc_in_load_d = 0x00000140,
297	regk_iop_dmc_in_load_g = 0x00000300,
298	regk_iop_dmc_in_load_g_down = 0x000003c0,
299	regk_iop_dmc_in_load_g_next = 0x00000340,
300	regk_iop_dmc_in_load_g_up = 0x00000380,
301	regk_iop_dmc_in_next_en = 0x00000010,
302	regk_iop_dmc_in_next_pkt = 0x00000010,
303	regk_iop_dmc_in_no = 0x00000000,
304	regk_iop_dmc_in_restore = 0x00000020,
305	regk_iop_dmc_in_rw_cfg_default = 0x00000000,
306	regk_iop_dmc_in_rw_ctxt_descr_default = 0x00000000,
307	regk_iop_dmc_in_rw_ctxt_descr_md1_default = 0x00000000,
308	regk_iop_dmc_in_rw_ctxt_descr_md2_default = 0x00000000,
309	regk_iop_dmc_in_rw_data_descr_default = 0x00000000,
310	regk_iop_dmc_in_rw_group_descr_default = 0x00000000,
311	regk_iop_dmc_in_rw_intr_mask_default = 0x00000000,
312	regk_iop_dmc_in_rw_stream_ctrl_default = 0x00000000,
313	regk_iop_dmc_in_save_down = 0x00000020,
314	regk_iop_dmc_in_save_up = 0x00000020,
315	regk_iop_dmc_in_set_reg = 0x00000050,
316	regk_iop_dmc_in_set_w_size1 = 0x00000190,
317	regk_iop_dmc_in_set_w_size2 = 0x000001a0,
318	regk_iop_dmc_in_set_w_size4 = 0x000001c0,
319	regk_iop_dmc_in_store_c = 0x00000002,
320	regk_iop_dmc_in_store_descr = 0x00000000,
321	regk_iop_dmc_in_store_g = 0x00000004,
322	regk_iop_dmc_in_store_md = 0x00000001,
323	regk_iop_dmc_in_update_down = 0x00000020,
324	regk_iop_dmc_in_yes = 0x00000001
325	};
326	#endif /* __iop_dmc_in_defs_h */