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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
51533b61 MS |
2 | #ifndef _ASM_CRIS_ARCH_UNISTD_H_ |
3 | #define _ASM_CRIS_ARCH_UNISTD_H_ | |
4 | ||
5 | /* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ | |
6 | /* | |
7 | * Don't remove the .ifnc tests; they are an insurance against | |
8 | * any hard-to-spot gcc register allocation bugs. | |
9 | */ | |
10 | #define _syscall0(type,name) \ | |
11 | type name(void) \ | |
12 | { \ | |
13 | register long __a __asm__ ("r10"); \ | |
14 | register long __n_ __asm__ ("r9") = (__NR_##name); \ | |
15 | __asm__ __volatile__ (".ifnc %0%1,$r10$r9\n\t" \ | |
16 | ".err\n\t" \ | |
17 | ".endif\n\t" \ | |
18 | "break 13" \ | |
19 | : "=r" (__a) \ | |
57e6f964 JN |
20 | : "r" (__n_) \ |
21 | : "memory"); \ | |
51533b61 MS |
22 | if (__a >= 0) \ |
23 | return (type) __a; \ | |
24 | errno = -__a; \ | |
25 | return (type) -1; \ | |
26 | } | |
27 | ||
28 | #define _syscall1(type,name,type1,arg1) \ | |
29 | type name(type1 arg1) \ | |
30 | { \ | |
31 | register long __a __asm__ ("r10") = (long) arg1; \ | |
32 | register long __n_ __asm__ ("r9") = (__NR_##name); \ | |
33 | __asm__ __volatile__ (".ifnc %0%1,$r10$r9\n\t" \ | |
34 | ".err\n\t" \ | |
35 | ".endif\n\t" \ | |
36 | "break 13" \ | |
37 | : "=r" (__a) \ | |
57e6f964 JN |
38 | : "r" (__n_), "0" (__a) \ |
39 | : "memory"); \ | |
51533b61 MS |
40 | if (__a >= 0) \ |
41 | return (type) __a; \ | |
42 | errno = -__a; \ | |
43 | return (type) -1; \ | |
44 | } | |
45 | ||
46 | #define _syscall2(type,name,type1,arg1,type2,arg2) \ | |
47 | type name(type1 arg1,type2 arg2) \ | |
48 | { \ | |
49 | register long __a __asm__ ("r10") = (long) arg1; \ | |
50 | register long __b __asm__ ("r11") = (long) arg2; \ | |
51 | register long __n_ __asm__ ("r9") = (__NR_##name); \ | |
52 | __asm__ __volatile__ (".ifnc %0%1%3,$r10$r9$r11\n\t" \ | |
53 | ".err\n\t" \ | |
54 | ".endif\n\t" \ | |
55 | "break 13" \ | |
56 | : "=r" (__a) \ | |
57e6f964 JN |
57 | : "r" (__n_), "0" (__a), "r" (__b) \ |
58 | : "memory"); \ | |
51533b61 MS |
59 | if (__a >= 0) \ |
60 | return (type) __a; \ | |
61 | errno = -__a; \ | |
62 | return (type) -1; \ | |
63 | } | |
64 | ||
65 | #define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ | |
66 | type name(type1 arg1,type2 arg2,type3 arg3) \ | |
67 | { \ | |
68 | register long __a __asm__ ("r10") = (long) arg1; \ | |
69 | register long __b __asm__ ("r11") = (long) arg2; \ | |
70 | register long __c __asm__ ("r12") = (long) arg3; \ | |
71 | register long __n_ __asm__ ("r9") = (__NR_##name); \ | |
72 | __asm__ __volatile__ (".ifnc %0%1%3%4,$r10$r9$r11$r12\n\t" \ | |
73 | ".err\n\t" \ | |
74 | ".endif\n\t" \ | |
75 | "break 13" \ | |
76 | : "=r" (__a) \ | |
57e6f964 JN |
77 | : "r" (__n_), "0" (__a), "r" (__b), "r" (__c) \ |
78 | : "memory"); \ | |
51533b61 MS |
79 | if (__a >= 0) \ |
80 | return (type) __a; \ | |
81 | errno = -__a; \ | |
82 | return (type) -1; \ | |
83 | } | |
84 | ||
85 | #define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ | |
86 | type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ | |
87 | { \ | |
88 | register long __a __asm__ ("r10") = (long) arg1; \ | |
89 | register long __b __asm__ ("r11") = (long) arg2; \ | |
90 | register long __c __asm__ ("r12") = (long) arg3; \ | |
91 | register long __d __asm__ ("r13") = (long) arg4; \ | |
92 | register long __n_ __asm__ ("r9") = (__NR_##name); \ | |
93 | __asm__ __volatile__ (".ifnc %0%1%3%4%5,$r10$r9$r11$r12$r13\n\t" \ | |
94 | ".err\n\t" \ | |
95 | ".endif\n\t" \ | |
96 | "break 13" \ | |
97 | : "=r" (__a) \ | |
98 | : "r" (__n_), "0" (__a), "r" (__b), \ | |
57e6f964 JN |
99 | "r" (__c), "r" (__d)\ |
100 | : "memory"); \ | |
51533b61 MS |
101 | if (__a >= 0) \ |
102 | return (type) __a; \ | |
103 | errno = -__a; \ | |
104 | return (type) -1; \ | |
105 | } | |
106 | ||
107 | #define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ | |
108 | type5,arg5) \ | |
109 | type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ | |
110 | { \ | |
111 | register long __a __asm__ ("r10") = (long) arg1; \ | |
112 | register long __b __asm__ ("r11") = (long) arg2; \ | |
113 | register long __c __asm__ ("r12") = (long) arg3; \ | |
114 | register long __d __asm__ ("r13") = (long) arg4; \ | |
115 | register long __e __asm__ ("mof") = (long) arg5; \ | |
116 | register long __n_ __asm__ ("r9") = (__NR_##name); \ | |
117 | __asm__ __volatile__ (".ifnc %0%1%3%4%5%6,$r10$r9$r11$r12$r13$mof\n\t" \ | |
118 | ".err\n\t" \ | |
119 | ".endif\n\t" \ | |
120 | "break 13" \ | |
121 | : "=r" (__a) \ | |
122 | : "r" (__n_), "0" (__a), "r" (__b), \ | |
57e6f964 JN |
123 | "r" (__c), "r" (__d), "h" (__e) \ |
124 | : "memory"); \ | |
51533b61 MS |
125 | if (__a >= 0) \ |
126 | return (type) __a; \ | |
127 | errno = -__a; \ | |
128 | return (type) -1; \ | |
129 | } | |
130 | ||
131 | #define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ | |
132 | type5,arg5,type6,arg6) \ | |
133 | type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5,type6 arg6) \ | |
134 | { \ | |
135 | register long __a __asm__ ("r10") = (long) arg1; \ | |
136 | register long __b __asm__ ("r11") = (long) arg2; \ | |
137 | register long __c __asm__ ("r12") = (long) arg3; \ | |
138 | register long __d __asm__ ("r13") = (long) arg4; \ | |
139 | register long __e __asm__ ("mof") = (long) arg5; \ | |
140 | register long __f __asm__ ("srp") = (long) arg6; \ | |
141 | register long __n_ __asm__ ("r9") = (__NR_##name); \ | |
142 | __asm__ __volatile__ (".ifnc %0%1%3%4%5%6%7,$r10$r9$r11$r12$r13$mof$srp\n\t" \ | |
143 | ".err\n\t" \ | |
144 | ".endif\n\t" \ | |
145 | "break 13" \ | |
146 | : "=r" (__a) \ | |
147 | : "r" (__n_), "0" (__a), "r" (__b), \ | |
57e6f964 JN |
148 | "r" (__c), "r" (__d), "h" (__e), "x" (__f) \ |
149 | : "memory"); \ | |
51533b61 MS |
150 | if (__a >= 0) \ |
151 | return (type) __a; \ | |
152 | errno = -__a; \ | |
153 | return (type) -1; \ | |
154 | } | |
155 | ||
156 | #endif |