[mirror_ubuntu-bionic-kernel.git] / arch / cris / include / asm / cacheflush.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _CRIS_CACHEFLUSH_H
#define _CRIS_CACHEFLUSH_H

/* Keep includes the same across arches.  */
#include <linux/mm.h>

/* The cache doesn't need to be flushed when TLB entries change because 
 * the cache is mapped to physical memory, not virtual memory
 */
#define flush_cache_all()			do { } while (0)
#define flush_cache_mm(mm)			do { } while (0)
#define flush_cache_dup_mm(mm)			do { } while (0)
#define flush_cache_range(vma, start, end)	do { } while (0)
#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
#define flush_dcache_page(page)			do { } while (0)
#define flush_dcache_mmap_lock(mapping)		do { } while (0)
#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
#define flush_icache_range(start, end)		do { } while (0)
#define flush_icache_page(vma,pg)		do { } while (0)
#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
#define flush_cache_vmap(start, end)		do { } while (0)
#define flush_cache_vunmap(start, end)		do { } while (0)

#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
	memcpy(dst, src, len)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
	memcpy(dst, src, len)

int change_page_attr(struct page *page, int numpages, pgprot_t prot);

#endif /* _CRIS_CACHEFLUSH_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	#ifndef _CRIS_CACHEFLUSH_H
	3	#define _CRIS_CACHEFLUSH_H
	4
	5	/* Keep includes the same across arches. */
	6	#include <linux/mm.h>
	7
	8	/* The cache doesn't need to be flushed when TLB entries change because
	9	* the cache is mapped to physical memory, not virtual memory
	10	*/
	11	#define flush_cache_all() do { } while (0)
	12	#define flush_cache_mm(mm) do { } while (0)
ec8c0446	13	#define flush_cache_dup_mm(mm) do { } while (0)
1da177e4 LT	14	#define flush_cache_range(vma, start, end) do { } while (0)
1da177e4 LT	15	#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
2d4dc890	16	#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
1da177e4 LT	17	#define flush_dcache_page(page) do { } while (0)
	18	#define flush_dcache_mmap_lock(mapping) do { } while (0)
	19	#define flush_dcache_mmap_unlock(mapping) do { } while (0)
	20	#define flush_icache_range(start, end) do { } while (0)
	21	#define flush_icache_page(vma,pg) do { } while (0)
	22	#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
	23	#define flush_cache_vmap(start, end) do { } while (0)
	24	#define flush_cache_vunmap(start, end) do { } while (0)
	25
	26	#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
	27	memcpy(dst, src, len)
	28	#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
	29	memcpy(dst, src, len)
	30
1da177e4 LT	31	int change_page_attr(struct page *page, int numpages, pgprot_t prot);
	32
	33	#endif /* _CRIS_CACHEFLUSH_H */