[mirror_ubuntu-hirsute-kernel.git] / arch / csky / kernel / setup.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.

#include <linux/console.h>
#include <linux/memblock.h>
#include <linux/initrd.h>
#include <linux/of.h>
#include <linux/of_fdt.h>
#include <linux/start_kernel.h>
#include <linux/dma-map-ops.h>
#include <linux/screen_info.h>
#include <asm/sections.h>
#include <asm/mmu_context.h>
#include <asm/pgalloc.h>

#ifdef CONFIG_DUMMY_CONSOLE
struct screen_info screen_info = {
	.orig_video_lines	= 30,
	.orig_video_cols	= 80,
	.orig_video_mode	= 0,
	.orig_video_ega_bx	= 0,
	.orig_video_isVGA	= 1,
	.orig_video_points	= 8
};
#endif

static void __init csky_memblock_init(void)
{
	unsigned long lowmem_size = PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET);
	unsigned long sseg_size = PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET);
	unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };
	signed long size;

	memblock_reserve(__pa(_stext), _end - _stext);

	early_init_fdt_reserve_self();
	early_init_fdt_scan_reserved_mem();

	memblock_dump_all();

	min_low_pfn = PFN_UP(memblock_start_of_DRAM());
	max_low_pfn = max_pfn = PFN_DOWN(memblock_end_of_DRAM());

	size = max_pfn - min_low_pfn;

	if (size >= lowmem_size) {
		max_low_pfn = min_low_pfn + lowmem_size;
		write_mmu_msa1(read_mmu_msa0() + SSEG_SIZE);
	} else if (size > sseg_size) {
		max_low_pfn = min_low_pfn + sseg_size;
	}

	max_zone_pfn[ZONE_NORMAL] = max_low_pfn;

#ifdef CONFIG_HIGHMEM
	max_zone_pfn[ZONE_HIGHMEM] = max_pfn;

	highstart_pfn = max_low_pfn;
	highend_pfn   = max_pfn;
#endif
	memblock_set_current_limit(PFN_PHYS(max_low_pfn));

	dma_contiguous_reserve(0);

	free_area_init(max_zone_pfn);
}

void __init setup_arch(char **cmdline_p)
{
	*cmdline_p = boot_command_line;

	console_verbose();

	pr_info("Phys. mem: %ldMB\n",
		(unsigned long) memblock_phys_mem_size()/1024/1024);

	init_mm.start_code = (unsigned long) _stext;
	init_mm.end_code = (unsigned long) _etext;
	init_mm.end_data = (unsigned long) _edata;
	init_mm.brk = (unsigned long) _end;

	parse_early_param();

	csky_memblock_init();

	unflatten_and_copy_device_tree();

#ifdef CONFIG_SMP
	setup_smp();
#endif

	sparse_init();

	fixaddr_init();

#ifdef CONFIG_HIGHMEM
	kmap_init();
#endif
}

unsigned long va_pa_offset;
EXPORT_SYMBOL(va_pa_offset);

asmlinkage __visible void __init csky_start(unsigned int unused,
					    void *dtb_start)
{
	/* Clean up bss section */
	memset(__bss_start, 0, __bss_stop - __bss_start);

	va_pa_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1);

	pre_trap_init();
	pre_mmu_init();

	if (dtb_start == NULL)
		early_init_dt_scan(__dtb_start);
	else
		early_init_dt_scan(dtb_start);

	start_kernel();

	asm volatile("br .\n");
}
Commit	Line	Data
9143a935 GR	1	// SPDX-License-Identifier: GPL-2.0
	2	// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
	3
	4	#include <linux/console.h>
	5	#include <linux/memblock.h>
9143a935 GR	6	#include <linux/initrd.h>
	7	#include <linux/of.h>
	8	#include <linux/of_fdt.h>
	9	#include <linux/start_kernel.h>
0b1abd1f	10	#include <linux/dma-map-ops.h>
9143a935 GR	11	#include <linux/screen_info.h>
	12	#include <asm/sections.h>
	13	#include <asm/mmu_context.h>
	14	#include <asm/pgalloc.h>
	15
	16	#ifdef CONFIG_DUMMY_CONSOLE
	17	struct screen_info screen_info = {
	18	.orig_video_lines = 30,
	19	.orig_video_cols = 80,
	20	.orig_video_mode = 0,
	21	.orig_video_ega_bx = 0,
	22	.orig_video_isVGA = 1,
	23	.orig_video_points = 8
	24	};
	25	#endif
	26
9143a935 GR	27	static void __init csky_memblock_init(void)
9143a935 GR	28	{
8f4693f0 MR	29	unsigned long lowmem_size = PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET);
	30	unsigned long sseg_size = PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET);
	31	unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };
9143a935 GR	32	signed long size;
	33
	34	memblock_reserve(__pa(_stext), _end - _stext);
9143a935 GR	35
	36	early_init_fdt_reserve_self();
	37	early_init_fdt_scan_reserved_mem();
	38
	39	memblock_dump_all();
	40
9143a935	41	min_low_pfn = PFN_UP(memblock_start_of_DRAM());
aefd9461	42	max_low_pfn = max_pfn = PFN_DOWN(memblock_end_of_DRAM());
9143a935 GR	43
	44	size = max_pfn - min_low_pfn;
	45
8f4693f0 MR	46	if (size >= lowmem_size) {
8f4693f0 MR	47	max_low_pfn = min_low_pfn + lowmem_size;
aefd9461	48	write_mmu_msa1(read_mmu_msa0() + SSEG_SIZE);
8f4693f0 MR	49	} else if (size > sseg_size) {
8f4693f0 MR	50	max_low_pfn = min_low_pfn + sseg_size;
9143a935 GR	51	}
9143a935 GR	52
8f4693f0 MR	53	max_zone_pfn[ZONE_NORMAL] = max_low_pfn;
8f4693f0 MR	54
9143a935	55	#ifdef CONFIG_HIGHMEM
8f4693f0	56	max_zone_pfn[ZONE_HIGHMEM] = max_pfn;
9143a935	57
aefd9461 GR	58	highstart_pfn = max_low_pfn;
aefd9461 GR	59	highend_pfn = max_pfn;
9143a935 GR	60	#endif
	61	memblock_set_current_limit(PFN_PHYS(max_low_pfn));
	62
	63	dma_contiguous_reserve(0);
	64
8f4693f0	65	free_area_init(max_zone_pfn);
9143a935 GR	66	}
	67
	68	void __init setup_arch(char **cmdline_p)
	69	{
	70	*cmdline_p = boot_command_line;
	71
	72	console_verbose();
	73
	74	pr_info("Phys. mem: %ldMB\n",
	75	(unsigned long) memblock_phys_mem_size()/1024/1024);
	76
	77	init_mm.start_code = (unsigned long) _stext;
	78	init_mm.end_code = (unsigned long) _etext;
	79	init_mm.end_data = (unsigned long) _edata;
	80	init_mm.brk = (unsigned long) _end;
	81
	82	parse_early_param();
	83
	84	csky_memblock_init();
	85
	86	unflatten_and_copy_device_tree();
	87
	88	#ifdef CONFIG_SMP
	89	setup_smp();
	90	#endif
	91
	92	sparse_init();
	93
f136008f GR	94	fixaddr_init();
f136008f GR	95
9143a935 GR	96	#ifdef CONFIG_HIGHMEM
	97	kmap_init();
	98	#endif
9143a935 GR	99	}
9143a935 GR	100
683fafeb GR	101	unsigned long va_pa_offset;
683fafeb GR	102	EXPORT_SYMBOL(va_pa_offset);
f62e3162	103
205353fa GR	104	asmlinkage __visible void __init csky_start(unsigned int unused,
205353fa GR	105	void *dtb_start)
9143a935 GR	106	{
	107	/* Clean up bss section */
	108	memset(__bss_start, 0, __bss_stop - __bss_start);
	109
683fafeb	110	va_pa_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1);
f62e3162	111
9143a935 GR	112	pre_trap_init();
	113	pre_mmu_init();
	114
205353fa	115	if (dtb_start == NULL)
9143a935 GR	116	early_init_dt_scan(__dtb_start);
9143a935 GR	117	else
205353fa	118	early_init_dt_scan(dtb_start);
9143a935 GR	119
	120	start_kernel();
	121
	122	asm volatile("br .\n");
	123	}