[mirror_ubuntu-zesty-kernel.git] / arch / frv / Kconfig

config FRV
	bool
	default y
	select HAVE_IDE
	select HAVE_ARCH_TRACEHOOK
	select HAVE_PERF_EVENTS
	select HAVE_UID16
	select VIRT_TO_BUS
	select GENERIC_IRQ_SHOW
	select HAVE_DEBUG_BUGVERBOSE
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select GENERIC_CPU_DEVICES
	select ARCH_HAS_DEVMEM_IS_ALLOWED
	select ARCH_WANT_IPC_PARSE_VERSION
	select OLD_SIGSUSPEND3
	select OLD_SIGACTION
	select HAVE_DEBUG_STACKOVERFLOW
	select ARCH_NO_COHERENT_DMA_MMAP

config ZONE_DMA
	bool
	default y

config RWSEM_GENERIC_SPINLOCK
	bool
	default y

config RWSEM_XCHGADD_ALGORITHM
	bool

config GENERIC_HWEIGHT
	bool
	default y

config GENERIC_CALIBRATE_DELAY
	bool
	default n

config TIME_LOW_RES
	bool
	default y

config QUICKLIST
	bool
	default y

config ARCH_HAS_ILOG2_U32
	bool
	default y

config ARCH_HAS_ILOG2_U64
	bool
	default y

config HZ
	int
	default 1000

source "init/Kconfig"

source "kernel/Kconfig.freezer"


menu "Fujitsu FR-V system setup"

config MMU
	bool "MMU support"
	help
	  This options switches on and off support for the FR-V MMU
	  (effectively switching between vmlinux and uClinux). Not all FR-V
	  CPUs support this. Currently only the FR451 has a sufficiently
	  featured MMU.

config FRV_OUTOFLINE_ATOMIC_OPS
	bool "Out-of-line the FRV atomic operations"
	default n
	help
	  Setting this option causes the FR-V atomic operations to be mostly
	  implemented out-of-line.

	  See Documentation/frv/atomic-ops.txt for more information.

config HIGHMEM
	bool "High memory support"
	depends on MMU
	default y
	help
	  If you wish to use more than 256MB of memory with your MMU based
	  system, you will need to select this option. The kernel can only see
	  the memory between 0xC0000000 and 0xD0000000 directly... everything
	  else must be kmapped.

	  The arch is, however, capable of supporting up to 3GB of SDRAM.

config HIGHPTE
	bool "Allocate page tables in highmem"
	depends on HIGHMEM
	default y
	help
	  The VM uses one page of memory for each page table.  For systems
	  with a lot of RAM, this can be wasteful of precious low memory.
	  Setting this option will put user-space page tables in high memory.

source "mm/Kconfig"

choice
	prompt "uClinux kernel load address"
	depends on !MMU
	default UCPAGE_OFFSET_C0000000
	help
	  This option sets the base address for the uClinux kernel. The kernel
	  will rearrange the SDRAM layout to start at this address, and move
	  itself to start there. It must be greater than 0, and it must be
	  sufficiently less than 0xE0000000 that the SDRAM does not intersect
	  the I/O region.

	  The base address must also be aligned such that the SDRAM controller
	  can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.

config UCPAGE_OFFSET_20000000
       bool "0x20000000"

config UCPAGE_OFFSET_40000000
       bool "0x40000000"

config UCPAGE_OFFSET_60000000
       bool "0x60000000"

config UCPAGE_OFFSET_80000000
       bool "0x80000000"

config UCPAGE_OFFSET_A0000000
       bool "0xA0000000"

config UCPAGE_OFFSET_C0000000
       bool "0xC0000000 (Recommended)"

endchoice

config PAGE_OFFSET
	hex
	default 0x20000000 if UCPAGE_OFFSET_20000000
	default 0x40000000 if UCPAGE_OFFSET_40000000
	default 0x60000000 if UCPAGE_OFFSET_60000000
	default 0x80000000 if UCPAGE_OFFSET_80000000
	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	default 0xC0000000

config PROTECT_KERNEL
	bool "Protect core kernel against userspace"
	depends on !MMU
	default y
	help
	  Selecting this option causes the uClinux kernel to change the
	  permittivity of DAMPR register covering the core kernel image to
	  prevent userspace accessing the underlying memory directly.

choice
	prompt "CPU Caching mode"
	default FRV_DEFL_CACHE_WBACK
	help
	  This option determines the default caching mode for the kernel.

	  Write-Back caching mode involves the all reads and writes causing
	  the affected cacheline to be read into the cache first before being
	  operated upon. Memory is not then updated by a write until the cache
	  is filled and a cacheline needs to be displaced from the cache to
	  make room. Only at that point is it written back.

	  Write-Behind caching is similar to Write-Back caching, except that a
	  write won't fetch a cacheline into the cache if there isn't already
	  one there; it will write directly to memory instead.

	  Write-Through caching only fetches cachelines from memory on a
	  read. Writes always get written directly to memory. If the affected
	  cacheline is also in cache, it will be updated too.

	  The final option is to turn of caching entirely.

	  Note that not all CPUs support Write-Behind caching. If the CPU on
	  which the kernel is running doesn't, it'll fall back to Write-Back
	  caching.

config FRV_DEFL_CACHE_WBACK
	bool "Write-Back"

config FRV_DEFL_CACHE_WBEHIND
	bool "Write-Behind"

config FRV_DEFL_CACHE_WTHRU
	bool "Write-Through"

config FRV_DEFL_CACHE_DISABLED
	bool "Disabled"

endchoice

menu "CPU core support"

config CPU_FR401
	bool "Include FR401 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR401, FR401A and FR403 CPUs

config CPU_FR405
	bool "Include FR405 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR405 CPU

config CPU_FR451
	bool "Include FR451 core support"
	default y
	help
	  This enables support for the FR451 CPU

config CPU_FR451_COMPILE
	bool "Specifically compile for FR451 core"
	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR451 CPU

config CPU_FR551
	bool "Include FR551 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR555 CPU

config CPU_FR551_COMPILE
	bool "Specifically compile for FR551 core"
	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR555 CPU

config FRV_L1_CACHE_SHIFT
	int
	default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
	default "6" if CPU_FR551

endmenu

choice
	prompt "System support"
	default MB93091_VDK

config MB93091_VDK
	bool "MB93091 CPU board with or without motherboard"

config MB93093_PDK
	bool "MB93093 PDK unit"

endchoice

if MB93091_VDK
choice
	prompt "Motherboard support"
	default MB93090_MB00

config MB93090_MB00
	bool "Use the MB93090-MB00 motherboard"
	help
	  Select this option if the MB93091 CPU board is going to be used with
	  a MB93090-MB00 VDK motherboard

config MB93091_NO_MB
	bool "Use standalone"
	help
	  Select this option if the MB93091 CPU board is going to be used
	  without a motherboard

endchoice
endif

config FUJITSU_MB93493
	bool "MB93493 Multimedia chip"
	help
	  Select this option if the MB93493 multimedia chip is going to be
	  used.

choice
	prompt "GP-Relative data support"
	default GPREL_DATA_8
	help
	  This option controls what data, if any, should be placed in the GP
	  relative data sections. Using this means that the compiler can
	  generate accesses to the data using GR16-relative addressing which
	  is faster than absolute instructions and saves space (2 instructions
	  per access).

	  However, the GPREL region is limited in size because the immediate
	  value used in the load and store instructions is limited to a 12-bit
	  signed number.

	  So if the linker starts complaining that accesses to GPREL data are
	  out of range, try changing this option from the default.

	  Note that modules will always be compiled with this feature disabled
	  as the module data will not be in range of the GP base address.

config GPREL_DATA_8
	bool "Put data objects of up to 8 bytes into GP-REL"

config GPREL_DATA_4
	bool "Put data objects of up to 4 bytes into GP-REL"

config GPREL_DATA_NONE
	bool "Don't use GP-REL"

endchoice

config FRV_ONCPU_SERIAL
	bool "Use on-CPU serial ports"
	select SERIAL_8250
	default y

config PCI
	bool "Use PCI"
	depends on MB93090_MB00
	default y
	select GENERIC_PCI_IOMAP
	help
	  Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	  onboard. If you have one of these boards and you wish to use the PCI
	  facilities, say Y here.

config RESERVE_DMA_COHERENT
	bool "Reserve DMA coherent memory"
	depends on PCI && !MMU
	default y
	help
	  Many PCI drivers require access to uncached memory for DMA device
	  communications (such as is done with some Ethernet buffer rings). If
	  a fully featured MMU is available, this can be done through page
	  table settings, but if not, a region has to be set aside and marked
	  with a special DAMPR register.

	  Setting this option causes uClinux to set aside a portion of the
	  available memory for use in this manner. The memory will then be
	  unavailable for normal kernel use.

source "drivers/pci/Kconfig"

source "drivers/pcmcia/Kconfig"

menu "Power management options"

config ARCH_SUSPEND_POSSIBLE
	def_bool y

source kernel/power/Kconfig
endmenu

endmenu


menu "Executable formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "arch/frv/Kconfig.debug"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"
Commit	Line	Data
1da177e4 LT	1	config FRV
	2	bool
	3	default y
ec7748b5	4	select HAVE_IDE
4a3b9893	5	select HAVE_ARCH_TRACEHOOK
cdd6c482	6	select HAVE_PERF_EVENTS
af1839eb	7	select HAVE_UID16
4febd95a	8	select VIRT_TO_BUS
3062aa50	9	select GENERIC_IRQ_SHOW
9b2a60c4	10	select HAVE_DEBUG_BUGVERBOSE
df013ffb	11	select ARCH_HAVE_NMI_SAFE_CMPXCHG
9f13a1fd	12	select GENERIC_CPU_DEVICES
21266be9	13	select ARCH_HAS_DEVMEM_IS_ALLOWED
c1d7e01d	14	select ARCH_WANT_IPC_PARSE_VERSION
39e08a9b	15	select OLD_SIGSUSPEND3
177b6703	16	select OLD_SIGACTION
d1a1dc0b	17	select HAVE_DEBUG_STACKOVERFLOW
eae07519	18	select ARCH_NO_COHERENT_DMA_MMAP
1da177e4	19
66701b14 CL	20	config ZONE_DMA
	21	bool
	22	default y
	23
1da177e4 LT	24	config RWSEM_GENERIC_SPINLOCK
	25	bool
	26	default y
	27
	28	config RWSEM_XCHGADD_ALGORITHM
	29	bool
	30
1f6d7a93 AM	31	config GENERIC_HWEIGHT
	32	bool
	33	default y
	34
1da177e4 LT	35	config GENERIC_CALIBRATE_DELAY
	36	bool
	37	default n
	38
06027bdd IM	39	config TIME_LOW_RES
	40	bool
	41	default y
	42
8defab33	43	config QUICKLIST
f0d1b0b3 DH	44	bool
	45	default y
	46
8defab33	47	config ARCH_HAS_ILOG2_U32
f0d1b0b3 DH	48	bool
	49	default y
	50
8defab33	51	config ARCH_HAS_ILOG2_U64
81819f0f CL	52	bool
	53	default y
	54
bdc80787 PA	55	config HZ
	56	int
	57	default 1000
	58
1da177e4 LT	59	source "init/Kconfig"
1da177e4 LT	60
dc52ddc0 MH	61	source "kernel/Kconfig.freezer"
dc52ddc0 MH	62
1da177e4 LT	63
	64	menu "Fujitsu FR-V system setup"
	65
	66	config MMU
	67	bool "MMU support"
	68	help
	69	This options switches on and off support for the FR-V MMU
	70	(effectively switching between vmlinux and uClinux). Not all FR-V
	71	CPUs support this. Currently only the FR451 has a sufficiently
	72	featured MMU.
	73
	74	config FRV_OUTOFLINE_ATOMIC_OPS
	75	bool "Out-of-line the FRV atomic operations"
	76	default n
	77	help
	78	Setting this option causes the FR-V atomic operations to be mostly
	79	implemented out-of-line.
	80
0868ff7a	81	See Documentation/frv/atomic-ops.txt for more information.
1da177e4 LT	82
	83	config HIGHMEM
	84	bool "High memory support"
	85	depends on MMU
	86	default y
	87	help
	88	If you wish to use more than 256MB of memory with your MMU based
	89	system, you will need to select this option. The kernel can only see
	90	the memory between 0xC0000000 and 0xD0000000 directly... everything
	91	else must be kmapped.
	92
	93	The arch is, however, capable of supporting up to 3GB of SDRAM.
	94
	95	config HIGHPTE
	96	bool "Allocate page tables in highmem"
	97	depends on HIGHMEM
	98	default y
	99	help
	100	The VM uses one page of memory for each page table. For systems
	101	with a lot of RAM, this can be wasteful of precious low memory.
	102	Setting this option will put user-space page tables in high memory.
	103
3f22ab27 DH	104	source "mm/Kconfig"
3f22ab27 DH	105
1da177e4 LT	106	choice
	107	prompt "uClinux kernel load address"
	108	depends on !MMU
	109	default UCPAGE_OFFSET_C0000000
	110	help
	111	This option sets the base address for the uClinux kernel. The kernel
	112	will rearrange the SDRAM layout to start at this address, and move
	113	itself to start there. It must be greater than 0, and it must be
	114	sufficiently less than 0xE0000000 that the SDRAM does not intersect
	115	the I/O region.
	116
	117	The base address must also be aligned such that the SDRAM controller
	118	can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
	119
	120	config UCPAGE_OFFSET_20000000
	121	bool "0x20000000"
	122
	123	config UCPAGE_OFFSET_40000000
	124	bool "0x40000000"
	125
	126	config UCPAGE_OFFSET_60000000
	127	bool "0x60000000"
	128
	129	config UCPAGE_OFFSET_80000000
	130	bool "0x80000000"
	131
	132	config UCPAGE_OFFSET_A0000000
	133	bool "0xA0000000"
	134
	135	config UCPAGE_OFFSET_C0000000
	136	bool "0xC0000000 (Recommended)"
	137
	138	endchoice
	139
7038220a DH	140	config PAGE_OFFSET
	141	hex
	142	default 0x20000000 if UCPAGE_OFFSET_20000000
	143	default 0x40000000 if UCPAGE_OFFSET_40000000
	144	default 0x60000000 if UCPAGE_OFFSET_60000000
	145	default 0x80000000 if UCPAGE_OFFSET_80000000
	146	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	147	default 0xC0000000
	148
1da177e4 LT	149	config PROTECT_KERNEL
	150	bool "Protect core kernel against userspace"
	151	depends on !MMU
	152	default y
	153	help
	154	Selecting this option causes the uClinux kernel to change the
	155	permittivity of DAMPR register covering the core kernel image to
	156	prevent userspace accessing the underlying memory directly.
	157
	158	choice
	159	prompt "CPU Caching mode"
	160	default FRV_DEFL_CACHE_WBACK
	161	help
	162	This option determines the default caching mode for the kernel.
	163
	164	Write-Back caching mode involves the all reads and writes causing
	165	the affected cacheline to be read into the cache first before being
	166	operated upon. Memory is not then updated by a write until the cache
	167	is filled and a cacheline needs to be displaced from the cache to
	168	make room. Only at that point is it written back.
	169
	170	Write-Behind caching is similar to Write-Back caching, except that a
	171	write won't fetch a cacheline into the cache if there isn't already
	172	one there; it will write directly to memory instead.
	173
	174	Write-Through caching only fetches cachelines from memory on a
	175	read. Writes always get written directly to memory. If the affected
	176	cacheline is also in cache, it will be updated too.
	177
	178	The final option is to turn of caching entirely.
	179
	180	Note that not all CPUs support Write-Behind caching. If the CPU on
	181	which the kernel is running doesn't, it'll fall back to Write-Back
	182	caching.
	183
	184	config FRV_DEFL_CACHE_WBACK
	185	bool "Write-Back"
	186
	187	config FRV_DEFL_CACHE_WBEHIND
	188	bool "Write-Behind"
	189
	190	config FRV_DEFL_CACHE_WTHRU
	191	bool "Write-Through"
	192
	193	config FRV_DEFL_CACHE_DISABLED
	194	bool "Disabled"
	195
	196	endchoice
	197
	198	menu "CPU core support"
	199
	200	config CPU_FR401
	201	bool "Include FR401 core support"
	202	depends on !MMU
	203	default y
	204	help
	205	This enables support for the FR401, FR401A and FR403 CPUs
	206
	207	config CPU_FR405
	208	bool "Include FR405 core support"
	209	depends on !MMU
	210	default y
	211	help
	212	This enables support for the FR405 CPU
213
214	config CPU_FR451
215	bool "Include FR451 core support"
216	default y
217	help
218	This enables support for the FR451 CPU
219
220	config CPU_FR451_COMPILE
221	bool "Specifically compile for FR451 core"
222	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
223	default y
224	help
225	This causes appropriate flags to be passed to the compiler to
226	optimise for the FR451 CPU
227
228	config CPU_FR551
229	bool "Include FR551 core support"
230	depends on !MMU
231	default y
232	help
233	This enables support for the FR555 CPU
234
235	config CPU_FR551_COMPILE
236	bool "Specifically compile for FR551 core"
237	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
238	default y
239	help
240	This causes appropriate flags to be passed to the compiler to
241	optimise for the FR555 CPU
242
243	config FRV_L1_CACHE_SHIFT
244	int
245	default "5" if CPU_FR401 \|\| CPU_FR405 \|\| CPU_FR451
246	default "6" if CPU_FR551
247
248	endmenu
249
250	choice
251	prompt "System support"
252	default MB93091_VDK
253
254	config MB93091_VDK
255	bool "MB93091 CPU board with or without motherboard"
256
257	config MB93093_PDK
258	bool "MB93093 PDK unit"
259
260	endchoice
261
262	if MB93091_VDK
263	choice
264	prompt "Motherboard support"
265	default MB93090_MB00
266
267	config MB93090_MB00
268	bool "Use the MB93090-MB00 motherboard"
269	help
270	Select this option if the MB93091 CPU board is going to be used with
271	a MB93090-MB00 VDK motherboard
272
273	config MB93091_NO_MB
274	bool "Use standalone"
275	help
276	Select this option if the MB93091 CPU board is going to be used
277	without a motherboard
278
279	endchoice
280	endif
281
1bcbba30 DH	282	config FUJITSU_MB93493
	283	bool "MB93493 Multimedia chip"
	284	help
	285	Select this option if the MB93493 multimedia chip is going to be
	286	used.
	287
1da177e4 LT	288	choice
	289	prompt "GP-Relative data support"
	290	default GPREL_DATA_8
	291	help
	292	This option controls what data, if any, should be placed in the GP
	293	relative data sections. Using this means that the compiler can
	294	generate accesses to the data using GR16-relative addressing which
	295	is faster than absolute instructions and saves space (2 instructions
	296	per access).
	297
	298	However, the GPREL region is limited in size because the immediate
	299	value used in the load and store instructions is limited to a 12-bit
	300	signed number.
	301
	302	So if the linker starts complaining that accesses to GPREL data are
	303	out of range, try changing this option from the default.
	304
	305	Note that modules will always be compiled with this feature disabled
	306	as the module data will not be in range of the GP base address.
	307
	308	config GPREL_DATA_8
	309	bool "Put data objects of up to 8 bytes into GP-REL"
	310
	311	config GPREL_DATA_4
	312	bool "Put data objects of up to 4 bytes into GP-REL"
	313
	314	config GPREL_DATA_NONE
	315	bool "Don't use GP-REL"
	316
	317	endchoice
	318
f8aec757 DH	319	config FRV_ONCPU_SERIAL
	320	bool "Use on-CPU serial ports"
	321	select SERIAL_8250
	322	default y
	323
1da177e4 LT	324	config PCI
	325	bool "Use PCI"
	326	depends on MB93090_MB00
	327	default y
53224185	328	select GENERIC_PCI_IOMAP
1da177e4 LT	329	help
	330	Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	331	onboard. If you have one of these boards and you wish to use the PCI
	332	facilities, say Y here.
	333
1da177e4 LT	334	config RESERVE_DMA_COHERENT
	335	bool "Reserve DMA coherent memory"
	336	depends on PCI && !MMU
	337	default y
	338	help
	339	Many PCI drivers require access to uncached memory for DMA device
	340	communications (such as is done with some Ethernet buffer rings). If
	341	a fully featured MMU is available, this can be done through page
	342	table settings, but if not, a region has to be set aside and marked
	343	with a special DAMPR register.
	344
	345	Setting this option causes uClinux to set aside a portion of the
	346	available memory for use in this manner. The memory will then be
	347	unavailable for normal kernel use.
	348
	349	source "drivers/pci/Kconfig"
	350
7a758313	351	source "drivers/pcmcia/Kconfig"
1da177e4	352
1da177e4	353	menu "Power management options"
f4cb5700 JB	354
	355	config ARCH_SUSPEND_POSSIBLE
	356	def_bool y
f4cb5700	357
1da177e4 LT	358	source kernel/power/Kconfig
	359	endmenu
	360
	361	endmenu
	362
	363
	364	menu "Executable formats"
	365
	366	source "fs/Kconfig.binfmt"
	367
	368	endmenu
	369
d5950b43 SR	370	source "net/Kconfig"
d5950b43 SR	371
1da177e4 LT	372	source "drivers/Kconfig"
	373
	374	source "fs/Kconfig"
	375
	376	source "arch/frv/Kconfig.debug"
	377
	378	source "security/Kconfig"
	379
	380	source "crypto/Kconfig"
	381
	382	source "lib/Kconfig"