[mirror_ubuntu-zesty-kernel.git] / arch / frv / kernel / irq-mb93093.c

/* irq-mb93093.c: MB93093 FPGA interrupt handling
 *
 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/bitops.h>

#include <asm/io.h>
#include <asm/delay.h>
#include <asm/irq.h>
#include <asm/irc-regs.h>

#define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR)))

#define __get_IMR()	({ __reg16(0x0a); })
#define __set_IMR(M)	do { __reg16(0x0a) = (M);  wmb(); } while(0)
#define __get_IFR()	({ __reg16(0x02); })
#define __clr_IFR(M)	do { __reg16(0x02) = ~(M); wmb(); } while(0)

/*
 * off-CPU FPGA PIC operations
 */
static void frv_fpga_mask(struct irq_data *d)
{
	uint16_t imr = __get_IMR();

	imr |= 1 << (d->irq - IRQ_BASE_FPGA);
	__set_IMR(imr);
}

static void frv_fpga_ack(struct irq_data *d)
{
	__clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
}

static void frv_fpga_mask_ack(struct irq_data *d)
{
	uint16_t imr = __get_IMR();

	imr |= 1 << (d->irq - IRQ_BASE_FPGA);
	__set_IMR(imr);

	__clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
}

static void frv_fpga_unmask(struct irq_data *d)
{
	uint16_t imr = __get_IMR();

	imr &= ~(1 << (d->irq - IRQ_BASE_FPGA));

	__set_IMR(imr);
}

static struct irq_chip frv_fpga_pic = {
	.name		= "mb93093",
	.irq_ack	= frv_fpga_ack,
	.irq_mask	= frv_fpga_mask,
	.irq_mask_ack	= frv_fpga_mask_ack,
	.irq_unmask	= frv_fpga_unmask,
};

/*
 * FPGA PIC interrupt handler
 */
static irqreturn_t fpga_interrupt(int irq, void *_mask)
{
	uint16_t imr, mask = (unsigned long) _mask;

	imr = __get_IMR();
	mask = mask & ~imr & __get_IFR();

	/* poll all the triggered IRQs */
	while (mask) {
		int irq;

		asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
		irq = 31 - irq;
		mask &= ~(1 << irq);

		generic_handle_irq(IRQ_BASE_FPGA + irq);
	}

	return IRQ_HANDLED;
}

/*
 * define an interrupt action for each FPGA PIC output
 * - use dev_id to indicate the FPGA PIC input to output mappings
 */
static struct irqaction fpga_irq[1]  = {
	[0] = {
		.handler	= fpga_interrupt,
		.name		= "fpga.0",
		.dev_id		= (void *) 0x0700UL,
	}
};

/*
 * initialise the motherboard FPGA's PIC
 */
void __init fpga_init(void)
{
	int irq;

	/* all PIC inputs are all set to be edge triggered */
	__set_IMR(0x0700);
	__clr_IFR(0x0000);

	for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++)
		irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);

	/* the FPGA drives external IRQ input #2 on the CPU PIC */
	setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]);
}
Commit	Line	Data
1da177e4 LT	1	/* irq-mb93093.c: MB93093 FPGA interrupt handling
1da177e4 LT	2	*
1bcbba30	3	* Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
1da177e4 LT	4	* Written by David Howells (dhowells@redhat.com)
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
1da177e4 LT	12	#include <linux/ptrace.h>
	13	#include <linux/errno.h>
	14	#include <linux/signal.h>
	15	#include <linux/sched.h>
	16	#include <linux/ioport.h>
	17	#include <linux/interrupt.h>
	18	#include <linux/init.h>
	19	#include <linux/irq.h>
1977f032	20	#include <linux/bitops.h>
1da177e4 LT	21
1da177e4 LT	22	#include <asm/io.h>
1da177e4 LT	23	#include <asm/delay.h>
	24	#include <asm/irq.h>
	25	#include <asm/irc-regs.h>
1da177e4 LT	26
	27	#define __reg16(ADDR) ((volatile unsigned short )(__region_CS2 + (ADDR)))
	28
	29	#define __get_IMR() ({ __reg16(0x0a); })
	30	#define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0)
	31	#define __get_IFR() ({ __reg16(0x02); })
	32	#define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0)
	33
1da177e4	34	/*
1bcbba30	35	* off-CPU FPGA PIC operations
1da177e4	36	*/
9741f286	37	static void frv_fpga_mask(struct irq_data *d)
1bcbba30 DH	38	{
1bcbba30 DH	39	uint16_t imr = __get_IMR();
1da177e4	40
9741f286	41	imr \|= 1 << (d->irq - IRQ_BASE_FPGA);
1bcbba30 DH	42	__set_IMR(imr);
1bcbba30 DH	43	}
1da177e4	44
9741f286	45	static void frv_fpga_ack(struct irq_data *d)
88d6e199	46	{
9741f286	47	__clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
88d6e199 DH	48	}
88d6e199 DH	49
9741f286	50	static void frv_fpga_mask_ack(struct irq_data *d)
1da177e4 LT	51	{
	52	uint16_t imr = __get_IMR();
	53
9741f286	54	imr \|= 1 << (d->irq - IRQ_BASE_FPGA);
1da177e4	55	__set_IMR(imr);
1da177e4	56
9741f286	57	__clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
1bcbba30 DH	58	}
1bcbba30 DH	59
9741f286	60	static void frv_fpga_unmask(struct irq_data *d)
1bcbba30	61	{
88d6e199 DH	62	uint16_t imr = __get_IMR();
88d6e199 DH	63
9741f286	64	imr &= ~(1 << (d->irq - IRQ_BASE_FPGA));
88d6e199 DH	65
88d6e199 DH	66	__set_IMR(imr);
1bcbba30 DH	67	}
	68
	69	static struct irq_chip frv_fpga_pic = {
	70	.name = "mb93093",
9741f286 TG	71	.irq_ack = frv_fpga_ack,
	72	.irq_mask = frv_fpga_mask,
	73	.irq_mask_ack = frv_fpga_mask_ack,
	74	.irq_unmask = frv_fpga_unmask,
1bcbba30 DH	75	};
	76
	77	/*
	78	* FPGA PIC interrupt handler
	79	*/
7d12e780	80	static irqreturn_t fpga_interrupt(int irq, void *_mask)
1da177e4	81	{
1bcbba30	82	uint16_t imr, mask = (unsigned long) _mask;
1da177e4 LT	83
1da177e4 LT	84	imr = __get_IMR();
1bcbba30 DH	85	mask = mask & ~imr & __get_IFR();
	86
	87	/* poll all the triggered IRQs */
	88	while (mask) {
	89	int irq;
	90
	91	asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
	92	irq = 31 - irq;
	93	mask &= ~(1 << irq);
	94
0f421c9d	95	generic_handle_irq(IRQ_BASE_FPGA + irq);
1da177e4	96	}
1bcbba30	97
88d6e199	98	return IRQ_HANDLED;
1da177e4 LT	99	}
1da177e4 LT	100
1bcbba30 DH	101	/*
	102	* define an interrupt action for each FPGA PIC output
	103	* - use dev_id to indicate the FPGA PIC input to output mappings
	104	*/
	105	static struct irqaction fpga_irq[1] = {
	106	[0] = {
	107	.handler = fpga_interrupt,
1bcbba30 DH	108	.name = "fpga.0",
	109	.dev_id = (void *) 0x0700UL,
	110	}
	111	};
	112
	113	/*
	114	* initialise the motherboard FPGA's PIC
	115	*/
1da177e4 LT	116	void __init fpga_init(void)
1da177e4 LT	117	{
1bcbba30 DH	118	int irq;
	119
	120	/* all PIC inputs are all set to be edge triggered */
1da177e4 LT	121	__set_IMR(0x0700);
	122	__clr_IFR(0x0000);
	123
1bcbba30	124	for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++)
de2e95a6	125	irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);
1bcbba30 DH	126
	127	/* the FPGA drives external IRQ input #2 on the CPU PIC */
	128	setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]);
1da177e4	129	}