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1da177e4 1/*
fe27cb35 2 * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
1da177e4
LT
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
fe27cb35 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
1da177e4
LT
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
1da177e4
LT
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
fe27cb35
VP
31#include <linux/smp.h>
32#include <linux/sched.h>
1da177e4 33#include <linux/cpufreq.h>
d395bf12 34#include <linux/compiler.h>
8adcc0c6 35#include <linux/dmi.h>
1da177e4
LT
36
37#include <linux/acpi.h>
38#include <acpi/processor.h>
39
fe27cb35 40#include <asm/io.h>
dde9f7ba 41#include <asm/msr.h>
fe27cb35
VP
42#include <asm/processor.h>
43#include <asm/cpufeature.h>
44#include <asm/delay.h>
45#include <asm/uaccess.h>
46
1da177e4
LT
47#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
48
49MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
50MODULE_DESCRIPTION("ACPI Processor P-States Driver");
51MODULE_LICENSE("GPL");
52
dde9f7ba
VP
53enum {
54 UNDEFINED_CAPABLE = 0,
55 SYSTEM_INTEL_MSR_CAPABLE,
56 SYSTEM_IO_CAPABLE,
57};
58
59#define INTEL_MSR_RANGE (0xffff)
dfde5d62 60#define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1)
dde9f7ba 61
fe27cb35 62struct acpi_cpufreq_data {
64be7eed
VP
63 struct acpi_processor_performance *acpi_data;
64 struct cpufreq_frequency_table *freq_table;
dfde5d62 65 unsigned int max_freq;
64be7eed
VP
66 unsigned int resume;
67 unsigned int cpu_feature;
1da177e4
LT
68};
69
64be7eed
VP
70static struct acpi_cpufreq_data *drv_data[NR_CPUS];
71static struct acpi_processor_performance *acpi_perf_data[NR_CPUS];
1da177e4
LT
72
73static struct cpufreq_driver acpi_cpufreq_driver;
74
d395bf12
VP
75static unsigned int acpi_pstate_strict;
76
dde9f7ba
VP
77static int check_est_cpu(unsigned int cpuid)
78{
79 struct cpuinfo_x86 *cpu = &cpu_data[cpuid];
80
81 if (cpu->x86_vendor != X86_VENDOR_INTEL ||
64be7eed 82 !cpu_has(cpu, X86_FEATURE_EST))
dde9f7ba
VP
83 return 0;
84
85 return 1;
86}
87
dde9f7ba 88static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
fe27cb35 89{
64be7eed
VP
90 struct acpi_processor_performance *perf;
91 int i;
fe27cb35
VP
92
93 perf = data->acpi_data;
94
95dd7227 95 for (i=0; i<perf->state_count; i++) {
fe27cb35
VP
96 if (value == perf->states[i].status)
97 return data->freq_table[i].frequency;
98 }
99 return 0;
100}
101
dde9f7ba
VP
102static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
103{
104 int i;
a6f6e6e6 105 struct acpi_processor_performance *perf;
dde9f7ba
VP
106
107 msr &= INTEL_MSR_RANGE;
a6f6e6e6
VP
108 perf = data->acpi_data;
109
95dd7227 110 for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
a6f6e6e6 111 if (msr == perf->states[data->freq_table[i].index].status)
dde9f7ba
VP
112 return data->freq_table[i].frequency;
113 }
114 return data->freq_table[0].frequency;
115}
116
dde9f7ba
VP
117static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
118{
119 switch (data->cpu_feature) {
64be7eed 120 case SYSTEM_INTEL_MSR_CAPABLE:
dde9f7ba 121 return extract_msr(val, data);
64be7eed 122 case SYSTEM_IO_CAPABLE:
dde9f7ba 123 return extract_io(val, data);
64be7eed 124 default:
dde9f7ba
VP
125 return 0;
126 }
127}
128
dde9f7ba
VP
129struct msr_addr {
130 u32 reg;
131};
132
fe27cb35
VP
133struct io_addr {
134 u16 port;
135 u8 bit_width;
136};
137
dde9f7ba
VP
138typedef union {
139 struct msr_addr msr;
140 struct io_addr io;
141} drv_addr_union;
142
fe27cb35 143struct drv_cmd {
dde9f7ba 144 unsigned int type;
fe27cb35 145 cpumask_t mask;
dde9f7ba 146 drv_addr_union addr;
fe27cb35
VP
147 u32 val;
148};
149
150static void do_drv_read(struct drv_cmd *cmd)
1da177e4 151{
dde9f7ba
VP
152 u32 h;
153
154 switch (cmd->type) {
64be7eed 155 case SYSTEM_INTEL_MSR_CAPABLE:
dde9f7ba
VP
156 rdmsr(cmd->addr.msr.reg, cmd->val, h);
157 break;
64be7eed 158 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
159 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
160 &cmd->val,
161 (u32)cmd->addr.io.bit_width);
dde9f7ba 162 break;
64be7eed 163 default:
dde9f7ba
VP
164 break;
165 }
fe27cb35 166}
1da177e4 167
fe27cb35
VP
168static void do_drv_write(struct drv_cmd *cmd)
169{
13424f65 170 u32 lo, hi;
dde9f7ba
VP
171
172 switch (cmd->type) {
64be7eed 173 case SYSTEM_INTEL_MSR_CAPABLE:
13424f65
VP
174 rdmsr(cmd->addr.msr.reg, lo, hi);
175 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
176 wrmsr(cmd->addr.msr.reg, lo, hi);
dde9f7ba 177 break;
64be7eed 178 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
179 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
180 cmd->val,
181 (u32)cmd->addr.io.bit_width);
dde9f7ba 182 break;
64be7eed 183 default:
dde9f7ba
VP
184 break;
185 }
fe27cb35 186}
1da177e4 187
95dd7227 188static void drv_read(struct drv_cmd *cmd)
fe27cb35 189{
64be7eed 190 cpumask_t saved_mask = current->cpus_allowed;
fe27cb35
VP
191 cmd->val = 0;
192
193 set_cpus_allowed(current, cmd->mask);
194 do_drv_read(cmd);
195 set_cpus_allowed(current, saved_mask);
fe27cb35
VP
196}
197
198static void drv_write(struct drv_cmd *cmd)
199{
64be7eed
VP
200 cpumask_t saved_mask = current->cpus_allowed;
201 unsigned int i;
fe27cb35
VP
202
203 for_each_cpu_mask(i, cmd->mask) {
204 set_cpus_allowed(current, cpumask_of_cpu(i));
205 do_drv_write(cmd);
1da177e4
LT
206 }
207
fe27cb35
VP
208 set_cpus_allowed(current, saved_mask);
209 return;
210}
1da177e4 211
fe27cb35
VP
212static u32 get_cur_val(cpumask_t mask)
213{
64be7eed
VP
214 struct acpi_processor_performance *perf;
215 struct drv_cmd cmd;
1da177e4 216
fe27cb35
VP
217 if (unlikely(cpus_empty(mask)))
218 return 0;
1da177e4 219
dde9f7ba
VP
220 switch (drv_data[first_cpu(mask)]->cpu_feature) {
221 case SYSTEM_INTEL_MSR_CAPABLE:
222 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
223 cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
224 break;
225 case SYSTEM_IO_CAPABLE:
226 cmd.type = SYSTEM_IO_CAPABLE;
227 perf = drv_data[first_cpu(mask)]->acpi_data;
228 cmd.addr.io.port = perf->control_register.address;
229 cmd.addr.io.bit_width = perf->control_register.bit_width;
230 break;
231 default:
232 return 0;
233 }
234
fe27cb35 235 cmd.mask = mask;
1da177e4 236
fe27cb35 237 drv_read(&cmd);
1da177e4 238
fe27cb35
VP
239 dprintk("get_cur_val = %u\n", cmd.val);
240
241 return cmd.val;
242}
1da177e4 243
dfde5d62
VP
244/*
245 * Return the measured active (C0) frequency on this CPU since last call
246 * to this function.
247 * Input: cpu number
248 * Return: Average CPU frequency in terms of max frequency (zero on error)
249 *
250 * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
251 * over a period of time, while CPU is in C0 state.
252 * IA32_MPERF counts at the rate of max advertised frequency
253 * IA32_APERF counts at the rate of actual CPU frequency
254 * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
255 * no meaning should be associated with absolute values of these MSRs.
256 */
257static unsigned int get_measured_perf(unsigned int cpu)
258{
259 union {
260 struct {
261 u32 lo;
262 u32 hi;
263 } split;
264 u64 whole;
265 } aperf_cur, mperf_cur;
266
267 cpumask_t saved_mask;
268 unsigned int perf_percent;
269 unsigned int retval;
270
271 saved_mask = current->cpus_allowed;
272 set_cpus_allowed(current, cpumask_of_cpu(cpu));
273 if (get_cpu() != cpu) {
274 /* We were not able to run on requested processor */
275 put_cpu();
276 return 0;
277 }
278
279 rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi);
280 rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi);
281
282 wrmsr(MSR_IA32_APERF, 0,0);
283 wrmsr(MSR_IA32_MPERF, 0,0);
284
285#ifdef __i386__
286 /*
287 * We dont want to do 64 bit divide with 32 bit kernel
288 * Get an approximate value. Return failure in case we cannot get
289 * an approximate value.
290 */
291 if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) {
292 int shift_count;
293 u32 h;
294
295 h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi);
296 shift_count = fls(h);
297
298 aperf_cur.whole >>= shift_count;
299 mperf_cur.whole >>= shift_count;
300 }
301
302 if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) {
303 int shift_count = 7;
304 aperf_cur.split.lo >>= shift_count;
305 mperf_cur.split.lo >>= shift_count;
306 }
307
95dd7227 308 if (aperf_cur.split.lo && mperf_cur.split.lo)
dfde5d62 309 perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo;
95dd7227 310 else
dfde5d62 311 perf_percent = 0;
dfde5d62
VP
312
313#else
314 if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) {
315 int shift_count = 7;
316 aperf_cur.whole >>= shift_count;
317 mperf_cur.whole >>= shift_count;
318 }
319
95dd7227 320 if (aperf_cur.whole && mperf_cur.whole)
dfde5d62 321 perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole;
95dd7227 322 else
dfde5d62 323 perf_percent = 0;
dfde5d62
VP
324
325#endif
326
327 retval = drv_data[cpu]->max_freq * perf_percent / 100;
328
329 put_cpu();
330 set_cpus_allowed(current, saved_mask);
331
332 dprintk("cpu %d: performance percent %d\n", cpu, perf_percent);
333 return retval;
334}
335
fe27cb35
VP
336static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
337{
64be7eed
VP
338 struct acpi_cpufreq_data *data = drv_data[cpu];
339 unsigned int freq;
fe27cb35
VP
340
341 dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
342
343 if (unlikely(data == NULL ||
64be7eed 344 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35 345 return 0;
1da177e4
LT
346 }
347
fe27cb35
VP
348 freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data);
349 dprintk("cur freq = %u\n", freq);
1da177e4 350
fe27cb35 351 return freq;
1da177e4
LT
352}
353
fe27cb35 354static unsigned int check_freqs(cpumask_t mask, unsigned int freq,
64be7eed 355 struct acpi_cpufreq_data *data)
fe27cb35 356{
64be7eed
VP
357 unsigned int cur_freq;
358 unsigned int i;
1da177e4 359
95dd7227 360 for (i=0; i<100; i++) {
fe27cb35
VP
361 cur_freq = extract_freq(get_cur_val(mask), data);
362 if (cur_freq == freq)
363 return 1;
364 udelay(10);
365 }
366 return 0;
367}
368
369static int acpi_cpufreq_target(struct cpufreq_policy *policy,
64be7eed 370 unsigned int target_freq, unsigned int relation)
1da177e4 371{
64be7eed
VP
372 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
373 struct acpi_processor_performance *perf;
374 struct cpufreq_freqs freqs;
375 cpumask_t online_policy_cpus;
376 struct drv_cmd cmd;
8edc59d9
VP
377 unsigned int next_state = 0; /* Index into freq_table */
378 unsigned int next_perf_state = 0; /* Index into perf table */
64be7eed
VP
379 unsigned int i;
380 int result = 0;
fe27cb35
VP
381
382 dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
383
384 if (unlikely(data == NULL ||
95dd7227 385 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35
VP
386 return -ENODEV;
387 }
1da177e4 388
fe27cb35 389 perf = data->acpi_data;
1da177e4 390 result = cpufreq_frequency_table_target(policy,
64be7eed
VP
391 data->freq_table,
392 target_freq,
393 relation, &next_state);
09b4d1ee 394 if (unlikely(result))
fe27cb35 395 return -ENODEV;
09b4d1ee 396
7e1f19e5 397#ifdef CONFIG_HOTPLUG_CPU
09b4d1ee
VP
398 /* cpufreq holds the hotplug lock, so we are safe from here on */
399 cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
7e1f19e5
AM
400#else
401 online_policy_cpus = policy->cpus;
402#endif
1da177e4 403
fe27cb35 404 next_perf_state = data->freq_table[next_state].index;
7650b281 405 if (perf->state == next_perf_state) {
fe27cb35 406 if (unlikely(data->resume)) {
64be7eed
VP
407 dprintk("Called after resume, resetting to P%d\n",
408 next_perf_state);
fe27cb35
VP
409 data->resume = 0;
410 } else {
64be7eed
VP
411 dprintk("Already at target state (P%d)\n",
412 next_perf_state);
fe27cb35
VP
413 return 0;
414 }
09b4d1ee
VP
415 }
416
64be7eed
VP
417 switch (data->cpu_feature) {
418 case SYSTEM_INTEL_MSR_CAPABLE:
419 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
420 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
13424f65 421 cmd.val = (u32) perf->states[next_perf_state].control;
64be7eed
VP
422 break;
423 case SYSTEM_IO_CAPABLE:
424 cmd.type = SYSTEM_IO_CAPABLE;
425 cmd.addr.io.port = perf->control_register.address;
426 cmd.addr.io.bit_width = perf->control_register.bit_width;
427 cmd.val = (u32) perf->states[next_perf_state].control;
428 break;
429 default:
430 return -ENODEV;
431 }
09b4d1ee 432
fe27cb35 433 cpus_clear(cmd.mask);
09b4d1ee 434
fe27cb35
VP
435 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
436 cmd.mask = online_policy_cpus;
437 else
438 cpu_set(policy->cpu, cmd.mask);
09b4d1ee 439
8edc59d9
VP
440 freqs.old = perf->states[perf->state].core_frequency * 1000;
441 freqs.new = data->freq_table[next_state].frequency;
fe27cb35
VP
442 for_each_cpu_mask(i, cmd.mask) {
443 freqs.cpu = i;
444 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
09b4d1ee 445 }
1da177e4 446
fe27cb35 447 drv_write(&cmd);
09b4d1ee 448
fe27cb35
VP
449 if (acpi_pstate_strict) {
450 if (!check_freqs(cmd.mask, freqs.new, data)) {
451 dprintk("acpi_cpufreq_target failed (%d)\n",
64be7eed 452 policy->cpu);
fe27cb35 453 return -EAGAIN;
09b4d1ee
VP
454 }
455 }
456
fe27cb35
VP
457 for_each_cpu_mask(i, cmd.mask) {
458 freqs.cpu = i;
459 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
460 }
461 perf->state = next_perf_state;
462
463 return result;
1da177e4
LT
464}
465
64be7eed 466static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
1da177e4 467{
fe27cb35 468 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
1da177e4
LT
469
470 dprintk("acpi_cpufreq_verify\n");
471
fe27cb35 472 return cpufreq_frequency_table_verify(policy, data->freq_table);
1da177e4
LT
473}
474
1da177e4 475static unsigned long
64be7eed 476acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
1da177e4 477{
64be7eed 478 struct acpi_processor_performance *perf = data->acpi_data;
09b4d1ee 479
1da177e4
LT
480 if (cpu_khz) {
481 /* search the closest match to cpu_khz */
482 unsigned int i;
483 unsigned long freq;
09b4d1ee 484 unsigned long freqn = perf->states[0].core_frequency * 1000;
1da177e4 485
95dd7227 486 for (i=0; i<(perf->state_count-1); i++) {
1da177e4 487 freq = freqn;
95dd7227 488 freqn = perf->states[i+1].core_frequency * 1000;
1da177e4 489 if ((2 * cpu_khz) > (freqn + freq)) {
09b4d1ee 490 perf->state = i;
64be7eed 491 return freq;
1da177e4
LT
492 }
493 }
95dd7227 494 perf->state = perf->state_count-1;
64be7eed 495 return freqn;
09b4d1ee 496 } else {
1da177e4 497 /* assume CPU is at P0... */
09b4d1ee
VP
498 perf->state = 0;
499 return perf->states[0].core_frequency * 1000;
500 }
1da177e4
LT
501}
502
09b4d1ee
VP
503/*
504 * acpi_cpufreq_early_init - initialize ACPI P-States library
505 *
506 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
507 * in order to determine correct frequency and voltage pairings. We can
508 * do _PDC and _PSD and find out the processor dependency for the
509 * actual init that will happen later...
510 */
fe27cb35 511static int acpi_cpufreq_early_init(void)
09b4d1ee 512{
64be7eed
VP
513 struct acpi_processor_performance *data;
514 cpumask_t covered;
515 unsigned int i, j;
09b4d1ee
VP
516
517 dprintk("acpi_cpufreq_early_init\n");
518
fb1bb34d 519 for_each_possible_cpu(i) {
64be7eed
VP
520 data = kzalloc(sizeof(struct acpi_processor_performance),
521 GFP_KERNEL);
09b4d1ee 522 if (!data) {
fe27cb35 523 for_each_cpu_mask(j, covered) {
09b4d1ee
VP
524 kfree(acpi_perf_data[j]);
525 acpi_perf_data[j] = NULL;
526 }
64be7eed 527 return -ENOMEM;
09b4d1ee
VP
528 }
529 acpi_perf_data[i] = data;
fe27cb35 530 cpu_set(i, covered);
09b4d1ee
VP
531 }
532
533 /* Do initialization in ACPI core */
fe27cb35
VP
534 acpi_processor_preregister_performance(acpi_perf_data);
535 return 0;
09b4d1ee
VP
536}
537
95625b8f 538#ifdef CONFIG_SMP
8adcc0c6
VP
539/*
540 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
541 * or do it in BIOS firmware and won't inform about it to OS. If not
542 * detected, this has a side effect of making CPU run at a different speed
543 * than OS intended it to run at. Detect it and handle it cleanly.
544 */
545static int bios_with_sw_any_bug;
546
0497c8ca 547static int sw_any_bug_found(struct dmi_system_id *d)
8adcc0c6
VP
548{
549 bios_with_sw_any_bug = 1;
550 return 0;
551}
552
0497c8ca 553static struct dmi_system_id sw_any_bug_dmi_table[] = {
8adcc0c6
VP
554 {
555 .callback = sw_any_bug_found,
556 .ident = "Supermicro Server X6DLP",
557 .matches = {
558 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
559 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
560 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
561 },
562 },
563 { }
564};
95625b8f 565#endif
8adcc0c6 566
64be7eed 567static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
1da177e4 568{
64be7eed
VP
569 unsigned int i;
570 unsigned int valid_states = 0;
571 unsigned int cpu = policy->cpu;
572 struct acpi_cpufreq_data *data;
64be7eed
VP
573 unsigned int result = 0;
574 struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
575 struct acpi_processor_performance *perf;
1da177e4 576
1da177e4 577 dprintk("acpi_cpufreq_cpu_init\n");
1da177e4 578
09b4d1ee 579 if (!acpi_perf_data[cpu])
64be7eed 580 return -ENODEV;
09b4d1ee 581
fe27cb35 582 data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
1da177e4 583 if (!data)
64be7eed 584 return -ENOMEM;
1da177e4 585
09b4d1ee 586 data->acpi_data = acpi_perf_data[cpu];
fe27cb35 587 drv_data[cpu] = data;
1da177e4 588
95dd7227 589 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
fe27cb35 590 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
1da177e4 591
fe27cb35 592 result = acpi_processor_register_performance(data->acpi_data, cpu);
1da177e4
LT
593 if (result)
594 goto err_free;
595
09b4d1ee 596 perf = data->acpi_data;
09b4d1ee 597 policy->shared_type = perf->shared_type;
95dd7227 598
46f18e3a 599 /*
95dd7227 600 * Will let policy->cpus know about dependency only when software
46f18e3a
VP
601 * coordination is required.
602 */
603 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
8adcc0c6 604 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
46f18e3a 605 policy->cpus = perf->shared_cpu_map;
8adcc0c6
VP
606 }
607
608#ifdef CONFIG_SMP
609 dmi_check_system(sw_any_bug_dmi_table);
610 if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) {
611 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
612 policy->cpus = cpu_core_map[cpu];
613 }
614#endif
09b4d1ee 615
1da177e4 616 /* capability check */
09b4d1ee 617 if (perf->state_count <= 1) {
1da177e4
LT
618 dprintk("No P-States\n");
619 result = -ENODEV;
620 goto err_unreg;
621 }
09b4d1ee 622
fe27cb35
VP
623 if (perf->control_register.space_id != perf->status_register.space_id) {
624 result = -ENODEV;
625 goto err_unreg;
626 }
627
628 switch (perf->control_register.space_id) {
64be7eed 629 case ACPI_ADR_SPACE_SYSTEM_IO:
fe27cb35 630 dprintk("SYSTEM IO addr space\n");
dde9f7ba
VP
631 data->cpu_feature = SYSTEM_IO_CAPABLE;
632 break;
64be7eed 633 case ACPI_ADR_SPACE_FIXED_HARDWARE:
dde9f7ba
VP
634 dprintk("HARDWARE addr space\n");
635 if (!check_est_cpu(cpu)) {
636 result = -ENODEV;
637 goto err_unreg;
638 }
639 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
fe27cb35 640 break;
64be7eed 641 default:
fe27cb35 642 dprintk("Unknown addr space %d\n",
64be7eed 643 (u32) (perf->control_register.space_id));
1da177e4
LT
644 result = -ENODEV;
645 goto err_unreg;
646 }
647
95dd7227
DJ
648 data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
649 (perf->state_count+1), GFP_KERNEL);
1da177e4
LT
650 if (!data->freq_table) {
651 result = -ENOMEM;
652 goto err_unreg;
653 }
654
655 /* detect transition latency */
656 policy->cpuinfo.transition_latency = 0;
95dd7227 657 for (i=0; i<perf->state_count; i++) {
64be7eed
VP
658 if ((perf->states[i].transition_latency * 1000) >
659 policy->cpuinfo.transition_latency)
660 policy->cpuinfo.transition_latency =
661 perf->states[i].transition_latency * 1000;
1da177e4
LT
662 }
663 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
664
dfde5d62 665 data->max_freq = perf->states[0].core_frequency * 1000;
1da177e4 666 /* table init */
95dd7227 667 for (i=0; i<perf->state_count; i++) {
3cdf552b
ZR
668 if (i>0 && perf->states[i].core_frequency >=
669 data->freq_table[valid_states-1].frequency / 1000)
fe27cb35
VP
670 continue;
671
672 data->freq_table[valid_states].index = i;
673 data->freq_table[valid_states].frequency =
64be7eed 674 perf->states[i].core_frequency * 1000;
fe27cb35 675 valid_states++;
1da177e4 676 }
3d4a7ef3 677 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
8edc59d9 678 perf->state = 0;
1da177e4
LT
679
680 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
95dd7227 681 if (result)
1da177e4 682 goto err_freqfree;
1da177e4 683
a507ac4b 684 switch (perf->control_register.space_id) {
64be7eed 685 case ACPI_ADR_SPACE_SYSTEM_IO:
dde9f7ba
VP
686 /* Current speed is unknown and not detectable by IO port */
687 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
688 break;
64be7eed 689 case ACPI_ADR_SPACE_FIXED_HARDWARE:
7650b281 690 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
a507ac4b 691 policy->cur = get_cur_freq_on_cpu(cpu);
dde9f7ba 692 break;
64be7eed 693 default:
dde9f7ba
VP
694 break;
695 }
696
1da177e4
LT
697 /* notify BIOS that we exist */
698 acpi_processor_notify_smm(THIS_MODULE);
699
dfde5d62
VP
700 /* Check for APERF/MPERF support in hardware */
701 if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
702 unsigned int ecx;
703 ecx = cpuid_ecx(6);
95dd7227 704 if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
dfde5d62 705 acpi_cpufreq_driver.getavg = get_measured_perf;
dfde5d62
VP
706 }
707
fe27cb35 708 dprintk("CPU%u - ACPI performance management activated.\n", cpu);
09b4d1ee 709 for (i = 0; i < perf->state_count; i++)
1da177e4 710 dprintk(" %cP%d: %d MHz, %d mW, %d uS\n",
64be7eed 711 (i == perf->state ? '*' : ' '), i,
09b4d1ee
VP
712 (u32) perf->states[i].core_frequency,
713 (u32) perf->states[i].power,
714 (u32) perf->states[i].transition_latency);
1da177e4
LT
715
716 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
64be7eed 717
4b31e774
DB
718 /*
719 * the first call to ->target() should result in us actually
720 * writing something to the appropriate registers.
721 */
722 data->resume = 1;
64be7eed 723
fe27cb35 724 return result;
1da177e4 725
95dd7227 726err_freqfree:
1da177e4 727 kfree(data->freq_table);
95dd7227 728err_unreg:
09b4d1ee 729 acpi_processor_unregister_performance(perf, cpu);
95dd7227 730err_free:
1da177e4 731 kfree(data);
fe27cb35 732 drv_data[cpu] = NULL;
1da177e4 733
64be7eed 734 return result;
1da177e4
LT
735}
736
64be7eed 737static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
1da177e4 738{
fe27cb35 739 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
1da177e4 740
1da177e4
LT
741 dprintk("acpi_cpufreq_cpu_exit\n");
742
743 if (data) {
744 cpufreq_frequency_table_put_attr(policy->cpu);
fe27cb35 745 drv_data[policy->cpu] = NULL;
64be7eed
VP
746 acpi_processor_unregister_performance(data->acpi_data,
747 policy->cpu);
1da177e4
LT
748 kfree(data);
749 }
750
64be7eed 751 return 0;
1da177e4
LT
752}
753
64be7eed 754static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
1da177e4 755{
fe27cb35 756 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
1da177e4 757
1da177e4
LT
758 dprintk("acpi_cpufreq_resume\n");
759
760 data->resume = 1;
761
64be7eed 762 return 0;
1da177e4
LT
763}
764
64be7eed 765static struct freq_attr *acpi_cpufreq_attr[] = {
1da177e4
LT
766 &cpufreq_freq_attr_scaling_available_freqs,
767 NULL,
768};
769
770static struct cpufreq_driver acpi_cpufreq_driver = {
64be7eed
VP
771 .verify = acpi_cpufreq_verify,
772 .target = acpi_cpufreq_target,
64be7eed
VP
773 .init = acpi_cpufreq_cpu_init,
774 .exit = acpi_cpufreq_cpu_exit,
775 .resume = acpi_cpufreq_resume,
776 .name = "acpi-cpufreq",
777 .owner = THIS_MODULE,
778 .attr = acpi_cpufreq_attr,
1da177e4
LT
779};
780
64be7eed 781static int __init acpi_cpufreq_init(void)
1da177e4 782{
1da177e4
LT
783 dprintk("acpi_cpufreq_init\n");
784
fe27cb35 785 acpi_cpufreq_early_init();
09b4d1ee 786
64be7eed 787 return cpufreq_register_driver(&acpi_cpufreq_driver);
1da177e4
LT
788}
789
64be7eed 790static void __exit acpi_cpufreq_exit(void)
1da177e4 791{
64be7eed 792 unsigned int i;
1da177e4
LT
793 dprintk("acpi_cpufreq_exit\n");
794
795 cpufreq_unregister_driver(&acpi_cpufreq_driver);
796
fb1bb34d 797 for_each_possible_cpu(i) {
09b4d1ee
VP
798 kfree(acpi_perf_data[i]);
799 acpi_perf_data[i] = NULL;
800 }
1da177e4
LT
801 return;
802}
803
d395bf12 804module_param(acpi_pstate_strict, uint, 0644);
64be7eed 805MODULE_PARM_DESC(acpi_pstate_strict,
95dd7227
DJ
806 "value 0 or non-zero. non-zero -> strict ACPI checks are "
807 "performed during frequency changes.");
1da177e4
LT
808
809late_initcall(acpi_cpufreq_init);
810module_exit(acpi_cpufreq_exit);
811
812MODULE_ALIAS("acpi");