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1da177e4 | 1 | /* |
fe27cb35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $) |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
4e57b681 | 35 | #include <linux/sched.h> /* current */ |
8adcc0c6 | 36 | #include <linux/dmi.h> |
1da177e4 LT |
37 | |
38 | #include <linux/acpi.h> | |
39 | #include <acpi/processor.h> | |
40 | ||
fe27cb35 | 41 | #include <asm/io.h> |
dde9f7ba | 42 | #include <asm/msr.h> |
fe27cb35 VP |
43 | #include <asm/processor.h> |
44 | #include <asm/cpufeature.h> | |
45 | #include <asm/delay.h> | |
46 | #include <asm/uaccess.h> | |
47 | ||
1da177e4 LT |
48 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg) |
49 | ||
50 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); | |
51 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
52 | MODULE_LICENSE("GPL"); | |
53 | ||
54 | ||
dde9f7ba VP |
55 | enum { |
56 | UNDEFINED_CAPABLE = 0, | |
57 | SYSTEM_INTEL_MSR_CAPABLE, | |
58 | SYSTEM_IO_CAPABLE, | |
59 | }; | |
60 | ||
61 | #define INTEL_MSR_RANGE (0xffff) | |
62 | ||
fe27cb35 | 63 | struct acpi_cpufreq_data { |
09b4d1ee | 64 | struct acpi_processor_performance *acpi_data; |
1da177e4 LT |
65 | struct cpufreq_frequency_table *freq_table; |
66 | unsigned int resume; | |
dde9f7ba | 67 | unsigned int cpu_feature; |
1da177e4 LT |
68 | }; |
69 | ||
fe27cb35 | 70 | static struct acpi_cpufreq_data *drv_data[NR_CPUS]; |
09b4d1ee | 71 | static struct acpi_processor_performance *acpi_perf_data[NR_CPUS]; |
1da177e4 LT |
72 | |
73 | static struct cpufreq_driver acpi_cpufreq_driver; | |
74 | ||
d395bf12 VP |
75 | static unsigned int acpi_pstate_strict; |
76 | ||
dde9f7ba VP |
77 | |
78 | static int check_est_cpu(unsigned int cpuid) | |
79 | { | |
80 | struct cpuinfo_x86 *cpu = &cpu_data[cpuid]; | |
81 | ||
82 | if (cpu->x86_vendor != X86_VENDOR_INTEL || | |
83 | !cpu_has(cpu, X86_FEATURE_EST)) | |
84 | return 0; | |
85 | ||
86 | return 1; | |
87 | } | |
88 | ||
89 | ||
90 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) | |
fe27cb35 VP |
91 | { |
92 | struct acpi_processor_performance *perf; | |
93 | int i; | |
94 | ||
95 | perf = data->acpi_data; | |
96 | ||
97 | for (i = 0; i < perf->state_count; i++) { | |
98 | if (value == perf->states[i].status) | |
99 | return data->freq_table[i].frequency; | |
100 | } | |
101 | return 0; | |
102 | } | |
103 | ||
104 | ||
dde9f7ba VP |
105 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
106 | { | |
107 | int i; | |
108 | ||
109 | msr &= INTEL_MSR_RANGE; | |
110 | for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { | |
111 | if (msr == data->freq_table[i].index) | |
112 | return data->freq_table[i].frequency; | |
113 | } | |
114 | return data->freq_table[0].frequency; | |
115 | } | |
116 | ||
117 | ||
118 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) | |
119 | { | |
120 | switch (data->cpu_feature) { | |
121 | case SYSTEM_INTEL_MSR_CAPABLE: | |
122 | return extract_msr(val, data); | |
123 | case SYSTEM_IO_CAPABLE: | |
124 | return extract_io(val, data); | |
125 | default: | |
126 | return 0; | |
127 | } | |
128 | } | |
129 | ||
fe27cb35 | 130 | static void wrport(u16 port, u8 bit_width, u32 value) |
1da177e4 LT |
131 | { |
132 | if (bit_width <= 8) { | |
133 | outb(value, port); | |
134 | } else if (bit_width <= 16) { | |
135 | outw(value, port); | |
136 | } else if (bit_width <= 32) { | |
137 | outl(value, port); | |
1da177e4 | 138 | } |
1da177e4 LT |
139 | } |
140 | ||
fe27cb35 | 141 | static void rdport(u16 port, u8 bit_width, u32 *ret) |
1da177e4 LT |
142 | { |
143 | *ret = 0; | |
144 | if (bit_width <= 8) { | |
145 | *ret = inb(port); | |
146 | } else if (bit_width <= 16) { | |
147 | *ret = inw(port); | |
148 | } else if (bit_width <= 32) { | |
149 | *ret = inl(port); | |
1da177e4 | 150 | } |
1da177e4 LT |
151 | } |
152 | ||
dde9f7ba VP |
153 | struct msr_addr { |
154 | u32 reg; | |
155 | }; | |
156 | ||
fe27cb35 VP |
157 | struct io_addr { |
158 | u16 port; | |
159 | u8 bit_width; | |
160 | }; | |
161 | ||
dde9f7ba VP |
162 | typedef union { |
163 | struct msr_addr msr; | |
164 | struct io_addr io; | |
165 | } drv_addr_union; | |
166 | ||
fe27cb35 | 167 | struct drv_cmd { |
dde9f7ba | 168 | unsigned int type; |
fe27cb35 | 169 | cpumask_t mask; |
dde9f7ba | 170 | drv_addr_union addr; |
fe27cb35 VP |
171 | u32 val; |
172 | }; | |
173 | ||
174 | static void do_drv_read(struct drv_cmd *cmd) | |
1da177e4 | 175 | { |
dde9f7ba VP |
176 | u32 h; |
177 | ||
178 | switch (cmd->type) { | |
179 | case SYSTEM_INTEL_MSR_CAPABLE: | |
180 | rdmsr(cmd->addr.msr.reg, cmd->val, h); | |
181 | break; | |
182 | case SYSTEM_IO_CAPABLE: | |
183 | rdport(cmd->addr.io.port, cmd->addr.io.bit_width, &cmd->val); | |
184 | break; | |
185 | default: | |
186 | break; | |
187 | } | |
fe27cb35 | 188 | } |
1da177e4 | 189 | |
fe27cb35 VP |
190 | static void do_drv_write(struct drv_cmd *cmd) |
191 | { | |
dde9f7ba VP |
192 | u32 h = 0; |
193 | ||
194 | switch (cmd->type) { | |
195 | case SYSTEM_INTEL_MSR_CAPABLE: | |
196 | wrmsr(cmd->addr.msr.reg, cmd->val, h); | |
197 | break; | |
198 | case SYSTEM_IO_CAPABLE: | |
199 | wrport(cmd->addr.io.port, cmd->addr.io.bit_width, cmd->val); | |
200 | break; | |
201 | default: | |
202 | break; | |
203 | } | |
fe27cb35 | 204 | } |
1da177e4 | 205 | |
fe27cb35 VP |
206 | static inline void drv_read(struct drv_cmd *cmd) |
207 | { | |
208 | cpumask_t saved_mask = current->cpus_allowed; | |
209 | cmd->val = 0; | |
210 | ||
211 | set_cpus_allowed(current, cmd->mask); | |
212 | do_drv_read(cmd); | |
213 | set_cpus_allowed(current, saved_mask); | |
214 | ||
215 | } | |
216 | ||
217 | static void drv_write(struct drv_cmd *cmd) | |
218 | { | |
219 | cpumask_t saved_mask = current->cpus_allowed; | |
220 | unsigned int i; | |
221 | ||
222 | for_each_cpu_mask(i, cmd->mask) { | |
223 | set_cpus_allowed(current, cpumask_of_cpu(i)); | |
224 | do_drv_write(cmd); | |
1da177e4 LT |
225 | } |
226 | ||
fe27cb35 VP |
227 | set_cpus_allowed(current, saved_mask); |
228 | return; | |
229 | } | |
1da177e4 | 230 | |
fe27cb35 VP |
231 | static u32 get_cur_val(cpumask_t mask) |
232 | { | |
233 | struct acpi_processor_performance *perf; | |
234 | struct drv_cmd cmd; | |
1da177e4 | 235 | |
fe27cb35 VP |
236 | if (unlikely(cpus_empty(mask))) |
237 | return 0; | |
1da177e4 | 238 | |
dde9f7ba VP |
239 | switch (drv_data[first_cpu(mask)]->cpu_feature) { |
240 | case SYSTEM_INTEL_MSR_CAPABLE: | |
241 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
242 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
243 | break; | |
244 | case SYSTEM_IO_CAPABLE: | |
245 | cmd.type = SYSTEM_IO_CAPABLE; | |
246 | perf = drv_data[first_cpu(mask)]->acpi_data; | |
247 | cmd.addr.io.port = perf->control_register.address; | |
248 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
249 | break; | |
250 | default: | |
251 | return 0; | |
252 | } | |
253 | ||
fe27cb35 | 254 | cmd.mask = mask; |
1da177e4 | 255 | |
fe27cb35 | 256 | drv_read(&cmd); |
1da177e4 | 257 | |
fe27cb35 VP |
258 | dprintk("get_cur_val = %u\n", cmd.val); |
259 | ||
260 | return cmd.val; | |
261 | } | |
1da177e4 | 262 | |
fe27cb35 VP |
263 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
264 | { | |
265 | struct acpi_cpufreq_data *data = drv_data[cpu]; | |
266 | unsigned int freq; | |
267 | ||
268 | dprintk("get_cur_freq_on_cpu (%d)\n", cpu); | |
269 | ||
270 | if (unlikely(data == NULL || | |
271 | data->acpi_data == NULL || | |
272 | data->freq_table == NULL)) { | |
273 | return 0; | |
1da177e4 LT |
274 | } |
275 | ||
fe27cb35 VP |
276 | freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data); |
277 | dprintk("cur freq = %u\n", freq); | |
1da177e4 | 278 | |
fe27cb35 | 279 | return freq; |
1da177e4 LT |
280 | } |
281 | ||
fe27cb35 VP |
282 | static unsigned int check_freqs(cpumask_t mask, unsigned int freq, |
283 | struct acpi_cpufreq_data *data) | |
284 | { | |
285 | unsigned int cur_freq; | |
286 | unsigned int i; | |
1da177e4 | 287 | |
fe27cb35 VP |
288 | for (i = 0; i < 100; i++) { |
289 | cur_freq = extract_freq(get_cur_val(mask), data); | |
290 | if (cur_freq == freq) | |
291 | return 1; | |
292 | udelay(10); | |
293 | } | |
294 | return 0; | |
295 | } | |
296 | ||
297 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
298 | unsigned int target_freq, | |
299 | unsigned int relation) | |
1da177e4 | 300 | { |
fe27cb35 VP |
301 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
302 | struct acpi_processor_performance *perf; | |
303 | struct cpufreq_freqs freqs; | |
304 | cpumask_t online_policy_cpus; | |
305 | struct drv_cmd cmd; | |
dde9f7ba | 306 | unsigned int msr; |
fe27cb35 VP |
307 | unsigned int next_state = 0; |
308 | unsigned int next_perf_state = 0; | |
309 | unsigned int i; | |
310 | int result = 0; | |
311 | ||
312 | dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); | |
313 | ||
314 | if (unlikely(data == NULL || | |
315 | data->acpi_data == NULL || | |
316 | data->freq_table == NULL)) { | |
317 | return -ENODEV; | |
318 | } | |
1da177e4 | 319 | |
fe27cb35 | 320 | perf = data->acpi_data; |
1da177e4 | 321 | result = cpufreq_frequency_table_target(policy, |
fe27cb35 VP |
322 | data->freq_table, |
323 | target_freq, | |
324 | relation, | |
325 | &next_state); | |
09b4d1ee | 326 | if (unlikely(result)) |
fe27cb35 | 327 | return -ENODEV; |
09b4d1ee | 328 | |
7e1f19e5 | 329 | #ifdef CONFIG_HOTPLUG_CPU |
09b4d1ee VP |
330 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
331 | cpus_and(online_policy_cpus, cpu_online_map, policy->cpus); | |
7e1f19e5 AM |
332 | #else |
333 | online_policy_cpus = policy->cpus; | |
334 | #endif | |
1da177e4 | 335 | |
fe27cb35 VP |
336 | cmd.val = get_cur_val(online_policy_cpus); |
337 | freqs.old = extract_freq(cmd.val, data); | |
338 | freqs.new = data->freq_table[next_state].frequency; | |
339 | next_perf_state = data->freq_table[next_state].index; | |
340 | if (freqs.new == freqs.old) { | |
341 | if (unlikely(data->resume)) { | |
342 | dprintk("Called after resume, resetting to P%d\n", next_perf_state); | |
343 | data->resume = 0; | |
344 | } else { | |
345 | dprintk("Already at target state (P%d)\n", next_perf_state); | |
346 | return 0; | |
347 | } | |
09b4d1ee VP |
348 | } |
349 | ||
dde9f7ba VP |
350 | switch (data->cpu_feature) { |
351 | case SYSTEM_INTEL_MSR_CAPABLE: | |
352 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
353 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
354 | msr = (u32) perf->states[next_perf_state].control & INTEL_MSR_RANGE; | |
355 | cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr; | |
356 | break; | |
357 | case SYSTEM_IO_CAPABLE: | |
358 | cmd.type = SYSTEM_IO_CAPABLE; | |
359 | cmd.addr.io.port = perf->control_register.address; | |
360 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
361 | cmd.val = (u32) perf->states[next_perf_state].control; | |
362 | break; | |
363 | default: | |
364 | return -ENODEV; | |
365 | } | |
09b4d1ee | 366 | |
fe27cb35 | 367 | cpus_clear(cmd.mask); |
09b4d1ee | 368 | |
fe27cb35 VP |
369 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
370 | cmd.mask = online_policy_cpus; | |
371 | else | |
372 | cpu_set(policy->cpu, cmd.mask); | |
09b4d1ee | 373 | |
fe27cb35 VP |
374 | for_each_cpu_mask(i, cmd.mask) { |
375 | freqs.cpu = i; | |
376 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 377 | } |
1da177e4 | 378 | |
fe27cb35 | 379 | drv_write(&cmd); |
09b4d1ee | 380 | |
fe27cb35 VP |
381 | if (acpi_pstate_strict) { |
382 | if (!check_freqs(cmd.mask, freqs.new, data)) { | |
383 | dprintk("acpi_cpufreq_target failed (%d)\n", | |
384 | policy->cpu); | |
385 | return -EAGAIN; | |
09b4d1ee VP |
386 | } |
387 | } | |
388 | ||
fe27cb35 VP |
389 | for_each_cpu_mask(i, cmd.mask) { |
390 | freqs.cpu = i; | |
391 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
392 | } | |
393 | perf->state = next_perf_state; | |
394 | ||
395 | return result; | |
1da177e4 LT |
396 | } |
397 | ||
398 | ||
399 | static int | |
400 | acpi_cpufreq_verify ( | |
401 | struct cpufreq_policy *policy) | |
402 | { | |
fe27cb35 | 403 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 LT |
404 | |
405 | dprintk("acpi_cpufreq_verify\n"); | |
406 | ||
fe27cb35 | 407 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
408 | } |
409 | ||
410 | ||
411 | static unsigned long | |
412 | acpi_cpufreq_guess_freq ( | |
fe27cb35 | 413 | struct acpi_cpufreq_data *data, |
1da177e4 LT |
414 | unsigned int cpu) |
415 | { | |
09b4d1ee VP |
416 | struct acpi_processor_performance *perf = data->acpi_data; |
417 | ||
1da177e4 LT |
418 | if (cpu_khz) { |
419 | /* search the closest match to cpu_khz */ | |
420 | unsigned int i; | |
421 | unsigned long freq; | |
09b4d1ee | 422 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 423 | |
09b4d1ee | 424 | for (i = 0; i < (perf->state_count - 1); i++) { |
1da177e4 | 425 | freq = freqn; |
09b4d1ee | 426 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 427 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 428 | perf->state = i; |
1da177e4 LT |
429 | return (freq); |
430 | } | |
431 | } | |
09b4d1ee | 432 | perf->state = perf->state_count - 1; |
1da177e4 | 433 | return (freqn); |
09b4d1ee | 434 | } else { |
1da177e4 | 435 | /* assume CPU is at P0... */ |
09b4d1ee VP |
436 | perf->state = 0; |
437 | return perf->states[0].core_frequency * 1000; | |
438 | } | |
1da177e4 LT |
439 | } |
440 | ||
441 | ||
09b4d1ee VP |
442 | /* |
443 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
444 | * | |
445 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
446 | * in order to determine correct frequency and voltage pairings. We can | |
447 | * do _PDC and _PSD and find out the processor dependency for the | |
448 | * actual init that will happen later... | |
449 | */ | |
fe27cb35 | 450 | static int acpi_cpufreq_early_init(void) |
09b4d1ee VP |
451 | { |
452 | struct acpi_processor_performance *data; | |
fe27cb35 | 453 | cpumask_t covered; |
09b4d1ee VP |
454 | unsigned int i, j; |
455 | ||
456 | dprintk("acpi_cpufreq_early_init\n"); | |
457 | ||
fb1bb34d | 458 | for_each_possible_cpu(i) { |
09b4d1ee VP |
459 | data = kzalloc(sizeof(struct acpi_processor_performance), |
460 | GFP_KERNEL); | |
461 | if (!data) { | |
fe27cb35 | 462 | for_each_cpu_mask(j, covered) { |
09b4d1ee VP |
463 | kfree(acpi_perf_data[j]); |
464 | acpi_perf_data[j] = NULL; | |
465 | } | |
466 | return (-ENOMEM); | |
467 | } | |
468 | acpi_perf_data[i] = data; | |
fe27cb35 | 469 | cpu_set(i, covered); |
09b4d1ee VP |
470 | } |
471 | ||
472 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
473 | acpi_processor_preregister_performance(acpi_perf_data); |
474 | return 0; | |
09b4d1ee VP |
475 | } |
476 | ||
8adcc0c6 VP |
477 | /* |
478 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
479 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
480 | * detected, this has a side effect of making CPU run at a different speed | |
481 | * than OS intended it to run at. Detect it and handle it cleanly. | |
482 | */ | |
483 | static int bios_with_sw_any_bug; | |
484 | ||
0497c8ca | 485 | static int sw_any_bug_found(struct dmi_system_id *d) |
8adcc0c6 VP |
486 | { |
487 | bios_with_sw_any_bug = 1; | |
488 | return 0; | |
489 | } | |
490 | ||
0497c8ca | 491 | static struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
492 | { |
493 | .callback = sw_any_bug_found, | |
494 | .ident = "Supermicro Server X6DLP", | |
495 | .matches = { | |
496 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
497 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
498 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
499 | }, | |
500 | }, | |
501 | { } | |
502 | }; | |
503 | ||
1da177e4 LT |
504 | static int |
505 | acpi_cpufreq_cpu_init ( | |
506 | struct cpufreq_policy *policy) | |
507 | { | |
fe27cb35 VP |
508 | unsigned int i; |
509 | unsigned int valid_states = 0; | |
510 | unsigned int cpu = policy->cpu; | |
511 | struct acpi_cpufreq_data *data; | |
dde9f7ba | 512 | unsigned int l, h; |
fe27cb35 VP |
513 | unsigned int result = 0; |
514 | struct cpuinfo_x86 *c = &cpu_data[policy->cpu]; | |
09b4d1ee | 515 | struct acpi_processor_performance *perf; |
1da177e4 | 516 | |
1da177e4 | 517 | dprintk("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 518 | |
09b4d1ee VP |
519 | if (!acpi_perf_data[cpu]) |
520 | return (-ENODEV); | |
521 | ||
fe27cb35 | 522 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 LT |
523 | if (!data) |
524 | return (-ENOMEM); | |
1da177e4 | 525 | |
09b4d1ee | 526 | data->acpi_data = acpi_perf_data[cpu]; |
fe27cb35 | 527 | drv_data[cpu] = data; |
1da177e4 | 528 | |
fe27cb35 VP |
529 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) { |
530 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; | |
531 | } | |
1da177e4 | 532 | |
fe27cb35 | 533 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
534 | if (result) |
535 | goto err_free; | |
536 | ||
09b4d1ee | 537 | perf = data->acpi_data; |
09b4d1ee | 538 | policy->shared_type = perf->shared_type; |
46f18e3a VP |
539 | /* |
540 | * Will let policy->cpus know about dependency only when software | |
541 | * coordination is required. | |
542 | */ | |
543 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 544 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
46f18e3a | 545 | policy->cpus = perf->shared_cpu_map; |
8adcc0c6 VP |
546 | } |
547 | ||
548 | #ifdef CONFIG_SMP | |
549 | dmi_check_system(sw_any_bug_dmi_table); | |
550 | if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) { | |
551 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
552 | policy->cpus = cpu_core_map[cpu]; | |
553 | } | |
554 | #endif | |
09b4d1ee | 555 | |
1da177e4 | 556 | /* capability check */ |
09b4d1ee | 557 | if (perf->state_count <= 1) { |
1da177e4 LT |
558 | dprintk("No P-States\n"); |
559 | result = -ENODEV; | |
560 | goto err_unreg; | |
561 | } | |
09b4d1ee | 562 | |
fe27cb35 VP |
563 | if (perf->control_register.space_id != perf->status_register.space_id) { |
564 | result = -ENODEV; | |
565 | goto err_unreg; | |
566 | } | |
567 | ||
568 | switch (perf->control_register.space_id) { | |
569 | case ACPI_ADR_SPACE_SYSTEM_IO: | |
570 | dprintk("SYSTEM IO addr space\n"); | |
dde9f7ba VP |
571 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
572 | break; | |
573 | case ACPI_ADR_SPACE_FIXED_HARDWARE: | |
574 | dprintk("HARDWARE addr space\n"); | |
575 | if (!check_est_cpu(cpu)) { | |
576 | result = -ENODEV; | |
577 | goto err_unreg; | |
578 | } | |
579 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 VP |
580 | break; |
581 | default: | |
582 | dprintk("Unknown addr space %d\n", | |
583 | (u32) (perf->control_register.space_id)); | |
1da177e4 LT |
584 | result = -ENODEV; |
585 | goto err_unreg; | |
586 | } | |
587 | ||
09b4d1ee | 588 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * (perf->state_count + 1), GFP_KERNEL); |
1da177e4 LT |
589 | if (!data->freq_table) { |
590 | result = -ENOMEM; | |
591 | goto err_unreg; | |
592 | } | |
593 | ||
594 | /* detect transition latency */ | |
595 | policy->cpuinfo.transition_latency = 0; | |
09b4d1ee VP |
596 | for (i=0; i<perf->state_count; i++) { |
597 | if ((perf->states[i].transition_latency * 1000) > policy->cpuinfo.transition_latency) | |
598 | policy->cpuinfo.transition_latency = perf->states[i].transition_latency * 1000; | |
1da177e4 LT |
599 | } |
600 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
601 | ||
1da177e4 | 602 | /* table init */ |
fe27cb35 | 603 | for (i=0; i<perf->state_count; i++) |
1da177e4 | 604 | { |
fe27cb35 VP |
605 | if ( i > 0 && perf->states[i].core_frequency == |
606 | perf->states[i - 1].core_frequency) | |
607 | continue; | |
608 | ||
609 | data->freq_table[valid_states].index = i; | |
610 | data->freq_table[valid_states].frequency = | |
611 | perf->states[i].core_frequency * 1000; | |
612 | valid_states++; | |
1da177e4 | 613 | } |
fe27cb35 | 614 | data->freq_table[perf->state_count].frequency = CPUFREQ_TABLE_END; |
1da177e4 LT |
615 | |
616 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
617 | if (result) { | |
618 | goto err_freqfree; | |
619 | } | |
620 | ||
dde9f7ba VP |
621 | switch (data->cpu_feature) { |
622 | case ACPI_ADR_SPACE_SYSTEM_IO: | |
623 | /* Current speed is unknown and not detectable by IO port */ | |
624 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
625 | break; | |
626 | case ACPI_ADR_SPACE_FIXED_HARDWARE: | |
627 | get_cur_freq_on_cpu(cpu); | |
628 | break; | |
629 | default: | |
630 | break; | |
631 | } | |
632 | ||
1da177e4 LT |
633 | /* notify BIOS that we exist */ |
634 | acpi_processor_notify_smm(THIS_MODULE); | |
635 | ||
fe27cb35 | 636 | dprintk("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 637 | for (i = 0; i < perf->state_count; i++) |
1da177e4 | 638 | dprintk(" %cP%d: %d MHz, %d mW, %d uS\n", |
09b4d1ee VP |
639 | (i == perf->state?'*':' '), i, |
640 | (u32) perf->states[i].core_frequency, | |
641 | (u32) perf->states[i].power, | |
642 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
643 | |
644 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
4b31e774 DB |
645 | |
646 | /* | |
647 | * the first call to ->target() should result in us actually | |
648 | * writing something to the appropriate registers. | |
649 | */ | |
650 | data->resume = 1; | |
651 | ||
fe27cb35 | 652 | return result; |
1da177e4 LT |
653 | |
654 | err_freqfree: | |
655 | kfree(data->freq_table); | |
656 | err_unreg: | |
09b4d1ee | 657 | acpi_processor_unregister_performance(perf, cpu); |
1da177e4 LT |
658 | err_free: |
659 | kfree(data); | |
fe27cb35 | 660 | drv_data[cpu] = NULL; |
1da177e4 LT |
661 | |
662 | return (result); | |
663 | } | |
664 | ||
665 | ||
666 | static int | |
667 | acpi_cpufreq_cpu_exit ( | |
668 | struct cpufreq_policy *policy) | |
669 | { | |
fe27cb35 | 670 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 LT |
671 | |
672 | ||
673 | dprintk("acpi_cpufreq_cpu_exit\n"); | |
674 | ||
675 | if (data) { | |
676 | cpufreq_frequency_table_put_attr(policy->cpu); | |
fe27cb35 | 677 | drv_data[policy->cpu] = NULL; |
09b4d1ee | 678 | acpi_processor_unregister_performance(data->acpi_data, policy->cpu); |
1da177e4 LT |
679 | kfree(data); |
680 | } | |
681 | ||
682 | return (0); | |
683 | } | |
684 | ||
685 | static int | |
686 | acpi_cpufreq_resume ( | |
687 | struct cpufreq_policy *policy) | |
688 | { | |
fe27cb35 | 689 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 LT |
690 | |
691 | ||
692 | dprintk("acpi_cpufreq_resume\n"); | |
693 | ||
694 | data->resume = 1; | |
695 | ||
696 | return (0); | |
697 | } | |
698 | ||
699 | ||
700 | static struct freq_attr* acpi_cpufreq_attr[] = { | |
701 | &cpufreq_freq_attr_scaling_available_freqs, | |
702 | NULL, | |
703 | }; | |
704 | ||
705 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
911cb74b DJ |
706 | .verify = acpi_cpufreq_verify, |
707 | .target = acpi_cpufreq_target, | |
fe27cb35 | 708 | .get = get_cur_freq_on_cpu, |
911cb74b DJ |
709 | .init = acpi_cpufreq_cpu_init, |
710 | .exit = acpi_cpufreq_cpu_exit, | |
711 | .resume = acpi_cpufreq_resume, | |
712 | .name = "acpi-cpufreq", | |
713 | .owner = THIS_MODULE, | |
714 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
715 | }; |
716 | ||
717 | ||
718 | static int __init | |
719 | acpi_cpufreq_init (void) | |
720 | { | |
1da177e4 LT |
721 | dprintk("acpi_cpufreq_init\n"); |
722 | ||
fe27cb35 | 723 | acpi_cpufreq_early_init(); |
09b4d1ee | 724 | |
dde9f7ba | 725 | return cpufreq_register_driver(&acpi_cpufreq_driver); |
1da177e4 LT |
726 | } |
727 | ||
728 | ||
729 | static void __exit | |
730 | acpi_cpufreq_exit (void) | |
731 | { | |
09b4d1ee | 732 | unsigned int i; |
1da177e4 LT |
733 | dprintk("acpi_cpufreq_exit\n"); |
734 | ||
735 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
736 | ||
fb1bb34d | 737 | for_each_possible_cpu(i) { |
09b4d1ee VP |
738 | kfree(acpi_perf_data[i]); |
739 | acpi_perf_data[i] = NULL; | |
740 | } | |
1da177e4 LT |
741 | return; |
742 | } | |
743 | ||
d395bf12 VP |
744 | module_param(acpi_pstate_strict, uint, 0644); |
745 | MODULE_PARM_DESC(acpi_pstate_strict, "value 0 or non-zero. non-zero -> strict ACPI checks are performed during frequency changes."); | |
1da177e4 LT |
746 | |
747 | late_initcall(acpi_cpufreq_init); | |
748 | module_exit(acpi_cpufreq_exit); | |
749 | ||
750 | MODULE_ALIAS("acpi"); |