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1da177e4 LT |
1 | /* |
2 | * (C) 2001 Dave Jones, Arjan van de ven. | |
3 | * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> | |
4 | * | |
5 | * Licensed under the terms of the GNU GPL License version 2. | |
6 | * Based upon reverse engineered information, and on Intel documentation | |
7 | * for chipsets ICH2-M and ICH3-M. | |
8 | * | |
9 | * Many thanks to Ducrot Bruno for finding and fixing the last | |
10 | * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler | |
11 | * for extensive testing. | |
12 | * | |
13 | * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* | |
14 | */ | |
15 | ||
16 | ||
17 | /********************************************************************* | |
18 | * SPEEDSTEP - DEFINITIONS * | |
19 | *********************************************************************/ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/cpufreq.h> | |
25 | #include <linux/pci.h> | |
26 | #include <linux/slab.h> | |
27 | ||
28 | #include "speedstep-lib.h" | |
29 | ||
30 | ||
31 | /* speedstep_chipset: | |
32 | * It is necessary to know which chipset is used. As accesses to | |
33 | * this device occur at various places in this module, we need a | |
34 | * static struct pci_dev * pointing to that device. | |
35 | */ | |
36 | static struct pci_dev *speedstep_chipset_dev; | |
37 | ||
38 | ||
39 | /* speedstep_processor | |
40 | */ | |
41 | static unsigned int speedstep_processor = 0; | |
42 | ||
43 | ||
44 | /* | |
45 | * There are only two frequency states for each processor. Values | |
46 | * are in kHz for the time being. | |
47 | */ | |
48 | static struct cpufreq_frequency_table speedstep_freqs[] = { | |
49 | {SPEEDSTEP_HIGH, 0}, | |
50 | {SPEEDSTEP_LOW, 0}, | |
51 | {0, CPUFREQ_TABLE_END}, | |
52 | }; | |
53 | ||
54 | ||
55 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg) | |
56 | ||
57 | ||
58 | /** | |
59 | * speedstep_set_state - set the SpeedStep state | |
60 | * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH) | |
61 | * | |
62 | * Tries to change the SpeedStep state. | |
63 | */ | |
64 | static void speedstep_set_state (unsigned int state) | |
65 | { | |
66 | u32 pmbase; | |
67 | u8 pm2_blk; | |
68 | u8 value; | |
69 | unsigned long flags; | |
70 | ||
71 | if (!speedstep_chipset_dev || (state > 0x1)) | |
72 | return; | |
73 | ||
74 | /* get PMBASE */ | |
75 | pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase); | |
76 | if (!(pmbase & 0x01)) { | |
77 | printk(KERN_ERR "speedstep-ich: could not find speedstep register\n"); | |
78 | return; | |
79 | } | |
80 | ||
81 | pmbase &= 0xFFFFFFFE; | |
82 | if (!pmbase) { | |
83 | printk(KERN_ERR "speedstep-ich: could not find speedstep register\n"); | |
84 | return; | |
85 | } | |
86 | ||
87 | /* Disable IRQs */ | |
88 | local_irq_save(flags); | |
89 | ||
90 | /* read state */ | |
91 | value = inb(pmbase + 0x50); | |
92 | ||
93 | dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); | |
94 | ||
95 | /* write new state */ | |
96 | value &= 0xFE; | |
97 | value |= state; | |
98 | ||
99 | dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase); | |
100 | ||
101 | /* Disable bus master arbitration */ | |
102 | pm2_blk = inb(pmbase + 0x20); | |
103 | pm2_blk |= 0x01; | |
104 | outb(pm2_blk, (pmbase + 0x20)); | |
105 | ||
106 | /* Actual transition */ | |
107 | outb(value, (pmbase + 0x50)); | |
108 | ||
109 | /* Restore bus master arbitration */ | |
110 | pm2_blk &= 0xfe; | |
111 | outb(pm2_blk, (pmbase + 0x20)); | |
112 | ||
113 | /* check if transition was successful */ | |
114 | value = inb(pmbase + 0x50); | |
115 | ||
116 | /* Enable IRQs */ | |
117 | local_irq_restore(flags); | |
118 | ||
119 | dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); | |
120 | ||
121 | if (state == (value & 0x1)) { | |
122 | dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000)); | |
123 | } else { | |
124 | printk (KERN_ERR "cpufreq: change failed - I/O error\n"); | |
125 | } | |
126 | ||
127 | return; | |
128 | } | |
129 | ||
130 | ||
131 | /** | |
132 | * speedstep_activate - activate SpeedStep control in the chipset | |
133 | * | |
134 | * Tries to activate the SpeedStep status and control registers. | |
135 | * Returns -EINVAL on an unsupported chipset, and zero on success. | |
136 | */ | |
137 | static int speedstep_activate (void) | |
138 | { | |
139 | u16 value = 0; | |
140 | ||
141 | if (!speedstep_chipset_dev) | |
142 | return -EINVAL; | |
143 | ||
144 | pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value); | |
145 | if (!(value & 0x08)) { | |
146 | value |= 0x08; | |
147 | dprintk("activating SpeedStep (TM) registers\n"); | |
148 | pci_write_config_word(speedstep_chipset_dev, 0x00A0, value); | |
149 | } | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | ||
155 | /** | |
156 | * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic | |
157 | * | |
158 | * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to | |
159 | * the LPC bridge / PM module which contains all power-management | |
160 | * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected | |
161 | * chipset, or zero on failure. | |
162 | */ | |
163 | static unsigned int speedstep_detect_chipset (void) | |
164 | { | |
165 | speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
166 | PCI_DEVICE_ID_INTEL_82801DB_12, | |
167 | PCI_ANY_ID, | |
168 | PCI_ANY_ID, | |
169 | NULL); | |
170 | if (speedstep_chipset_dev) | |
171 | return 4; /* 4-M */ | |
172 | ||
173 | speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
174 | PCI_DEVICE_ID_INTEL_82801CA_12, | |
175 | PCI_ANY_ID, | |
176 | PCI_ANY_ID, | |
177 | NULL); | |
178 | if (speedstep_chipset_dev) | |
179 | return 3; /* 3-M */ | |
180 | ||
181 | ||
182 | speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
183 | PCI_DEVICE_ID_INTEL_82801BA_10, | |
184 | PCI_ANY_ID, | |
185 | PCI_ANY_ID, | |
186 | NULL); | |
187 | if (speedstep_chipset_dev) { | |
188 | /* speedstep.c causes lockups on Dell Inspirons 8000 and | |
189 | * 8100 which use a pretty old revision of the 82815 | |
190 | * host brige. Abort on these systems. | |
191 | */ | |
192 | static struct pci_dev *hostbridge; | |
193 | u8 rev = 0; | |
194 | ||
195 | hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
196 | PCI_DEVICE_ID_INTEL_82815_MC, | |
197 | PCI_ANY_ID, | |
198 | PCI_ANY_ID, | |
199 | NULL); | |
200 | ||
201 | if (!hostbridge) | |
202 | return 2; /* 2-M */ | |
203 | ||
204 | pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev); | |
205 | if (rev < 5) { | |
206 | dprintk("hostbridge does not support speedstep\n"); | |
207 | speedstep_chipset_dev = NULL; | |
208 | pci_dev_put(hostbridge); | |
209 | return 0; | |
210 | } | |
211 | ||
212 | pci_dev_put(hostbridge); | |
213 | return 2; /* 2-M */ | |
214 | } | |
215 | ||
216 | return 0; | |
217 | } | |
218 | ||
219 | static unsigned int _speedstep_get(cpumask_t cpus) | |
220 | { | |
221 | unsigned int speed; | |
222 | cpumask_t cpus_allowed; | |
223 | ||
224 | cpus_allowed = current->cpus_allowed; | |
225 | set_cpus_allowed(current, cpus); | |
226 | speed = speedstep_get_processor_frequency(speedstep_processor); | |
227 | set_cpus_allowed(current, cpus_allowed); | |
228 | dprintk("detected %u kHz as current frequency\n", speed); | |
229 | return speed; | |
230 | } | |
231 | ||
232 | static unsigned int speedstep_get(unsigned int cpu) | |
233 | { | |
234 | return _speedstep_get(cpumask_of_cpu(cpu)); | |
235 | } | |
236 | ||
237 | /** | |
238 | * speedstep_target - set a new CPUFreq policy | |
239 | * @policy: new policy | |
240 | * @target_freq: the target frequency | |
241 | * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) | |
242 | * | |
243 | * Sets a new CPUFreq policy. | |
244 | */ | |
245 | static int speedstep_target (struct cpufreq_policy *policy, | |
246 | unsigned int target_freq, | |
247 | unsigned int relation) | |
248 | { | |
249 | unsigned int newstate = 0; | |
250 | struct cpufreq_freqs freqs; | |
251 | cpumask_t cpus_allowed; | |
252 | int i; | |
253 | ||
254 | if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate)) | |
255 | return -EINVAL; | |
256 | ||
257 | freqs.old = _speedstep_get(policy->cpus); | |
258 | freqs.new = speedstep_freqs[newstate].frequency; | |
259 | freqs.cpu = policy->cpu; | |
260 | ||
261 | dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new); | |
262 | ||
263 | /* no transition necessary */ | |
264 | if (freqs.old == freqs.new) | |
265 | return 0; | |
266 | ||
267 | cpus_allowed = current->cpus_allowed; | |
268 | ||
269 | for_each_cpu_mask(i, policy->cpus) { | |
270 | freqs.cpu = i; | |
271 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
272 | } | |
273 | ||
274 | /* switch to physical CPU where state is to be changed */ | |
275 | set_cpus_allowed(current, policy->cpus); | |
276 | ||
277 | speedstep_set_state(newstate); | |
278 | ||
279 | /* allow to be run on all CPUs */ | |
280 | set_cpus_allowed(current, cpus_allowed); | |
281 | ||
282 | for_each_cpu_mask(i, policy->cpus) { | |
283 | freqs.cpu = i; | |
284 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
285 | } | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | ||
291 | /** | |
292 | * speedstep_verify - verifies a new CPUFreq policy | |
293 | * @policy: new policy | |
294 | * | |
295 | * Limit must be within speedstep_low_freq and speedstep_high_freq, with | |
296 | * at least one border included. | |
297 | */ | |
298 | static int speedstep_verify (struct cpufreq_policy *policy) | |
299 | { | |
300 | return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]); | |
301 | } | |
302 | ||
303 | ||
304 | static int speedstep_cpu_init(struct cpufreq_policy *policy) | |
305 | { | |
306 | int result = 0; | |
307 | unsigned int speed; | |
308 | cpumask_t cpus_allowed; | |
309 | ||
310 | /* only run on CPU to be set, or on its sibling */ | |
311 | #ifdef CONFIG_SMP | |
312 | policy->cpus = cpu_sibling_map[policy->cpu]; | |
313 | #endif | |
314 | ||
315 | cpus_allowed = current->cpus_allowed; | |
316 | set_cpus_allowed(current, policy->cpus); | |
317 | ||
318 | /* detect low and high frequency */ | |
319 | result = speedstep_get_freqs(speedstep_processor, | |
320 | &speedstep_freqs[SPEEDSTEP_LOW].frequency, | |
321 | &speedstep_freqs[SPEEDSTEP_HIGH].frequency, | |
322 | &speedstep_set_state); | |
323 | set_cpus_allowed(current, cpus_allowed); | |
324 | if (result) | |
325 | return result; | |
326 | ||
327 | /* get current speed setting */ | |
328 | speed = _speedstep_get(policy->cpus); | |
329 | if (!speed) | |
330 | return -EIO; | |
331 | ||
332 | dprintk("currently at %s speed setting - %i MHz\n", | |
333 | (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high", | |
334 | (speed / 1000)); | |
335 | ||
336 | /* cpuinfo and default policy values */ | |
337 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
338 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; | |
339 | policy->cur = speed; | |
340 | ||
341 | result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs); | |
342 | if (result) | |
343 | return (result); | |
344 | ||
345 | cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu); | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | ||
351 | static int speedstep_cpu_exit(struct cpufreq_policy *policy) | |
352 | { | |
353 | cpufreq_frequency_table_put_attr(policy->cpu); | |
354 | return 0; | |
355 | } | |
356 | ||
357 | static struct freq_attr* speedstep_attr[] = { | |
358 | &cpufreq_freq_attr_scaling_available_freqs, | |
359 | NULL, | |
360 | }; | |
361 | ||
362 | ||
363 | static struct cpufreq_driver speedstep_driver = { | |
364 | .name = "speedstep-ich", | |
365 | .verify = speedstep_verify, | |
366 | .target = speedstep_target, | |
367 | .init = speedstep_cpu_init, | |
368 | .exit = speedstep_cpu_exit, | |
369 | .get = speedstep_get, | |
370 | .owner = THIS_MODULE, | |
371 | .attr = speedstep_attr, | |
372 | }; | |
373 | ||
374 | ||
375 | /** | |
376 | * speedstep_init - initializes the SpeedStep CPUFreq driver | |
377 | * | |
378 | * Initializes the SpeedStep support. Returns -ENODEV on unsupported | |
379 | * devices, -EINVAL on problems during initiatization, and zero on | |
380 | * success. | |
381 | */ | |
382 | static int __init speedstep_init(void) | |
383 | { | |
384 | /* detect processor */ | |
385 | speedstep_processor = speedstep_detect_processor(); | |
386 | if (!speedstep_processor) { | |
387 | dprintk("Intel(R) SpeedStep(TM) capable processor not found\n"); | |
388 | return -ENODEV; | |
389 | } | |
390 | ||
391 | /* detect chipset */ | |
392 | if (!speedstep_detect_chipset()) { | |
393 | dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n"); | |
394 | return -ENODEV; | |
395 | } | |
396 | ||
397 | /* activate speedstep support */ | |
398 | if (speedstep_activate()) { | |
399 | pci_dev_put(speedstep_chipset_dev); | |
400 | return -EINVAL; | |
401 | } | |
402 | ||
403 | return cpufreq_register_driver(&speedstep_driver); | |
404 | } | |
405 | ||
406 | ||
407 | /** | |
408 | * speedstep_exit - unregisters SpeedStep support | |
409 | * | |
410 | * Unregisters SpeedStep support. | |
411 | */ | |
412 | static void __exit speedstep_exit(void) | |
413 | { | |
414 | pci_dev_put(speedstep_chipset_dev); | |
415 | cpufreq_unregister_driver(&speedstep_driver); | |
416 | } | |
417 | ||
418 | ||
419 | MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>"); | |
420 | MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges."); | |
421 | MODULE_LICENSE ("GPL"); | |
422 | ||
423 | module_init(speedstep_init); | |
424 | module_exit(speedstep_exit); |