]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - arch/i386/kernel/irq.c
[PATCH] small fix for not releasing the mmap semaphore in i386/arch_setup_additional_...
[mirror_ubuntu-jammy-kernel.git] / arch / i386 / kernel / irq.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/i386/kernel/irq.c
3 *
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5 *
6 * This file contains the lowest level x86-specific interrupt
7 * entry, irq-stacks and irq statistics code. All the remaining
8 * irq logic is done by the generic kernel/irq/ code and
9 * by the x86-specific irq controller code. (e.g. i8259.c and
10 * io_apic.c.)
11 */
12
13#include <asm/uaccess.h>
14#include <linux/module.h>
15#include <linux/seq_file.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
f3705136
ZM
18#include <linux/notifier.h>
19#include <linux/cpu.h>
20#include <linux/delay.h>
1da177e4 21
22fc6ecc 22DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
1da177e4
LT
23EXPORT_PER_CPU_SYMBOL(irq_stat);
24
25#ifndef CONFIG_X86_LOCAL_APIC
26/*
27 * 'what should we do if we get a hw irq event on an illegal vector'.
28 * each architecture has to answer this themselves.
29 */
30void ack_bad_irq(unsigned int irq)
31{
32 printk("unexpected IRQ trap at vector %02x\n", irq);
33}
34#endif
35
36#ifdef CONFIG_4KSTACKS
37/*
38 * per-CPU IRQ handling contexts (thread information and stack)
39 */
40union irq_ctx {
41 struct thread_info tinfo;
42 u32 stack[THREAD_SIZE/sizeof(u32)];
43};
44
22722051
AM
45static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
46static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
1da177e4
LT
47#endif
48
49/*
50 * do_IRQ handles all normal device IRQ's (the special
51 * SMP cross-CPU interrupts have their own specific
52 * handlers).
53 */
54fastcall unsigned int do_IRQ(struct pt_regs *regs)
55{
19eadf98
RR
56 /* high bit used in ret_from_ code */
57 int irq = ~regs->orig_eax;
1da177e4
LT
58#ifdef CONFIG_4KSTACKS
59 union irq_ctx *curctx, *irqctx;
60 u32 *isp;
61#endif
62
63 irq_enter();
64#ifdef CONFIG_DEBUG_STACKOVERFLOW
65 /* Debugging check for stack overflow: is there less than 1KB free? */
66 {
67 long esp;
68
69 __asm__ __volatile__("andl %%esp,%0" :
70 "=r" (esp) : "0" (THREAD_SIZE - 1));
71 if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
72 printk("do_IRQ: stack overflow: %ld\n",
73 esp - sizeof(struct thread_info));
74 dump_stack();
75 }
76 }
77#endif
78
79#ifdef CONFIG_4KSTACKS
80
81 curctx = (union irq_ctx *) current_thread_info();
82 irqctx = hardirq_ctx[smp_processor_id()];
83
84 /*
85 * this is where we switch to the IRQ stack. However, if we are
86 * already using the IRQ stack (because we interrupted a hardirq
87 * handler) we can't do that and just have to keep using the
88 * current stack (which is the irq stack already after all)
89 */
90 if (curctx != irqctx) {
91 int arg1, arg2, ebx;
92
93 /* build the stack frame on the IRQ stack */
94 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
95 irqctx->tinfo.task = curctx->tinfo.task;
96 irqctx->tinfo.previous_esp = current_stack_pointer;
97
a5d157e0
BS
98 /*
99 * Copy the softirq bits in preempt_count so that the
100 * softirq checks work in the hardirq context.
101 */
102 irqctx->tinfo.preempt_count =
91bf4602
AM
103 (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
104 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
a5d157e0 105
1da177e4
LT
106 asm volatile(
107 " xchgl %%ebx,%%esp \n"
108 " call __do_IRQ \n"
109 " movl %%ebx,%%esp \n"
110 : "=a" (arg1), "=d" (arg2), "=b" (ebx)
111 : "0" (irq), "1" (regs), "2" (isp)
112 : "memory", "cc", "ecx"
113 );
114 } else
115#endif
116 __do_IRQ(irq, regs);
117
118 irq_exit();
119
120 return 1;
121}
122
123#ifdef CONFIG_4KSTACKS
124
125/*
126 * These should really be __section__(".bss.page_aligned") as well, but
127 * gcc's 3.0 and earlier don't handle that correctly.
128 */
129static char softirq_stack[NR_CPUS * THREAD_SIZE]
130 __attribute__((__aligned__(THREAD_SIZE)));
131
132static char hardirq_stack[NR_CPUS * THREAD_SIZE]
133 __attribute__((__aligned__(THREAD_SIZE)));
134
135/*
136 * allocate per-cpu stacks for hardirq and for softirq processing
137 */
138void irq_ctx_init(int cpu)
139{
140 union irq_ctx *irqctx;
141
142 if (hardirq_ctx[cpu])
143 return;
144
145 irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
146 irqctx->tinfo.task = NULL;
147 irqctx->tinfo.exec_domain = NULL;
148 irqctx->tinfo.cpu = cpu;
149 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
150 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
151
152 hardirq_ctx[cpu] = irqctx;
153
154 irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
155 irqctx->tinfo.task = NULL;
156 irqctx->tinfo.exec_domain = NULL;
157 irqctx->tinfo.cpu = cpu;
158 irqctx->tinfo.preempt_count = SOFTIRQ_OFFSET;
159 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
160
161 softirq_ctx[cpu] = irqctx;
162
163 printk("CPU %u irqstacks, hard=%p soft=%p\n",
164 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
165}
166
e1367daf
LS
167void irq_ctx_exit(int cpu)
168{
169 hardirq_ctx[cpu] = NULL;
170}
171
1da177e4
LT
172extern asmlinkage void __do_softirq(void);
173
174asmlinkage void do_softirq(void)
175{
176 unsigned long flags;
177 struct thread_info *curctx;
178 union irq_ctx *irqctx;
179 u32 *isp;
180
181 if (in_interrupt())
182 return;
183
184 local_irq_save(flags);
185
186 if (local_softirq_pending()) {
187 curctx = current_thread_info();
188 irqctx = softirq_ctx[smp_processor_id()];
189 irqctx->tinfo.task = curctx->task;
190 irqctx->tinfo.previous_esp = current_stack_pointer;
191
192 /* build the stack frame on the softirq stack */
193 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
194
195 asm volatile(
196 " xchgl %%ebx,%%esp \n"
197 " call __do_softirq \n"
198 " movl %%ebx,%%esp \n"
199 : "=b"(isp)
200 : "0"(isp)
201 : "memory", "cc", "edx", "ecx", "eax"
202 );
203 }
204
205 local_irq_restore(flags);
206}
207
208EXPORT_SYMBOL(do_softirq);
209#endif
210
211/*
212 * Interrupt statistics:
213 */
214
215atomic_t irq_err_count;
216
217/*
218 * /proc/interrupts printing:
219 */
220
221int show_interrupts(struct seq_file *p, void *v)
222{
223 int i = *(loff_t *) v, j;
224 struct irqaction * action;
225 unsigned long flags;
226
227 if (i == 0) {
228 seq_printf(p, " ");
9f40a72a 229 for_each_online_cpu(j)
bdbdaa79 230 seq_printf(p, "CPU%-8d",j);
1da177e4
LT
231 seq_putc(p, '\n');
232 }
233
234 if (i < NR_IRQS) {
235 spin_lock_irqsave(&irq_desc[i].lock, flags);
236 action = irq_desc[i].action;
237 if (!action)
238 goto skip;
239 seq_printf(p, "%3d: ",i);
240#ifndef CONFIG_SMP
241 seq_printf(p, "%10u ", kstat_irqs(i));
242#else
9f40a72a 243 for_each_online_cpu(j)
f3705136 244 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4
LT
245#endif
246 seq_printf(p, " %14s", irq_desc[i].handler->typename);
247 seq_printf(p, " %s", action->name);
248
249 for (action=action->next; action; action = action->next)
250 seq_printf(p, ", %s", action->name);
251
252 seq_putc(p, '\n');
253skip:
254 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
255 } else if (i == NR_IRQS) {
256 seq_printf(p, "NMI: ");
9f40a72a 257 for_each_online_cpu(j)
f3705136 258 seq_printf(p, "%10u ", nmi_count(j));
1da177e4
LT
259 seq_putc(p, '\n');
260#ifdef CONFIG_X86_LOCAL_APIC
261 seq_printf(p, "LOC: ");
9f40a72a 262 for_each_online_cpu(j)
f3705136
ZM
263 seq_printf(p, "%10u ",
264 per_cpu(irq_stat,j).apic_timer_irqs);
1da177e4
LT
265 seq_putc(p, '\n');
266#endif
267 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
268#if defined(CONFIG_X86_IO_APIC)
269 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
270#endif
271 }
272 return 0;
273}
f3705136
ZM
274
275#ifdef CONFIG_HOTPLUG_CPU
276#include <mach_apic.h>
277
278void fixup_irqs(cpumask_t map)
279{
280 unsigned int irq;
281 static int warned;
282
283 for (irq = 0; irq < NR_IRQS; irq++) {
284 cpumask_t mask;
285 if (irq == 2)
286 continue;
287
288 cpus_and(mask, irq_affinity[irq], map);
289 if (any_online_cpu(mask) == NR_CPUS) {
290 printk("Breaking affinity for irq %i\n", irq);
291 mask = map;
292 }
293 if (irq_desc[irq].handler->set_affinity)
294 irq_desc[irq].handler->set_affinity(irq, mask);
295 else if (irq_desc[irq].action && !(warned++))
296 printk("Cannot set affinity for irq %i\n", irq);
297 }
298
299#if 0
300 barrier();
301 /* Ingo Molnar says: "after the IO-APIC masks have been redirected
302 [note the nop - the interrupt-enable boundary on x86 is two
303 instructions from sti] - to flush out pending hardirqs and
304 IPIs. After this point nothing is supposed to reach this CPU." */
305 __asm__ __volatile__("sti; nop; cli");
306 barrier();
307#else
308 /* That doesn't seem sufficient. Give it 1ms. */
309 local_irq_enable();
310 mdelay(1);
311 local_irq_disable();
312#endif
313}
314#endif
315