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1da177e4 LT |
1 | /* |
2 | * linux/arch/i386/kernel/irq.c | |
3 | * | |
4 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar | |
5 | * | |
6 | * This file contains the lowest level x86-specific interrupt | |
7 | * entry, irq-stacks and irq statistics code. All the remaining | |
8 | * irq logic is done by the generic kernel/irq/ code and | |
9 | * by the x86-specific irq controller code. (e.g. i8259.c and | |
10 | * io_apic.c.) | |
11 | */ | |
12 | ||
13 | #include <asm/uaccess.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/seq_file.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
f3705136 ZM |
18 | #include <linux/notifier.h> |
19 | #include <linux/cpu.h> | |
20 | #include <linux/delay.h> | |
1da177e4 | 21 | |
22fc6ecc | 22 | DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp; |
1da177e4 LT |
23 | EXPORT_PER_CPU_SYMBOL(irq_stat); |
24 | ||
25 | #ifndef CONFIG_X86_LOCAL_APIC | |
26 | /* | |
27 | * 'what should we do if we get a hw irq event on an illegal vector'. | |
28 | * each architecture has to answer this themselves. | |
29 | */ | |
30 | void ack_bad_irq(unsigned int irq) | |
31 | { | |
32 | printk("unexpected IRQ trap at vector %02x\n", irq); | |
33 | } | |
34 | #endif | |
35 | ||
36 | #ifdef CONFIG_4KSTACKS | |
37 | /* | |
38 | * per-CPU IRQ handling contexts (thread information and stack) | |
39 | */ | |
40 | union irq_ctx { | |
41 | struct thread_info tinfo; | |
42 | u32 stack[THREAD_SIZE/sizeof(u32)]; | |
43 | }; | |
44 | ||
45 | static union irq_ctx *hardirq_ctx[NR_CPUS]; | |
46 | static union irq_ctx *softirq_ctx[NR_CPUS]; | |
47 | #endif | |
48 | ||
49 | /* | |
50 | * do_IRQ handles all normal device IRQ's (the special | |
51 | * SMP cross-CPU interrupts have their own specific | |
52 | * handlers). | |
53 | */ | |
54 | fastcall unsigned int do_IRQ(struct pt_regs *regs) | |
55 | { | |
56 | /* high bits used in ret_from_ code */ | |
57 | int irq = regs->orig_eax & 0xff; | |
58 | #ifdef CONFIG_4KSTACKS | |
59 | union irq_ctx *curctx, *irqctx; | |
60 | u32 *isp; | |
61 | #endif | |
62 | ||
63 | irq_enter(); | |
64 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
65 | /* Debugging check for stack overflow: is there less than 1KB free? */ | |
66 | { | |
67 | long esp; | |
68 | ||
69 | __asm__ __volatile__("andl %%esp,%0" : | |
70 | "=r" (esp) : "0" (THREAD_SIZE - 1)); | |
71 | if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) { | |
72 | printk("do_IRQ: stack overflow: %ld\n", | |
73 | esp - sizeof(struct thread_info)); | |
74 | dump_stack(); | |
75 | } | |
76 | } | |
77 | #endif | |
78 | ||
79 | #ifdef CONFIG_4KSTACKS | |
80 | ||
81 | curctx = (union irq_ctx *) current_thread_info(); | |
82 | irqctx = hardirq_ctx[smp_processor_id()]; | |
83 | ||
84 | /* | |
85 | * this is where we switch to the IRQ stack. However, if we are | |
86 | * already using the IRQ stack (because we interrupted a hardirq | |
87 | * handler) we can't do that and just have to keep using the | |
88 | * current stack (which is the irq stack already after all) | |
89 | */ | |
90 | if (curctx != irqctx) { | |
91 | int arg1, arg2, ebx; | |
92 | ||
93 | /* build the stack frame on the IRQ stack */ | |
94 | isp = (u32*) ((char*)irqctx + sizeof(*irqctx)); | |
95 | irqctx->tinfo.task = curctx->tinfo.task; | |
96 | irqctx->tinfo.previous_esp = current_stack_pointer; | |
97 | ||
98 | asm volatile( | |
99 | " xchgl %%ebx,%%esp \n" | |
100 | " call __do_IRQ \n" | |
101 | " movl %%ebx,%%esp \n" | |
102 | : "=a" (arg1), "=d" (arg2), "=b" (ebx) | |
103 | : "0" (irq), "1" (regs), "2" (isp) | |
104 | : "memory", "cc", "ecx" | |
105 | ); | |
106 | } else | |
107 | #endif | |
108 | __do_IRQ(irq, regs); | |
109 | ||
110 | irq_exit(); | |
111 | ||
112 | return 1; | |
113 | } | |
114 | ||
115 | #ifdef CONFIG_4KSTACKS | |
116 | ||
117 | /* | |
118 | * These should really be __section__(".bss.page_aligned") as well, but | |
119 | * gcc's 3.0 and earlier don't handle that correctly. | |
120 | */ | |
121 | static char softirq_stack[NR_CPUS * THREAD_SIZE] | |
122 | __attribute__((__aligned__(THREAD_SIZE))); | |
123 | ||
124 | static char hardirq_stack[NR_CPUS * THREAD_SIZE] | |
125 | __attribute__((__aligned__(THREAD_SIZE))); | |
126 | ||
127 | /* | |
128 | * allocate per-cpu stacks for hardirq and for softirq processing | |
129 | */ | |
130 | void irq_ctx_init(int cpu) | |
131 | { | |
132 | union irq_ctx *irqctx; | |
133 | ||
134 | if (hardirq_ctx[cpu]) | |
135 | return; | |
136 | ||
137 | irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE]; | |
138 | irqctx->tinfo.task = NULL; | |
139 | irqctx->tinfo.exec_domain = NULL; | |
140 | irqctx->tinfo.cpu = cpu; | |
141 | irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; | |
142 | irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); | |
143 | ||
144 | hardirq_ctx[cpu] = irqctx; | |
145 | ||
146 | irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE]; | |
147 | irqctx->tinfo.task = NULL; | |
148 | irqctx->tinfo.exec_domain = NULL; | |
149 | irqctx->tinfo.cpu = cpu; | |
150 | irqctx->tinfo.preempt_count = SOFTIRQ_OFFSET; | |
151 | irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); | |
152 | ||
153 | softirq_ctx[cpu] = irqctx; | |
154 | ||
155 | printk("CPU %u irqstacks, hard=%p soft=%p\n", | |
156 | cpu,hardirq_ctx[cpu],softirq_ctx[cpu]); | |
157 | } | |
158 | ||
e1367daf LS |
159 | void irq_ctx_exit(int cpu) |
160 | { | |
161 | hardirq_ctx[cpu] = NULL; | |
162 | } | |
163 | ||
1da177e4 LT |
164 | extern asmlinkage void __do_softirq(void); |
165 | ||
166 | asmlinkage void do_softirq(void) | |
167 | { | |
168 | unsigned long flags; | |
169 | struct thread_info *curctx; | |
170 | union irq_ctx *irqctx; | |
171 | u32 *isp; | |
172 | ||
173 | if (in_interrupt()) | |
174 | return; | |
175 | ||
176 | local_irq_save(flags); | |
177 | ||
178 | if (local_softirq_pending()) { | |
179 | curctx = current_thread_info(); | |
180 | irqctx = softirq_ctx[smp_processor_id()]; | |
181 | irqctx->tinfo.task = curctx->task; | |
182 | irqctx->tinfo.previous_esp = current_stack_pointer; | |
183 | ||
184 | /* build the stack frame on the softirq stack */ | |
185 | isp = (u32*) ((char*)irqctx + sizeof(*irqctx)); | |
186 | ||
187 | asm volatile( | |
188 | " xchgl %%ebx,%%esp \n" | |
189 | " call __do_softirq \n" | |
190 | " movl %%ebx,%%esp \n" | |
191 | : "=b"(isp) | |
192 | : "0"(isp) | |
193 | : "memory", "cc", "edx", "ecx", "eax" | |
194 | ); | |
195 | } | |
196 | ||
197 | local_irq_restore(flags); | |
198 | } | |
199 | ||
200 | EXPORT_SYMBOL(do_softirq); | |
201 | #endif | |
202 | ||
203 | /* | |
204 | * Interrupt statistics: | |
205 | */ | |
206 | ||
207 | atomic_t irq_err_count; | |
208 | ||
209 | /* | |
210 | * /proc/interrupts printing: | |
211 | */ | |
212 | ||
213 | int show_interrupts(struct seq_file *p, void *v) | |
214 | { | |
215 | int i = *(loff_t *) v, j; | |
216 | struct irqaction * action; | |
217 | unsigned long flags; | |
218 | ||
219 | if (i == 0) { | |
220 | seq_printf(p, " "); | |
9f40a72a | 221 | for_each_online_cpu(j) |
f3705136 | 222 | seq_printf(p, "CPU%d ",j); |
1da177e4 LT |
223 | seq_putc(p, '\n'); |
224 | } | |
225 | ||
226 | if (i < NR_IRQS) { | |
227 | spin_lock_irqsave(&irq_desc[i].lock, flags); | |
228 | action = irq_desc[i].action; | |
229 | if (!action) | |
230 | goto skip; | |
231 | seq_printf(p, "%3d: ",i); | |
232 | #ifndef CONFIG_SMP | |
233 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
234 | #else | |
9f40a72a | 235 | for_each_online_cpu(j) |
f3705136 | 236 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
1da177e4 LT |
237 | #endif |
238 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | |
239 | seq_printf(p, " %s", action->name); | |
240 | ||
241 | for (action=action->next; action; action = action->next) | |
242 | seq_printf(p, ", %s", action->name); | |
243 | ||
244 | seq_putc(p, '\n'); | |
245 | skip: | |
246 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | |
247 | } else if (i == NR_IRQS) { | |
248 | seq_printf(p, "NMI: "); | |
9f40a72a | 249 | for_each_online_cpu(j) |
f3705136 | 250 | seq_printf(p, "%10u ", nmi_count(j)); |
1da177e4 LT |
251 | seq_putc(p, '\n'); |
252 | #ifdef CONFIG_X86_LOCAL_APIC | |
253 | seq_printf(p, "LOC: "); | |
9f40a72a | 254 | for_each_online_cpu(j) |
f3705136 ZM |
255 | seq_printf(p, "%10u ", |
256 | per_cpu(irq_stat,j).apic_timer_irqs); | |
1da177e4 LT |
257 | seq_putc(p, '\n'); |
258 | #endif | |
259 | seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); | |
260 | #if defined(CONFIG_X86_IO_APIC) | |
261 | seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count)); | |
262 | #endif | |
263 | } | |
264 | return 0; | |
265 | } | |
f3705136 ZM |
266 | |
267 | #ifdef CONFIG_HOTPLUG_CPU | |
268 | #include <mach_apic.h> | |
269 | ||
270 | void fixup_irqs(cpumask_t map) | |
271 | { | |
272 | unsigned int irq; | |
273 | static int warned; | |
274 | ||
275 | for (irq = 0; irq < NR_IRQS; irq++) { | |
276 | cpumask_t mask; | |
277 | if (irq == 2) | |
278 | continue; | |
279 | ||
280 | cpus_and(mask, irq_affinity[irq], map); | |
281 | if (any_online_cpu(mask) == NR_CPUS) { | |
282 | printk("Breaking affinity for irq %i\n", irq); | |
283 | mask = map; | |
284 | } | |
285 | if (irq_desc[irq].handler->set_affinity) | |
286 | irq_desc[irq].handler->set_affinity(irq, mask); | |
287 | else if (irq_desc[irq].action && !(warned++)) | |
288 | printk("Cannot set affinity for irq %i\n", irq); | |
289 | } | |
290 | ||
291 | #if 0 | |
292 | barrier(); | |
293 | /* Ingo Molnar says: "after the IO-APIC masks have been redirected | |
294 | [note the nop - the interrupt-enable boundary on x86 is two | |
295 | instructions from sti] - to flush out pending hardirqs and | |
296 | IPIs. After this point nothing is supposed to reach this CPU." */ | |
297 | __asm__ __volatile__("sti; nop; cli"); | |
298 | barrier(); | |
299 | #else | |
300 | /* That doesn't seem sufficient. Give it 1ms. */ | |
301 | local_irq_enable(); | |
302 | mdelay(1); | |
303 | local_irq_disable(); | |
304 | #endif | |
305 | } | |
306 | #endif | |
307 |