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1da177e4 LT |
1 | /* ----------------------------------------------------------------------- * |
2 | * | |
3 | * Copyright 2000 H. Peter Anvin - All Rights Reserved | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139, | |
8 | * USA; either version 2 of the License, or (at your option) any later | |
9 | * version; incorporated herein by reference. | |
10 | * | |
11 | * ----------------------------------------------------------------------- */ | |
12 | ||
13 | /* | |
14 | * msr.c | |
15 | * | |
16 | * x86 MSR access device | |
17 | * | |
18 | * This device is accessed by lseek() to the appropriate register number | |
19 | * and then read/write in chunks of 8 bytes. A larger size means multiple | |
20 | * reads or writes of the same register. | |
21 | * | |
22 | * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on | |
23 | * an SMP box will direct the access to CPU %d. | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
1da177e4 LT |
27 | |
28 | #include <linux/types.h> | |
29 | #include <linux/errno.h> | |
30 | #include <linux/fcntl.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/poll.h> | |
33 | #include <linux/smp.h> | |
34 | #include <linux/smp_lock.h> | |
35 | #include <linux/major.h> | |
36 | #include <linux/fs.h> | |
37 | #include <linux/device.h> | |
38 | #include <linux/cpu.h> | |
39 | #include <linux/notifier.h> | |
40 | ||
41 | #include <asm/processor.h> | |
42 | #include <asm/msr.h> | |
43 | #include <asm/uaccess.h> | |
44 | #include <asm/system.h> | |
45 | ||
8874b414 | 46 | static struct class *msr_class; |
1da177e4 | 47 | |
1da177e4 LT |
48 | static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx) |
49 | { | |
50 | int err; | |
51 | ||
f2ab4461 ZA |
52 | err = wrmsr_safe(reg, eax, edx); |
53 | if (err) | |
54 | err = -EIO; | |
1da177e4 LT |
55 | return err; |
56 | } | |
57 | ||
58 | static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx) | |
59 | { | |
60 | int err; | |
61 | ||
f2ab4461 ZA |
62 | err = rdmsr_safe(reg, eax, edx); |
63 | if (err) | |
64 | err = -EIO; | |
1da177e4 LT |
65 | return err; |
66 | } | |
67 | ||
68 | #ifdef CONFIG_SMP | |
69 | ||
70 | struct msr_command { | |
71 | int cpu; | |
72 | int err; | |
73 | u32 reg; | |
74 | u32 data[2]; | |
75 | }; | |
76 | ||
77 | static void msr_smp_wrmsr(void *cmd_block) | |
78 | { | |
79 | struct msr_command *cmd = (struct msr_command *)cmd_block; | |
80 | ||
81 | if (cmd->cpu == smp_processor_id()) | |
82 | cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]); | |
83 | } | |
84 | ||
85 | static void msr_smp_rdmsr(void *cmd_block) | |
86 | { | |
87 | struct msr_command *cmd = (struct msr_command *)cmd_block; | |
88 | ||
89 | if (cmd->cpu == smp_processor_id()) | |
90 | cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]); | |
91 | } | |
92 | ||
93 | static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) | |
94 | { | |
95 | struct msr_command cmd; | |
96 | int ret; | |
97 | ||
98 | preempt_disable(); | |
99 | if (cpu == smp_processor_id()) { | |
100 | ret = wrmsr_eio(reg, eax, edx); | |
101 | } else { | |
102 | cmd.cpu = cpu; | |
103 | cmd.reg = reg; | |
104 | cmd.data[0] = eax; | |
105 | cmd.data[1] = edx; | |
106 | ||
107 | smp_call_function(msr_smp_wrmsr, &cmd, 1, 1); | |
108 | ret = cmd.err; | |
109 | } | |
110 | preempt_enable(); | |
111 | return ret; | |
112 | } | |
113 | ||
114 | static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx) | |
115 | { | |
116 | struct msr_command cmd; | |
117 | int ret; | |
118 | ||
119 | preempt_disable(); | |
120 | if (cpu == smp_processor_id()) { | |
121 | ret = rdmsr_eio(reg, eax, edx); | |
122 | } else { | |
123 | cmd.cpu = cpu; | |
124 | cmd.reg = reg; | |
125 | ||
126 | smp_call_function(msr_smp_rdmsr, &cmd, 1, 1); | |
127 | ||
128 | *eax = cmd.data[0]; | |
129 | *edx = cmd.data[1]; | |
130 | ||
131 | ret = cmd.err; | |
132 | } | |
133 | preempt_enable(); | |
134 | return ret; | |
135 | } | |
136 | ||
137 | #else /* ! CONFIG_SMP */ | |
138 | ||
139 | static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) | |
140 | { | |
141 | return wrmsr_eio(reg, eax, edx); | |
142 | } | |
143 | ||
144 | static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx) | |
145 | { | |
146 | return rdmsr_eio(reg, eax, edx); | |
147 | } | |
148 | ||
149 | #endif /* ! CONFIG_SMP */ | |
150 | ||
151 | static loff_t msr_seek(struct file *file, loff_t offset, int orig) | |
152 | { | |
153 | loff_t ret = -EINVAL; | |
154 | ||
155 | lock_kernel(); | |
156 | switch (orig) { | |
157 | case 0: | |
158 | file->f_pos = offset; | |
159 | ret = file->f_pos; | |
160 | break; | |
161 | case 1: | |
162 | file->f_pos += offset; | |
163 | ret = file->f_pos; | |
164 | } | |
165 | unlock_kernel(); | |
166 | return ret; | |
167 | } | |
168 | ||
169 | static ssize_t msr_read(struct file *file, char __user * buf, | |
170 | size_t count, loff_t * ppos) | |
171 | { | |
172 | u32 __user *tmp = (u32 __user *) buf; | |
173 | u32 data[2]; | |
1da177e4 LT |
174 | u32 reg = *ppos; |
175 | int cpu = iminor(file->f_dentry->d_inode); | |
176 | int err; | |
177 | ||
178 | if (count % 8) | |
179 | return -EINVAL; /* Invalid chunk size */ | |
180 | ||
6926d570 | 181 | for (; count; count -= 8) { |
1da177e4 LT |
182 | err = do_rdmsr(cpu, reg, &data[0], &data[1]); |
183 | if (err) | |
184 | return err; | |
185 | if (copy_to_user(tmp, &data, 8)) | |
186 | return -EFAULT; | |
187 | tmp += 2; | |
188 | } | |
189 | ||
190 | return ((char __user *)tmp) - buf; | |
191 | } | |
192 | ||
193 | static ssize_t msr_write(struct file *file, const char __user *buf, | |
194 | size_t count, loff_t *ppos) | |
195 | { | |
196 | const u32 __user *tmp = (const u32 __user *)buf; | |
197 | u32 data[2]; | |
198 | size_t rv; | |
199 | u32 reg = *ppos; | |
200 | int cpu = iminor(file->f_dentry->d_inode); | |
201 | int err; | |
202 | ||
203 | if (count % 8) | |
204 | return -EINVAL; /* Invalid chunk size */ | |
205 | ||
206 | for (rv = 0; count; count -= 8) { | |
207 | if (copy_from_user(&data, tmp, 8)) | |
208 | return -EFAULT; | |
209 | err = do_wrmsr(cpu, reg, data[0], data[1]); | |
210 | if (err) | |
211 | return err; | |
212 | tmp += 2; | |
213 | } | |
214 | ||
215 | return ((char __user *)tmp) - buf; | |
216 | } | |
217 | ||
218 | static int msr_open(struct inode *inode, struct file *file) | |
219 | { | |
220 | unsigned int cpu = iminor(file->f_dentry->d_inode); | |
221 | struct cpuinfo_x86 *c = &(cpu_data)[cpu]; | |
222 | ||
223 | if (cpu >= NR_CPUS || !cpu_online(cpu)) | |
224 | return -ENXIO; /* No such CPU */ | |
225 | if (!cpu_has(c, X86_FEATURE_MSR)) | |
226 | return -EIO; /* MSR not supported */ | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
231 | /* | |
232 | * File operations we support | |
233 | */ | |
234 | static struct file_operations msr_fops = { | |
235 | .owner = THIS_MODULE, | |
236 | .llseek = msr_seek, | |
237 | .read = msr_read, | |
238 | .write = msr_write, | |
239 | .open = msr_open, | |
240 | }; | |
241 | ||
8874b414 | 242 | static int msr_class_device_create(int i) |
1da177e4 LT |
243 | { |
244 | int err = 0; | |
245 | struct class_device *class_err; | |
246 | ||
53f46542 | 247 | class_err = class_device_create(msr_class, NULL, MKDEV(MSR_MAJOR, i), NULL, "msr%d",i); |
1da177e4 LT |
248 | if (IS_ERR(class_err)) |
249 | err = PTR_ERR(class_err); | |
250 | return err; | |
251 | } | |
252 | ||
e09793bb AM |
253 | #ifdef CONFIG_HOTPLUG_CPU |
254 | static int msr_class_cpu_callback(struct notifier_block *nfb, | |
255 | unsigned long action, void *hcpu) | |
1da177e4 LT |
256 | { |
257 | unsigned int cpu = (unsigned long)hcpu; | |
258 | ||
259 | switch (action) { | |
260 | case CPU_ONLINE: | |
8874b414 | 261 | msr_class_device_create(cpu); |
1da177e4 LT |
262 | break; |
263 | case CPU_DEAD: | |
8874b414 | 264 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); |
1da177e4 LT |
265 | break; |
266 | } | |
267 | return NOTIFY_OK; | |
268 | } | |
269 | ||
74b85f37 | 270 | static struct notifier_block __cpuinitdata msr_class_cpu_notifier = |
1da177e4 LT |
271 | { |
272 | .notifier_call = msr_class_cpu_callback, | |
273 | }; | |
e09793bb | 274 | #endif |
1da177e4 LT |
275 | |
276 | static int __init msr_init(void) | |
277 | { | |
278 | int i, err = 0; | |
279 | i = 0; | |
280 | ||
281 | if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) { | |
282 | printk(KERN_ERR "msr: unable to get major %d for msr\n", | |
283 | MSR_MAJOR); | |
284 | err = -EBUSY; | |
285 | goto out; | |
286 | } | |
8874b414 | 287 | msr_class = class_create(THIS_MODULE, "msr"); |
1da177e4 LT |
288 | if (IS_ERR(msr_class)) { |
289 | err = PTR_ERR(msr_class); | |
290 | goto out_chrdev; | |
291 | } | |
292 | for_each_online_cpu(i) { | |
8874b414 | 293 | err = msr_class_device_create(i); |
1da177e4 LT |
294 | if (err != 0) |
295 | goto out_class; | |
296 | } | |
e09793bb | 297 | register_hotcpu_notifier(&msr_class_cpu_notifier); |
1da177e4 LT |
298 | |
299 | err = 0; | |
300 | goto out; | |
301 | ||
302 | out_class: | |
303 | i = 0; | |
304 | for_each_online_cpu(i) | |
8874b414 GKH |
305 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, i)); |
306 | class_destroy(msr_class); | |
1da177e4 LT |
307 | out_chrdev: |
308 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); | |
309 | out: | |
310 | return err; | |
311 | } | |
312 | ||
313 | static void __exit msr_exit(void) | |
314 | { | |
315 | int cpu = 0; | |
316 | for_each_online_cpu(cpu) | |
8874b414 GKH |
317 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); |
318 | class_destroy(msr_class); | |
1da177e4 | 319 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); |
e09793bb | 320 | unregister_hotcpu_notifier(&msr_class_cpu_notifier); |
1da177e4 LT |
321 | } |
322 | ||
323 | module_init(msr_init); | |
324 | module_exit(msr_exit) | |
325 | ||
326 | MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>"); | |
327 | MODULE_DESCRIPTION("x86 generic MSR driver"); | |
328 | MODULE_LICENSE("GPL"); |