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CommitLineData
1da177e4
LT
1/*
2 * linux/arch/i386/traps.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
8 */
9
10/*
11 * 'Traps.c' handles hardware traps and faults after we have saved some
12 * state in 'asm.s'.
13 */
14#include <linux/config.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/string.h>
18#include <linux/errno.h>
19#include <linux/timer.h>
20#include <linux/mm.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/spinlock.h>
24#include <linux/interrupt.h>
25#include <linux/highmem.h>
26#include <linux/kallsyms.h>
27#include <linux/ptrace.h>
28#include <linux/utsname.h>
29#include <linux/kprobes.h>
6e274d14 30#include <linux/kexec.h>
1da177e4
LT
31
32#ifdef CONFIG_EISA
33#include <linux/ioport.h>
34#include <linux/eisa.h>
35#endif
36
37#ifdef CONFIG_MCA
38#include <linux/mca.h>
39#endif
40
41#include <asm/processor.h>
42#include <asm/system.h>
43#include <asm/uaccess.h>
44#include <asm/io.h>
45#include <asm/atomic.h>
46#include <asm/debugreg.h>
47#include <asm/desc.h>
48#include <asm/i387.h>
49#include <asm/nmi.h>
50
51#include <asm/smp.h>
52#include <asm/arch_hooks.h>
53#include <asm/kdebug.h>
54
55#include <linux/irq.h>
56#include <linux/module.h>
57
58#include "mach_traps.h"
59
60asmlinkage int system_call(void);
61
62struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
63 { 0, 0 }, { 0, 0 } };
64
65/* Do we ignore FPU interrupts ? */
66char ignore_fpu_irq = 0;
67
68/*
69 * The IDT has to be page-aligned to simplify the Pentium
70 * F0 0F bug workaround.. We have a special link segment
71 * for this.
72 */
73struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
74
75asmlinkage void divide_error(void);
76asmlinkage void debug(void);
77asmlinkage void nmi(void);
78asmlinkage void int3(void);
79asmlinkage void overflow(void);
80asmlinkage void bounds(void);
81asmlinkage void invalid_op(void);
82asmlinkage void device_not_available(void);
83asmlinkage void coprocessor_segment_overrun(void);
84asmlinkage void invalid_TSS(void);
85asmlinkage void segment_not_present(void);
86asmlinkage void stack_segment(void);
87asmlinkage void general_protection(void);
88asmlinkage void page_fault(void);
89asmlinkage void coprocessor_error(void);
90asmlinkage void simd_coprocessor_error(void);
91asmlinkage void alignment_check(void);
92asmlinkage void spurious_interrupt_bug(void);
93asmlinkage void machine_check(void);
94
95static int kstack_depth_to_print = 24;
96struct notifier_block *i386die_chain;
97static DEFINE_SPINLOCK(die_notifier_lock);
98
99int register_die_notifier(struct notifier_block *nb)
100{
101 int err = 0;
102 unsigned long flags;
103 spin_lock_irqsave(&die_notifier_lock, flags);
104 err = notifier_chain_register(&i386die_chain, nb);
105 spin_unlock_irqrestore(&die_notifier_lock, flags);
106 return err;
107}
129f6946 108EXPORT_SYMBOL(register_die_notifier);
1da177e4
LT
109
110static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
111{
112 return p > (void *)tinfo &&
113 p < (void *)tinfo + THREAD_SIZE - 3;
114}
115
116static inline unsigned long print_context_stack(struct thread_info *tinfo,
117 unsigned long *stack, unsigned long ebp)
118{
119 unsigned long addr;
120
121#ifdef CONFIG_FRAME_POINTER
122 while (valid_stack_ptr(tinfo, (void *)ebp)) {
123 addr = *(unsigned long *)(ebp + 4);
124 printk(" [<%08lx>] ", addr);
125 print_symbol("%s", addr);
126 printk("\n");
127 ebp = *(unsigned long *)ebp;
128 }
129#else
130 while (valid_stack_ptr(tinfo, stack)) {
131 addr = *stack++;
132 if (__kernel_text_address(addr)) {
133 printk(" [<%08lx>]", addr);
134 print_symbol(" %s", addr);
135 printk("\n");
136 }
137 }
138#endif
139 return ebp;
140}
141
142void show_trace(struct task_struct *task, unsigned long * stack)
143{
144 unsigned long ebp;
145
146 if (!task)
147 task = current;
148
149 if (task == current) {
150 /* Grab ebp right from our regs */
151 asm ("movl %%ebp, %0" : "=r" (ebp) : );
152 } else {
153 /* ebp is the last reg pushed by switch_to */
154 ebp = *(unsigned long *) task->thread.esp;
155 }
156
157 while (1) {
158 struct thread_info *context;
159 context = (struct thread_info *)
160 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
161 ebp = print_context_stack(context, stack, ebp);
162 stack = (unsigned long*)context->previous_esp;
163 if (!stack)
164 break;
165 printk(" =======================\n");
166 }
167}
168
169void show_stack(struct task_struct *task, unsigned long *esp)
170{
171 unsigned long *stack;
172 int i;
173
174 if (esp == NULL) {
175 if (task)
176 esp = (unsigned long*)task->thread.esp;
177 else
178 esp = (unsigned long *)&esp;
179 }
180
181 stack = esp;
182 for(i = 0; i < kstack_depth_to_print; i++) {
183 if (kstack_end(stack))
184 break;
185 if (i && ((i % 8) == 0))
186 printk("\n ");
187 printk("%08lx ", *stack++);
188 }
189 printk("\nCall Trace:\n");
190 show_trace(task, esp);
191}
192
193/*
194 * The architecture-independent dump_stack generator
195 */
196void dump_stack(void)
197{
198 unsigned long stack;
199
200 show_trace(current, &stack);
201}
202
203EXPORT_SYMBOL(dump_stack);
204
205void show_registers(struct pt_regs *regs)
206{
207 int i;
208 int in_kernel = 1;
209 unsigned long esp;
210 unsigned short ss;
211
212 esp = (unsigned long) (&regs->esp);
213 ss = __KERNEL_DS;
717b594a 214 if (user_mode(regs)) {
1da177e4
LT
215 in_kernel = 0;
216 esp = regs->esp;
217 ss = regs->xss & 0xffff;
218 }
219 print_modules();
220 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\nEFLAGS: %08lx"
221 " (%s) \n",
222 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
223 print_tainted(), regs->eflags, system_utsname.release);
224 print_symbol("EIP is at %s\n", regs->eip);
225 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
226 regs->eax, regs->ebx, regs->ecx, regs->edx);
227 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
228 regs->esi, regs->edi, regs->ebp, esp);
229 printk("ds: %04x es: %04x ss: %04x\n",
230 regs->xds & 0xffff, regs->xes & 0xffff, ss);
231 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
232 current->comm, current->pid, current_thread_info(), current);
233 /*
234 * When in-kernel, we also print out the stack and code at the
235 * time of the fault..
236 */
237 if (in_kernel) {
238 u8 *eip;
239
240 printk("\nStack: ");
241 show_stack(NULL, (unsigned long*)esp);
242
243 printk("Code: ");
244
245 eip = (u8 *)regs->eip - 43;
246 for (i = 0; i < 64; i++, eip++) {
247 unsigned char c;
248
249 if (eip < (u8 *)PAGE_OFFSET || __get_user(c, eip)) {
250 printk(" Bad EIP value.");
251 break;
252 }
253 if (eip == (u8 *)regs->eip)
254 printk("<%02x> ", c);
255 else
256 printk("%02x ", c);
257 }
258 }
259 printk("\n");
260}
261
262static void handle_BUG(struct pt_regs *regs)
263{
264 unsigned short ud2;
265 unsigned short line;
266 char *file;
267 char c;
268 unsigned long eip;
269
717b594a 270 if (user_mode(regs))
1da177e4
LT
271 goto no_bug; /* Not in kernel */
272
273 eip = regs->eip;
274
275 if (eip < PAGE_OFFSET)
276 goto no_bug;
277 if (__get_user(ud2, (unsigned short *)eip))
278 goto no_bug;
279 if (ud2 != 0x0b0f)
280 goto no_bug;
281 if (__get_user(line, (unsigned short *)(eip + 2)))
282 goto bug;
283 if (__get_user(file, (char **)(eip + 4)) ||
284 (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
285 file = "<bad filename>";
286
287 printk("------------[ cut here ]------------\n");
288 printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
289
290no_bug:
291 return;
292
293 /* Here we know it was a BUG but file-n-line is unavailable */
294bug:
295 printk("Kernel BUG\n");
296}
297
6e274d14
AN
298/* This is gone through when something in the kernel
299 * has done something bad and is about to be terminated.
300*/
1da177e4
LT
301void die(const char * str, struct pt_regs * regs, long err)
302{
303 static struct {
304 spinlock_t lock;
305 u32 lock_owner;
306 int lock_owner_depth;
307 } die = {
308 .lock = SPIN_LOCK_UNLOCKED,
309 .lock_owner = -1,
310 .lock_owner_depth = 0
311 };
312 static int die_counter;
313
39c715b7 314 if (die.lock_owner != raw_smp_processor_id()) {
1da177e4
LT
315 console_verbose();
316 spin_lock_irq(&die.lock);
317 die.lock_owner = smp_processor_id();
318 die.lock_owner_depth = 0;
319 bust_spinlocks(1);
320 }
321
322 if (++die.lock_owner_depth < 3) {
323 int nl = 0;
324 handle_BUG(regs);
325 printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
326#ifdef CONFIG_PREEMPT
327 printk("PREEMPT ");
328 nl = 1;
329#endif
330#ifdef CONFIG_SMP
331 printk("SMP ");
332 nl = 1;
333#endif
334#ifdef CONFIG_DEBUG_PAGEALLOC
335 printk("DEBUG_PAGEALLOC");
336 nl = 1;
337#endif
338 if (nl)
339 printk("\n");
340 notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
341 show_registers(regs);
342 } else
343 printk(KERN_ERR "Recursive die() failure, output suppressed\n");
344
345 bust_spinlocks(0);
346 die.lock_owner = -1;
347 spin_unlock_irq(&die.lock);
6e274d14
AN
348
349 if (kexec_should_crash(current))
350 crash_kexec(regs);
351
1da177e4
LT
352 if (in_interrupt())
353 panic("Fatal exception in interrupt");
354
355 if (panic_on_oops) {
356 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
357 ssleep(5);
358 panic("Fatal exception");
359 }
360 do_exit(SIGSEGV);
361}
362
363static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
364{
717b594a 365 if (!user_mode_vm(regs))
1da177e4
LT
366 die(str, regs, err);
367}
368
369static void do_trap(int trapnr, int signr, char *str, int vm86,
370 struct pt_regs * regs, long error_code, siginfo_t *info)
371{
372 if (regs->eflags & VM_MASK) {
373 if (vm86)
374 goto vm86_trap;
375 goto trap_signal;
376 }
377
717b594a 378 if (!user_mode(regs))
1da177e4
LT
379 goto kernel_trap;
380
381 trap_signal: {
382 struct task_struct *tsk = current;
383 tsk->thread.error_code = error_code;
384 tsk->thread.trap_no = trapnr;
385 if (info)
386 force_sig_info(signr, info, tsk);
387 else
388 force_sig(signr, tsk);
389 return;
390 }
391
392 kernel_trap: {
393 if (!fixup_exception(regs))
394 die(str, regs, error_code);
395 return;
396 }
397
398 vm86_trap: {
399 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
400 if (ret) goto trap_signal;
401 return;
402 }
403}
404
405#define DO_ERROR(trapnr, signr, str, name) \
406fastcall void do_##name(struct pt_regs * regs, long error_code) \
407{ \
408 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
409 == NOTIFY_STOP) \
410 return; \
411 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
412}
413
414#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
415fastcall void do_##name(struct pt_regs * regs, long error_code) \
416{ \
417 siginfo_t info; \
418 info.si_signo = signr; \
419 info.si_errno = 0; \
420 info.si_code = sicode; \
421 info.si_addr = (void __user *)siaddr; \
422 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
423 == NOTIFY_STOP) \
424 return; \
425 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
426}
427
428#define DO_VM86_ERROR(trapnr, signr, str, name) \
429fastcall void do_##name(struct pt_regs * regs, long error_code) \
430{ \
431 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
432 == NOTIFY_STOP) \
433 return; \
434 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
435}
436
437#define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
438fastcall void do_##name(struct pt_regs * regs, long error_code) \
439{ \
440 siginfo_t info; \
441 info.si_signo = signr; \
442 info.si_errno = 0; \
443 info.si_code = sicode; \
444 info.si_addr = (void __user *)siaddr; \
445 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
446 == NOTIFY_STOP) \
447 return; \
448 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
449}
450
451DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
452#ifndef CONFIG_KPROBES
453DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
454#endif
455DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
456DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
457DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
458DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
459DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
460DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
461DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
462DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
a879cbbb 463DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
1da177e4
LT
464
465fastcall void do_general_protection(struct pt_regs * regs, long error_code)
466{
467 int cpu = get_cpu();
468 struct tss_struct *tss = &per_cpu(init_tss, cpu);
469 struct thread_struct *thread = &current->thread;
470
471 /*
472 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
473 * invalid offset set (the LAZY one) and the faulting thread has
474 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
475 * and we set the offset field correctly. Then we let the CPU to
476 * restart the faulting instruction.
477 */
478 if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
479 thread->io_bitmap_ptr) {
480 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
481 thread->io_bitmap_max);
482 /*
483 * If the previously set map was extending to higher ports
484 * than the current one, pad extra space with 0xff (no access).
485 */
486 if (thread->io_bitmap_max < tss->io_bitmap_max)
487 memset((char *) tss->io_bitmap +
488 thread->io_bitmap_max, 0xff,
489 tss->io_bitmap_max - thread->io_bitmap_max);
490 tss->io_bitmap_max = thread->io_bitmap_max;
491 tss->io_bitmap_base = IO_BITMAP_OFFSET;
492 put_cpu();
493 return;
494 }
495 put_cpu();
496
497 if (regs->eflags & VM_MASK)
498 goto gp_in_vm86;
499
717b594a 500 if (!user_mode(regs))
1da177e4
LT
501 goto gp_in_kernel;
502
503 current->thread.error_code = error_code;
504 current->thread.trap_no = 13;
505 force_sig(SIGSEGV, current);
506 return;
507
508gp_in_vm86:
509 local_irq_enable();
510 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
511 return;
512
513gp_in_kernel:
514 if (!fixup_exception(regs)) {
515 if (notify_die(DIE_GPF, "general protection fault", regs,
516 error_code, 13, SIGSEGV) == NOTIFY_STOP)
517 return;
518 die("general protection fault", regs, error_code);
519 }
520}
521
522static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
523{
524 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
525 printk("You probably have a hardware problem with your RAM chips\n");
526
527 /* Clear and disable the memory parity error line. */
528 clear_mem_error(reason);
529}
530
531static void io_check_error(unsigned char reason, struct pt_regs * regs)
532{
533 unsigned long i;
534
535 printk("NMI: IOCK error (debug interrupt?)\n");
536 show_registers(regs);
537
538 /* Re-enable the IOCK line, wait for a few seconds */
539 reason = (reason & 0xf) | 8;
540 outb(reason, 0x61);
541 i = 2000;
542 while (--i) udelay(1000);
543 reason &= ~8;
544 outb(reason, 0x61);
545}
546
547static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
548{
549#ifdef CONFIG_MCA
550 /* Might actually be able to figure out what the guilty party
551 * is. */
552 if( MCA_bus ) {
553 mca_handle_nmi();
554 return;
555 }
556#endif
557 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
558 reason, smp_processor_id());
559 printk("Dazed and confused, but trying to continue\n");
560 printk("Do you have a strange power saving mode enabled?\n");
561}
562
563static DEFINE_SPINLOCK(nmi_print_lock);
564
565void die_nmi (struct pt_regs *regs, const char *msg)
566{
567 spin_lock(&nmi_print_lock);
568 /*
569 * We are in trouble anyway, lets at least try
570 * to get a message out.
571 */
572 bust_spinlocks(1);
573 printk(msg);
574 printk(" on CPU%d, eip %08lx, registers:\n",
575 smp_processor_id(), regs->eip);
576 show_registers(regs);
577 printk("console shuts up ...\n");
578 console_silent();
579 spin_unlock(&nmi_print_lock);
580 bust_spinlocks(0);
6e274d14
AN
581
582 /* If we are in kernel we are probably nested up pretty bad
583 * and might aswell get out now while we still can.
584 */
585 if (!user_mode(regs)) {
586 current->thread.trap_no = 2;
587 crash_kexec(regs);
588 }
589
1da177e4
LT
590 do_exit(SIGSEGV);
591}
592
593static void default_do_nmi(struct pt_regs * regs)
594{
595 unsigned char reason = 0;
596
597 /* Only the BSP gets external NMIs from the system. */
598 if (!smp_processor_id())
599 reason = get_nmi_reason();
600
601 if (!(reason & 0xc0)) {
602 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
603 == NOTIFY_STOP)
604 return;
605#ifdef CONFIG_X86_LOCAL_APIC
606 /*
607 * Ok, so this is none of the documented NMI sources,
608 * so it must be the NMI watchdog.
609 */
610 if (nmi_watchdog) {
611 nmi_watchdog_tick(regs);
612 return;
613 }
614#endif
615 unknown_nmi_error(reason, regs);
616 return;
617 }
618 if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
619 return;
620 if (reason & 0x80)
621 mem_parity_error(reason, regs);
622 if (reason & 0x40)
623 io_check_error(reason, regs);
624 /*
625 * Reassert NMI in case it became active meanwhile
626 * as it's edge-triggered.
627 */
628 reassert_nmi();
629}
630
631static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
632{
633 return 0;
634}
635
636static nmi_callback_t nmi_callback = dummy_nmi_callback;
637
638fastcall void do_nmi(struct pt_regs * regs, long error_code)
639{
640 int cpu;
641
642 nmi_enter();
643
644 cpu = smp_processor_id();
f3705136
ZM
645
646#ifdef CONFIG_HOTPLUG_CPU
647 if (!cpu_online(cpu)) {
648 nmi_exit();
649 return;
650 }
651#endif
652
1da177e4
LT
653 ++nmi_count(cpu);
654
655 if (!nmi_callback(regs, cpu))
656 default_do_nmi(regs);
657
658 nmi_exit();
659}
660
661void set_nmi_callback(nmi_callback_t callback)
662{
663 nmi_callback = callback;
664}
129f6946 665EXPORT_SYMBOL_GPL(set_nmi_callback);
1da177e4
LT
666
667void unset_nmi_callback(void)
668{
669 nmi_callback = dummy_nmi_callback;
670}
129f6946 671EXPORT_SYMBOL_GPL(unset_nmi_callback);
1da177e4
LT
672
673#ifdef CONFIG_KPROBES
48c88211 674fastcall void do_int3(struct pt_regs *regs, long error_code)
1da177e4
LT
675{
676 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
677 == NOTIFY_STOP)
48c88211 678 return;
1da177e4
LT
679 /* This is an interrupt gate, because kprobes wants interrupts
680 disabled. Normal trap handlers don't. */
681 restore_interrupts(regs);
682 do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
1da177e4
LT
683}
684#endif
685
686/*
687 * Our handling of the processor debug registers is non-trivial.
688 * We do not clear them on entry and exit from the kernel. Therefore
689 * it is possible to get a watchpoint trap here from inside the kernel.
690 * However, the code in ./ptrace.c has ensured that the user can
691 * only set watchpoints on userspace addresses. Therefore the in-kernel
692 * watchpoint trap can only occur in code which is reading/writing
693 * from user space. Such code must not hold kernel locks (since it
694 * can equally take a page fault), therefore it is safe to call
695 * force_sig_info even though that claims and releases locks.
696 *
697 * Code in ./signal.c ensures that the debug control register
698 * is restored before we deliver any signal, and therefore that
699 * user code runs with the correct debug control register even though
700 * we clear it here.
701 *
702 * Being careful here means that we don't have to be as careful in a
703 * lot of more complicated places (task switching can be a bit lazy
704 * about restoring all the debug state, and ptrace doesn't have to
705 * find every occurrence of the TF bit that could be saved away even
706 * by user code)
707 */
708fastcall void do_debug(struct pt_regs * regs, long error_code)
709{
710 unsigned int condition;
711 struct task_struct *tsk = current;
712
1cc6f12e 713 get_debugreg(condition, 6);
1da177e4
LT
714
715 if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
716 SIGTRAP) == NOTIFY_STOP)
717 return;
718 /* It's safe to allow irq's after DR6 has been saved */
719 if (regs->eflags & X86_EFLAGS_IF)
720 local_irq_enable();
721
722 /* Mask out spurious debug traps due to lazy DR7 setting */
723 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
724 if (!tsk->thread.debugreg[7])
725 goto clear_dr7;
726 }
727
728 if (regs->eflags & VM_MASK)
729 goto debug_vm86;
730
731 /* Save debug status register where ptrace can see it */
732 tsk->thread.debugreg[6] = condition;
733
734 /*
735 * Single-stepping through TF: make sure we ignore any events in
736 * kernel space (but re-enable TF when returning to user mode).
737 */
738 if (condition & DR_STEP) {
739 /*
740 * We already checked v86 mode above, so we can
741 * check for kernel mode by just checking the CPL
742 * of CS.
743 */
717b594a 744 if (!user_mode(regs))
1da177e4
LT
745 goto clear_TF_reenable;
746 }
747
748 /* Ok, finally something we can handle */
749 send_sigtrap(tsk, regs, error_code);
750
751 /* Disable additional traps. They'll be re-enabled when
752 * the signal is delivered.
753 */
754clear_dr7:
1cc6f12e 755 set_debugreg(0, 7);
1da177e4
LT
756 return;
757
758debug_vm86:
759 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
760 return;
761
762clear_TF_reenable:
763 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
764 regs->eflags &= ~TF_MASK;
765 return;
766}
767
768/*
769 * Note that we play around with the 'TS' bit in an attempt to get
770 * the correct behaviour even in the presence of the asynchronous
771 * IRQ13 behaviour
772 */
773void math_error(void __user *eip)
774{
775 struct task_struct * task;
776 siginfo_t info;
777 unsigned short cwd, swd;
778
779 /*
780 * Save the info for the exception handler and clear the error.
781 */
782 task = current;
783 save_init_fpu(task);
784 task->thread.trap_no = 16;
785 task->thread.error_code = 0;
786 info.si_signo = SIGFPE;
787 info.si_errno = 0;
788 info.si_code = __SI_FAULT;
789 info.si_addr = eip;
790 /*
791 * (~cwd & swd) will mask out exceptions that are not set to unmasked
792 * status. 0x3f is the exception bits in these regs, 0x200 is the
793 * C1 reg you need in case of a stack fault, 0x040 is the stack
794 * fault bit. We should only be taking one exception at a time,
795 * so if this combination doesn't produce any single exception,
796 * then we have a bad program that isn't syncronizing its FPU usage
797 * and it will suffer the consequences since we won't be able to
798 * fully reproduce the context of the exception
799 */
800 cwd = get_fpu_cwd(task);
801 swd = get_fpu_swd(task);
802 switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {
803 case 0x000:
804 default:
805 break;
806 case 0x001: /* Invalid Op */
807 case 0x041: /* Stack Fault */
808 case 0x241: /* Stack Fault | Direction */
809 info.si_code = FPE_FLTINV;
810 /* Should we clear the SF or let user space do it ???? */
811 break;
812 case 0x002: /* Denormalize */
813 case 0x010: /* Underflow */
814 info.si_code = FPE_FLTUND;
815 break;
816 case 0x004: /* Zero Divide */
817 info.si_code = FPE_FLTDIV;
818 break;
819 case 0x008: /* Overflow */
820 info.si_code = FPE_FLTOVF;
821 break;
822 case 0x020: /* Precision */
823 info.si_code = FPE_FLTRES;
824 break;
825 }
826 force_sig_info(SIGFPE, &info, task);
827}
828
829fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
830{
831 ignore_fpu_irq = 1;
832 math_error((void __user *)regs->eip);
833}
834
835static void simd_math_error(void __user *eip)
836{
837 struct task_struct * task;
838 siginfo_t info;
839 unsigned short mxcsr;
840
841 /*
842 * Save the info for the exception handler and clear the error.
843 */
844 task = current;
845 save_init_fpu(task);
846 task->thread.trap_no = 19;
847 task->thread.error_code = 0;
848 info.si_signo = SIGFPE;
849 info.si_errno = 0;
850 info.si_code = __SI_FAULT;
851 info.si_addr = eip;
852 /*
853 * The SIMD FPU exceptions are handled a little differently, as there
854 * is only a single status/control register. Thus, to determine which
855 * unmasked exception was caught we must mask the exception mask bits
856 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
857 */
858 mxcsr = get_fpu_mxcsr(task);
859 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
860 case 0x000:
861 default:
862 break;
863 case 0x001: /* Invalid Op */
864 info.si_code = FPE_FLTINV;
865 break;
866 case 0x002: /* Denormalize */
867 case 0x010: /* Underflow */
868 info.si_code = FPE_FLTUND;
869 break;
870 case 0x004: /* Zero Divide */
871 info.si_code = FPE_FLTDIV;
872 break;
873 case 0x008: /* Overflow */
874 info.si_code = FPE_FLTOVF;
875 break;
876 case 0x020: /* Precision */
877 info.si_code = FPE_FLTRES;
878 break;
879 }
880 force_sig_info(SIGFPE, &info, task);
881}
882
883fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
884 long error_code)
885{
886 if (cpu_has_xmm) {
887 /* Handle SIMD FPU exceptions on PIII+ processors. */
888 ignore_fpu_irq = 1;
889 simd_math_error((void __user *)regs->eip);
890 } else {
891 /*
892 * Handle strange cache flush from user space exception
893 * in all other cases. This is undocumented behaviour.
894 */
895 if (regs->eflags & VM_MASK) {
896 handle_vm86_fault((struct kernel_vm86_regs *)regs,
897 error_code);
898 return;
899 }
900 die_if_kernel("cache flush denied", regs, error_code);
901 current->thread.trap_no = 19;
902 current->thread.error_code = error_code;
903 force_sig(SIGSEGV, current);
904 }
905}
906
907fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
908 long error_code)
909{
910#if 0
911 /* No need to warn about this any longer. */
912 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
913#endif
914}
915
916fastcall void setup_x86_bogus_stack(unsigned char * stk)
917{
918 unsigned long *switch16_ptr, *switch32_ptr;
919 struct pt_regs *regs;
920 unsigned long stack_top, stack_bot;
921 unsigned short iret_frame16_off;
922 int cpu = smp_processor_id();
923 /* reserve the space on 32bit stack for the magic switch16 pointer */
924 memmove(stk, stk + 8, sizeof(struct pt_regs));
925 switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs));
926 regs = (struct pt_regs *)stk;
927 /* now the switch32 on 16bit stack */
928 stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
929 stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
930 switch32_ptr = (unsigned long *)(stack_top - 8);
931 iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20;
932 /* copy iret frame on 16bit stack */
933 memcpy((void *)(stack_bot + iret_frame16_off), &regs->eip, 20);
934 /* fill in the switch pointers */
935 switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off;
936 switch16_ptr[1] = __ESPFIX_SS;
937 switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) +
938 8 - CPU_16BIT_STACK_SIZE;
939 switch32_ptr[1] = __KERNEL_DS;
940}
941
942fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp)
943{
944 unsigned long *switch32_ptr;
945 unsigned char *stack16, *stack32;
946 unsigned long stack_top, stack_bot;
947 int len;
948 int cpu = smp_processor_id();
949 stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
950 stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
951 switch32_ptr = (unsigned long *)(stack_top - 8);
952 /* copy the data from 16bit stack to 32bit stack */
953 len = CPU_16BIT_STACK_SIZE - 8 - sp;
954 stack16 = (unsigned char *)(stack_bot + sp);
955 stack32 = (unsigned char *)
956 (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len);
957 memcpy(stack32, stack16, len);
958 return stack32;
959}
960
961/*
962 * 'math_state_restore()' saves the current math information in the
963 * old math state array, and gets the new ones from the current task
964 *
965 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
966 * Don't touch unless you *really* know how it works.
967 *
968 * Must be called with kernel preemption disabled (in this case,
969 * local interrupts are disabled at the call-site in entry.S).
970 */
971asmlinkage void math_state_restore(struct pt_regs regs)
972{
973 struct thread_info *thread = current_thread_info();
974 struct task_struct *tsk = thread->task;
975
976 clts(); /* Allow maths ops (or we recurse) */
977 if (!tsk_used_math(tsk))
978 init_fpu(tsk);
979 restore_fpu(tsk);
980 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
981}
982
983#ifndef CONFIG_MATH_EMULATION
984
985asmlinkage void math_emulate(long arg)
986{
987 printk("math-emulation not enabled and no coprocessor found.\n");
988 printk("killing %s.\n",current->comm);
989 force_sig(SIGFPE,current);
990 schedule();
991}
992
993#endif /* CONFIG_MATH_EMULATION */
994
995#ifdef CONFIG_X86_F00F_BUG
996void __init trap_init_f00f_bug(void)
997{
998 __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
999
1000 /*
1001 * Update the IDT descriptor and reload the IDT so that
1002 * it uses the read-only mapped virtual address.
1003 */
1004 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
1005 __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
1006}
1007#endif
1008
1009#define _set_gate(gate_addr,type,dpl,addr,seg) \
1010do { \
1011 int __d0, __d1; \
1012 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
1013 "movw %4,%%dx\n\t" \
1014 "movl %%eax,%0\n\t" \
1015 "movl %%edx,%1" \
1016 :"=m" (*((long *) (gate_addr))), \
1017 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
1018 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
1019 "3" ((char *) (addr)),"2" ((seg) << 16)); \
1020} while (0)
1021
1022
1023/*
1024 * This needs to use 'idt_table' rather than 'idt', and
1025 * thus use the _nonmapped_ version of the IDT, as the
1026 * Pentium F0 0F bugfix can have resulted in the mapped
1027 * IDT being write-protected.
1028 */
1029void set_intr_gate(unsigned int n, void *addr)
1030{
1031 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
1032}
1033
1034/*
1035 * This routine sets up an interrupt gate at directory privilege level 3.
1036 */
1037static inline void set_system_intr_gate(unsigned int n, void *addr)
1038{
1039 _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
1040}
1041
1042static void __init set_trap_gate(unsigned int n, void *addr)
1043{
1044 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
1045}
1046
1047static void __init set_system_gate(unsigned int n, void *addr)
1048{
1049 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
1050}
1051
1052static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
1053{
1054 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
1055}
1056
1057
1058void __init trap_init(void)
1059{
1060#ifdef CONFIG_EISA
1061 void __iomem *p = ioremap(0x0FFFD9, 4);
1062 if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
1063 EISA_bus = 1;
1064 }
1065 iounmap(p);
1066#endif
1067
1068#ifdef CONFIG_X86_LOCAL_APIC
1069 init_apic_mappings();
1070#endif
1071
1072 set_trap_gate(0,&divide_error);
1073 set_intr_gate(1,&debug);
1074 set_intr_gate(2,&nmi);
1075 set_system_intr_gate(3, &int3); /* int3-5 can be called from all */
1076 set_system_gate(4,&overflow);
1077 set_system_gate(5,&bounds);
1078 set_trap_gate(6,&invalid_op);
1079 set_trap_gate(7,&device_not_available);
1080 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
1081 set_trap_gate(9,&coprocessor_segment_overrun);
1082 set_trap_gate(10,&invalid_TSS);
1083 set_trap_gate(11,&segment_not_present);
1084 set_trap_gate(12,&stack_segment);
1085 set_trap_gate(13,&general_protection);
1086 set_intr_gate(14,&page_fault);
1087 set_trap_gate(15,&spurious_interrupt_bug);
1088 set_trap_gate(16,&coprocessor_error);
1089 set_trap_gate(17,&alignment_check);
1090#ifdef CONFIG_X86_MCE
1091 set_trap_gate(18,&machine_check);
1092#endif
1093 set_trap_gate(19,&simd_coprocessor_error);
1094
1095 set_system_gate(SYSCALL_VECTOR,&system_call);
1096
1097 /*
1098 * Should be a barrier for any external CPU state.
1099 */
1100 cpu_init();
1101
1102 trap_init_hook();
1103}
1104
1105static int __init kstack_setup(char *s)
1106{
1107 kstack_depth_to_print = simple_strtoul(s, NULL, 0);
1108 return 0;
1109}
1110__setup("kstack=", kstack_setup);