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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/i386/traps.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * | |
6 | * Pentium III FXSR, SSE support | |
7 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
8 | */ | |
9 | ||
10 | /* | |
11 | * 'Traps.c' handles hardware traps and faults after we have saved some | |
12 | * state in 'asm.s'. | |
13 | */ | |
1da177e4 LT |
14 | #include <linux/sched.h> |
15 | #include <linux/kernel.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/errno.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/mm.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/spinlock.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/highmem.h> | |
25 | #include <linux/kallsyms.h> | |
26 | #include <linux/ptrace.h> | |
27 | #include <linux/utsname.h> | |
28 | #include <linux/kprobes.h> | |
6e274d14 | 29 | #include <linux/kexec.h> |
176a2718 | 30 | #include <linux/unwind.h> |
1da177e4 LT |
31 | |
32 | #ifdef CONFIG_EISA | |
33 | #include <linux/ioport.h> | |
34 | #include <linux/eisa.h> | |
35 | #endif | |
36 | ||
37 | #ifdef CONFIG_MCA | |
38 | #include <linux/mca.h> | |
39 | #endif | |
40 | ||
41 | #include <asm/processor.h> | |
42 | #include <asm/system.h> | |
43 | #include <asm/uaccess.h> | |
44 | #include <asm/io.h> | |
45 | #include <asm/atomic.h> | |
46 | #include <asm/debugreg.h> | |
47 | #include <asm/desc.h> | |
48 | #include <asm/i387.h> | |
49 | #include <asm/nmi.h> | |
176a2718 | 50 | #include <asm/unwind.h> |
1da177e4 LT |
51 | #include <asm/smp.h> |
52 | #include <asm/arch_hooks.h> | |
53 | #include <asm/kdebug.h> | |
54 | ||
1da177e4 LT |
55 | #include <linux/module.h> |
56 | ||
57 | #include "mach_traps.h" | |
58 | ||
59 | asmlinkage int system_call(void); | |
60 | ||
61 | struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 }, | |
62 | { 0, 0 }, { 0, 0 } }; | |
63 | ||
64 | /* Do we ignore FPU interrupts ? */ | |
65 | char ignore_fpu_irq = 0; | |
66 | ||
67 | /* | |
68 | * The IDT has to be page-aligned to simplify the Pentium | |
69 | * F0 0F bug workaround.. We have a special link segment | |
70 | * for this. | |
71 | */ | |
72 | struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, }; | |
73 | ||
74 | asmlinkage void divide_error(void); | |
75 | asmlinkage void debug(void); | |
76 | asmlinkage void nmi(void); | |
77 | asmlinkage void int3(void); | |
78 | asmlinkage void overflow(void); | |
79 | asmlinkage void bounds(void); | |
80 | asmlinkage void invalid_op(void); | |
81 | asmlinkage void device_not_available(void); | |
82 | asmlinkage void coprocessor_segment_overrun(void); | |
83 | asmlinkage void invalid_TSS(void); | |
84 | asmlinkage void segment_not_present(void); | |
85 | asmlinkage void stack_segment(void); | |
86 | asmlinkage void general_protection(void); | |
87 | asmlinkage void page_fault(void); | |
88 | asmlinkage void coprocessor_error(void); | |
89 | asmlinkage void simd_coprocessor_error(void); | |
90 | asmlinkage void alignment_check(void); | |
91 | asmlinkage void spurious_interrupt_bug(void); | |
92 | asmlinkage void machine_check(void); | |
93 | ||
94 | static int kstack_depth_to_print = 24; | |
ea424055 | 95 | #ifdef CONFIG_STACK_UNWIND |
c33bd9aa | 96 | static int call_trace = 1; |
ea424055 JB |
97 | #else |
98 | #define call_trace (-1) | |
99 | #endif | |
e041c683 | 100 | ATOMIC_NOTIFIER_HEAD(i386die_chain); |
1da177e4 LT |
101 | |
102 | int register_die_notifier(struct notifier_block *nb) | |
103 | { | |
101f12af | 104 | vmalloc_sync_all(); |
e041c683 | 105 | return atomic_notifier_chain_register(&i386die_chain, nb); |
1da177e4 | 106 | } |
1454aed9 | 107 | EXPORT_SYMBOL(register_die_notifier); /* used modular by kdb */ |
1da177e4 | 108 | |
e041c683 AS |
109 | int unregister_die_notifier(struct notifier_block *nb) |
110 | { | |
111 | return atomic_notifier_chain_unregister(&i386die_chain, nb); | |
112 | } | |
1454aed9 | 113 | EXPORT_SYMBOL(unregister_die_notifier); /* used modular by kdb */ |
e041c683 | 114 | |
1da177e4 LT |
115 | static inline int valid_stack_ptr(struct thread_info *tinfo, void *p) |
116 | { | |
117 | return p > (void *)tinfo && | |
118 | p < (void *)tinfo + THREAD_SIZE - 3; | |
119 | } | |
120 | ||
4d7d8c82 | 121 | /* |
f0a5c315 | 122 | * Print one address/symbol entries per line. |
4d7d8c82 | 123 | */ |
f0a5c315 | 124 | static inline void print_addr_and_symbol(unsigned long addr, char *log_lvl) |
7aa89746 | 125 | { |
7aa89746 | 126 | printk(" [<%08lx>] ", addr); |
4d7d8c82 | 127 | |
f0a5c315 | 128 | print_symbol("%s\n", addr); |
7aa89746 CE |
129 | } |
130 | ||
1da177e4 | 131 | static inline unsigned long print_context_stack(struct thread_info *tinfo, |
7aa89746 CE |
132 | unsigned long *stack, unsigned long ebp, |
133 | char *log_lvl) | |
1da177e4 LT |
134 | { |
135 | unsigned long addr; | |
136 | ||
137 | #ifdef CONFIG_FRAME_POINTER | |
138 | while (valid_stack_ptr(tinfo, (void *)ebp)) { | |
139 | addr = *(unsigned long *)(ebp + 4); | |
f0a5c315 | 140 | print_addr_and_symbol(addr, log_lvl); |
b88d4f1d IM |
141 | /* |
142 | * break out of recursive entries (such as | |
143 | * end_of_stack_stop_unwind_function): | |
144 | */ | |
145 | if (ebp == *(unsigned long *)ebp) | |
146 | break; | |
1da177e4 LT |
147 | ebp = *(unsigned long *)ebp; |
148 | } | |
149 | #else | |
150 | while (valid_stack_ptr(tinfo, stack)) { | |
151 | addr = *stack++; | |
7aa89746 | 152 | if (__kernel_text_address(addr)) |
f0a5c315 | 153 | print_addr_and_symbol(addr, log_lvl); |
1da177e4 LT |
154 | } |
155 | #endif | |
156 | return ebp; | |
157 | } | |
158 | ||
f0a5c315 IM |
159 | static asmlinkage int |
160 | show_trace_unwind(struct unwind_frame_info *info, void *log_lvl) | |
176a2718 | 161 | { |
c33bd9aa | 162 | int n = 0; |
176a2718 JB |
163 | |
164 | while (unwind(info) == 0 && UNW_PC(info)) { | |
f0a5c315 IM |
165 | n++; |
166 | print_addr_and_symbol(UNW_PC(info), log_lvl); | |
176a2718 JB |
167 | if (arch_unw_user_mode(info)) |
168 | break; | |
169 | } | |
c33bd9aa | 170 | return n; |
176a2718 JB |
171 | } |
172 | ||
173 | static void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs, | |
7aa89746 | 174 | unsigned long *stack, char *log_lvl) |
1da177e4 LT |
175 | { |
176 | unsigned long ebp; | |
177 | ||
178 | if (!task) | |
179 | task = current; | |
180 | ||
c33bd9aa JB |
181 | if (call_trace >= 0) { |
182 | int unw_ret = 0; | |
183 | struct unwind_frame_info info; | |
184 | ||
185 | if (regs) { | |
186 | if (unwind_init_frame_info(&info, task, regs) == 0) | |
187 | unw_ret = show_trace_unwind(&info, log_lvl); | |
188 | } else if (task == current) | |
189 | unw_ret = unwind_init_running(&info, show_trace_unwind, log_lvl); | |
190 | else { | |
191 | if (unwind_init_blocked(&info, task) == 0) | |
192 | unw_ret = show_trace_unwind(&info, log_lvl); | |
176a2718 | 193 | } |
ea424055 JB |
194 | if (unw_ret > 0) { |
195 | if (call_trace == 1 && !arch_unw_user_mode(&info)) { | |
196 | print_symbol("DWARF2 unwinder stuck at %s\n", | |
197 | UNW_PC(&info)); | |
198 | if (UNW_SP(&info) >= PAGE_OFFSET) { | |
199 | printk("Leftover inexact backtrace:\n"); | |
70583161 | 200 | stack = (void *)UNW_SP(&info); |
ea424055 JB |
201 | } else |
202 | printk("Full inexact backtrace again:\n"); | |
203 | } else if (call_trace >= 1) | |
c33bd9aa | 204 | return; |
c97d20a6 AK |
205 | else |
206 | printk("Full inexact backtrace again:\n"); | |
ea424055 | 207 | } else |
c97d20a6 | 208 | printk("Inexact backtrace:\n"); |
176a2718 JB |
209 | } |
210 | ||
1da177e4 LT |
211 | if (task == current) { |
212 | /* Grab ebp right from our regs */ | |
213 | asm ("movl %%ebp, %0" : "=r" (ebp) : ); | |
214 | } else { | |
215 | /* ebp is the last reg pushed by switch_to */ | |
216 | ebp = *(unsigned long *) task->thread.esp; | |
217 | } | |
218 | ||
219 | while (1) { | |
220 | struct thread_info *context; | |
221 | context = (struct thread_info *) | |
222 | ((unsigned long)stack & (~(THREAD_SIZE - 1))); | |
7aa89746 | 223 | ebp = print_context_stack(context, stack, ebp, log_lvl); |
1da177e4 LT |
224 | stack = (unsigned long*)context->previous_esp; |
225 | if (!stack) | |
226 | break; | |
cc04ee9c | 227 | printk("%s =======================\n", log_lvl); |
1da177e4 LT |
228 | } |
229 | } | |
230 | ||
176a2718 | 231 | void show_trace(struct task_struct *task, struct pt_regs *regs, unsigned long * stack) |
7aa89746 | 232 | { |
176a2718 | 233 | show_trace_log_lvl(task, regs, stack, ""); |
7aa89746 CE |
234 | } |
235 | ||
176a2718 JB |
236 | static void show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs, |
237 | unsigned long *esp, char *log_lvl) | |
1da177e4 LT |
238 | { |
239 | unsigned long *stack; | |
240 | int i; | |
241 | ||
242 | if (esp == NULL) { | |
243 | if (task) | |
244 | esp = (unsigned long*)task->thread.esp; | |
245 | else | |
246 | esp = (unsigned long *)&esp; | |
247 | } | |
248 | ||
249 | stack = esp; | |
250 | for(i = 0; i < kstack_depth_to_print; i++) { | |
251 | if (kstack_end(stack)) | |
252 | break; | |
75874d5c CE |
253 | if (i && ((i % 8) == 0)) |
254 | printk("\n%s ", log_lvl); | |
1da177e4 LT |
255 | printk("%08lx ", *stack++); |
256 | } | |
75874d5c | 257 | printk("\n%sCall Trace:\n", log_lvl); |
176a2718 | 258 | show_trace_log_lvl(task, regs, esp, log_lvl); |
7aa89746 CE |
259 | } |
260 | ||
261 | void show_stack(struct task_struct *task, unsigned long *esp) | |
262 | { | |
75874d5c | 263 | printk(" "); |
176a2718 | 264 | show_stack_log_lvl(task, NULL, esp, ""); |
1da177e4 LT |
265 | } |
266 | ||
267 | /* | |
268 | * The architecture-independent dump_stack generator | |
269 | */ | |
270 | void dump_stack(void) | |
271 | { | |
272 | unsigned long stack; | |
273 | ||
176a2718 | 274 | show_trace(current, NULL, &stack); |
1da177e4 LT |
275 | } |
276 | ||
277 | EXPORT_SYMBOL(dump_stack); | |
278 | ||
279 | void show_registers(struct pt_regs *regs) | |
280 | { | |
281 | int i; | |
282 | int in_kernel = 1; | |
283 | unsigned long esp; | |
284 | unsigned short ss; | |
285 | ||
286 | esp = (unsigned long) (®s->esp); | |
0998e422 | 287 | savesegment(ss, ss); |
db753bdf | 288 | if (user_mode_vm(regs)) { |
1da177e4 LT |
289 | in_kernel = 0; |
290 | esp = regs->esp; | |
291 | ss = regs->xss & 0xffff; | |
292 | } | |
293 | print_modules(); | |
9c107805 | 294 | printk(KERN_EMERG "CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\n" |
b53e8f68 | 295 | "EFLAGS: %08lx (%s %.*s) \n", |
1da177e4 | 296 | smp_processor_id(), 0xffff & regs->xcs, regs->eip, |
b53e8f68 CE |
297 | print_tainted(), regs->eflags, system_utsname.release, |
298 | (int)strcspn(system_utsname.version, " "), | |
299 | system_utsname.version); | |
9c107805 DJ |
300 | print_symbol(KERN_EMERG "EIP is at %s\n", regs->eip); |
301 | printk(KERN_EMERG "eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n", | |
1da177e4 | 302 | regs->eax, regs->ebx, regs->ecx, regs->edx); |
9c107805 | 303 | printk(KERN_EMERG "esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n", |
1da177e4 | 304 | regs->esi, regs->edi, regs->ebp, esp); |
9c107805 | 305 | printk(KERN_EMERG "ds: %04x es: %04x ss: %04x\n", |
1da177e4 | 306 | regs->xds & 0xffff, regs->xes & 0xffff, ss); |
7e04a118 CE |
307 | printk(KERN_EMERG "Process %.*s (pid: %d, ti=%p task=%p task.ti=%p)", |
308 | TASK_COMM_LEN, current->comm, current->pid, | |
309 | current_thread_info(), current, current->thread_info); | |
1da177e4 LT |
310 | /* |
311 | * When in-kernel, we also print out the stack and code at the | |
312 | * time of the fault.. | |
313 | */ | |
314 | if (in_kernel) { | |
3f3ae347 | 315 | u8 __user *eip; |
1da177e4 | 316 | |
9c107805 | 317 | printk("\n" KERN_EMERG "Stack: "); |
176a2718 | 318 | show_stack_log_lvl(NULL, regs, (unsigned long *)esp, KERN_EMERG); |
1da177e4 | 319 | |
9c107805 | 320 | printk(KERN_EMERG "Code: "); |
1da177e4 | 321 | |
3f3ae347 | 322 | eip = (u8 __user *)regs->eip - 43; |
1da177e4 LT |
323 | for (i = 0; i < 64; i++, eip++) { |
324 | unsigned char c; | |
325 | ||
3f3ae347 | 326 | if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) { |
1da177e4 LT |
327 | printk(" Bad EIP value."); |
328 | break; | |
329 | } | |
3f3ae347 | 330 | if (eip == (u8 __user *)regs->eip) |
1da177e4 LT |
331 | printk("<%02x> ", c); |
332 | else | |
333 | printk("%02x ", c); | |
334 | } | |
335 | } | |
336 | printk("\n"); | |
337 | } | |
338 | ||
339 | static void handle_BUG(struct pt_regs *regs) | |
340 | { | |
b7015331 | 341 | unsigned long eip = regs->eip; |
1da177e4 | 342 | unsigned short ud2; |
1da177e4 LT |
343 | |
344 | if (eip < PAGE_OFFSET) | |
b7015331 | 345 | return; |
3f3ae347 | 346 | if (__get_user(ud2, (unsigned short __user *)eip)) |
b7015331 | 347 | return; |
1da177e4 | 348 | if (ud2 != 0x0b0f) |
b7015331 | 349 | return; |
1da177e4 | 350 | |
9c107805 | 351 | printk(KERN_EMERG "------------[ cut here ]------------\n"); |
1da177e4 | 352 | |
b7015331 CE |
353 | #ifdef CONFIG_DEBUG_BUGVERBOSE |
354 | do { | |
355 | unsigned short line; | |
356 | char *file; | |
357 | char c; | |
358 | ||
359 | if (__get_user(line, (unsigned short __user *)(eip + 2))) | |
360 | break; | |
361 | if (__get_user(file, (char * __user *)(eip + 4)) || | |
362 | (unsigned long)file < PAGE_OFFSET || __get_user(c, file)) | |
363 | file = "<bad filename>"; | |
1da177e4 | 364 | |
b7015331 CE |
365 | printk(KERN_EMERG "kernel BUG at %s:%d!\n", file, line); |
366 | return; | |
367 | } while (0); | |
368 | #endif | |
369 | printk(KERN_EMERG "Kernel BUG at [verbose debug info unavailable]\n"); | |
1da177e4 LT |
370 | } |
371 | ||
6e274d14 AN |
372 | /* This is gone through when something in the kernel |
373 | * has done something bad and is about to be terminated. | |
374 | */ | |
1da177e4 LT |
375 | void die(const char * str, struct pt_regs * regs, long err) |
376 | { | |
377 | static struct { | |
378 | spinlock_t lock; | |
379 | u32 lock_owner; | |
380 | int lock_owner_depth; | |
381 | } die = { | |
382 | .lock = SPIN_LOCK_UNLOCKED, | |
383 | .lock_owner = -1, | |
384 | .lock_owner_depth = 0 | |
385 | }; | |
386 | static int die_counter; | |
e43d674f | 387 | unsigned long flags; |
1da177e4 | 388 | |
dd287796 AM |
389 | oops_enter(); |
390 | ||
39c715b7 | 391 | if (die.lock_owner != raw_smp_processor_id()) { |
1da177e4 | 392 | console_verbose(); |
e43d674f | 393 | spin_lock_irqsave(&die.lock, flags); |
1da177e4 LT |
394 | die.lock_owner = smp_processor_id(); |
395 | die.lock_owner_depth = 0; | |
396 | bust_spinlocks(1); | |
397 | } | |
e43d674f JB |
398 | else |
399 | local_save_flags(flags); | |
1da177e4 LT |
400 | |
401 | if (++die.lock_owner_depth < 3) { | |
402 | int nl = 0; | |
7bee5c0f RD |
403 | unsigned long esp; |
404 | unsigned short ss; | |
405 | ||
1da177e4 | 406 | handle_BUG(regs); |
9c107805 | 407 | printk(KERN_EMERG "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); |
1da177e4 | 408 | #ifdef CONFIG_PREEMPT |
9c107805 | 409 | printk(KERN_EMERG "PREEMPT "); |
1da177e4 LT |
410 | nl = 1; |
411 | #endif | |
412 | #ifdef CONFIG_SMP | |
9c107805 DJ |
413 | if (!nl) |
414 | printk(KERN_EMERG); | |
1da177e4 LT |
415 | printk("SMP "); |
416 | nl = 1; | |
417 | #endif | |
418 | #ifdef CONFIG_DEBUG_PAGEALLOC | |
9c107805 DJ |
419 | if (!nl) |
420 | printk(KERN_EMERG); | |
1da177e4 LT |
421 | printk("DEBUG_PAGEALLOC"); |
422 | nl = 1; | |
423 | #endif | |
424 | if (nl) | |
425 | printk("\n"); | |
20c0d2d4 JB |
426 | if (notify_die(DIE_OOPS, str, regs, err, |
427 | current->thread.trap_no, SIGSEGV) != | |
7bee5c0f | 428 | NOTIFY_STOP) { |
20c0d2d4 | 429 | show_registers(regs); |
7bee5c0f RD |
430 | /* Executive summary in case the oops scrolled away */ |
431 | esp = (unsigned long) (®s->esp); | |
432 | savesegment(ss, ss); | |
433 | if (user_mode(regs)) { | |
434 | esp = regs->esp; | |
435 | ss = regs->xss & 0xffff; | |
436 | } | |
437 | printk(KERN_EMERG "EIP: [<%08lx>] ", regs->eip); | |
438 | print_symbol("%s", regs->eip); | |
439 | printk(" SS:ESP %04x:%08lx\n", ss, esp); | |
440 | } | |
20c0d2d4 JB |
441 | else |
442 | regs = NULL; | |
1da177e4 | 443 | } else |
9c107805 | 444 | printk(KERN_EMERG "Recursive die() failure, output suppressed\n"); |
1da177e4 LT |
445 | |
446 | bust_spinlocks(0); | |
447 | die.lock_owner = -1; | |
e43d674f | 448 | spin_unlock_irqrestore(&die.lock, flags); |
6e274d14 | 449 | |
20c0d2d4 JB |
450 | if (!regs) |
451 | return; | |
452 | ||
6e274d14 AN |
453 | if (kexec_should_crash(current)) |
454 | crash_kexec(regs); | |
455 | ||
1da177e4 LT |
456 | if (in_interrupt()) |
457 | panic("Fatal exception in interrupt"); | |
458 | ||
cea6a4ba | 459 | if (panic_on_oops) |
012c437d | 460 | panic("Fatal exception"); |
cea6a4ba | 461 | |
dd287796 | 462 | oops_exit(); |
1da177e4 LT |
463 | do_exit(SIGSEGV); |
464 | } | |
465 | ||
466 | static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err) | |
467 | { | |
717b594a | 468 | if (!user_mode_vm(regs)) |
1da177e4 LT |
469 | die(str, regs, err); |
470 | } | |
471 | ||
3d97ae5b PP |
472 | static void __kprobes do_trap(int trapnr, int signr, char *str, int vm86, |
473 | struct pt_regs * regs, long error_code, | |
474 | siginfo_t *info) | |
1da177e4 | 475 | { |
4f339ecb AN |
476 | struct task_struct *tsk = current; |
477 | tsk->thread.error_code = error_code; | |
478 | tsk->thread.trap_no = trapnr; | |
479 | ||
1da177e4 LT |
480 | if (regs->eflags & VM_MASK) { |
481 | if (vm86) | |
482 | goto vm86_trap; | |
483 | goto trap_signal; | |
484 | } | |
485 | ||
717b594a | 486 | if (!user_mode(regs)) |
1da177e4 LT |
487 | goto kernel_trap; |
488 | ||
489 | trap_signal: { | |
1da177e4 LT |
490 | if (info) |
491 | force_sig_info(signr, info, tsk); | |
492 | else | |
493 | force_sig(signr, tsk); | |
494 | return; | |
495 | } | |
496 | ||
497 | kernel_trap: { | |
498 | if (!fixup_exception(regs)) | |
499 | die(str, regs, error_code); | |
500 | return; | |
501 | } | |
502 | ||
503 | vm86_trap: { | |
504 | int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr); | |
505 | if (ret) goto trap_signal; | |
506 | return; | |
507 | } | |
508 | } | |
509 | ||
510 | #define DO_ERROR(trapnr, signr, str, name) \ | |
511 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
512 | { \ | |
513 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
514 | == NOTIFY_STOP) \ | |
515 | return; \ | |
516 | do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \ | |
517 | } | |
518 | ||
519 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ | |
520 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
521 | { \ | |
522 | siginfo_t info; \ | |
523 | info.si_signo = signr; \ | |
524 | info.si_errno = 0; \ | |
525 | info.si_code = sicode; \ | |
526 | info.si_addr = (void __user *)siaddr; \ | |
527 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
528 | == NOTIFY_STOP) \ | |
529 | return; \ | |
530 | do_trap(trapnr, signr, str, 0, regs, error_code, &info); \ | |
531 | } | |
532 | ||
533 | #define DO_VM86_ERROR(trapnr, signr, str, name) \ | |
534 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
535 | { \ | |
536 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
537 | == NOTIFY_STOP) \ | |
538 | return; \ | |
539 | do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \ | |
540 | } | |
541 | ||
542 | #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ | |
543 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
544 | { \ | |
545 | siginfo_t info; \ | |
546 | info.si_signo = signr; \ | |
547 | info.si_errno = 0; \ | |
548 | info.si_code = sicode; \ | |
549 | info.si_addr = (void __user *)siaddr; \ | |
550 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
551 | == NOTIFY_STOP) \ | |
552 | return; \ | |
553 | do_trap(trapnr, signr, str, 1, regs, error_code, &info); \ | |
554 | } | |
555 | ||
556 | DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip) | |
557 | #ifndef CONFIG_KPROBES | |
558 | DO_VM86_ERROR( 3, SIGTRAP, "int3", int3) | |
559 | #endif | |
560 | DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow) | |
561 | DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds) | |
631b0347 | 562 | DO_ERROR_INFO( 6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->eip) |
1da177e4 LT |
563 | DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun) |
564 | DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS) | |
565 | DO_ERROR(11, SIGBUS, "segment not present", segment_not_present) | |
566 | DO_ERROR(12, SIGBUS, "stack segment", stack_segment) | |
567 | DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0) | |
a879cbbb | 568 | DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0) |
1da177e4 | 569 | |
3d97ae5b PP |
570 | fastcall void __kprobes do_general_protection(struct pt_regs * regs, |
571 | long error_code) | |
1da177e4 LT |
572 | { |
573 | int cpu = get_cpu(); | |
574 | struct tss_struct *tss = &per_cpu(init_tss, cpu); | |
575 | struct thread_struct *thread = ¤t->thread; | |
576 | ||
577 | /* | |
578 | * Perform the lazy TSS's I/O bitmap copy. If the TSS has an | |
579 | * invalid offset set (the LAZY one) and the faulting thread has | |
580 | * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS | |
581 | * and we set the offset field correctly. Then we let the CPU to | |
582 | * restart the faulting instruction. | |
583 | */ | |
584 | if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY && | |
585 | thread->io_bitmap_ptr) { | |
586 | memcpy(tss->io_bitmap, thread->io_bitmap_ptr, | |
587 | thread->io_bitmap_max); | |
588 | /* | |
589 | * If the previously set map was extending to higher ports | |
590 | * than the current one, pad extra space with 0xff (no access). | |
591 | */ | |
592 | if (thread->io_bitmap_max < tss->io_bitmap_max) | |
593 | memset((char *) tss->io_bitmap + | |
594 | thread->io_bitmap_max, 0xff, | |
595 | tss->io_bitmap_max - thread->io_bitmap_max); | |
596 | tss->io_bitmap_max = thread->io_bitmap_max; | |
597 | tss->io_bitmap_base = IO_BITMAP_OFFSET; | |
d5cd4aad | 598 | tss->io_bitmap_owner = thread; |
1da177e4 LT |
599 | put_cpu(); |
600 | return; | |
601 | } | |
602 | put_cpu(); | |
603 | ||
4f339ecb AN |
604 | current->thread.error_code = error_code; |
605 | current->thread.trap_no = 13; | |
606 | ||
1da177e4 LT |
607 | if (regs->eflags & VM_MASK) |
608 | goto gp_in_vm86; | |
609 | ||
717b594a | 610 | if (!user_mode(regs)) |
1da177e4 LT |
611 | goto gp_in_kernel; |
612 | ||
613 | current->thread.error_code = error_code; | |
614 | current->thread.trap_no = 13; | |
615 | force_sig(SIGSEGV, current); | |
616 | return; | |
617 | ||
618 | gp_in_vm86: | |
619 | local_irq_enable(); | |
620 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
621 | return; | |
622 | ||
623 | gp_in_kernel: | |
624 | if (!fixup_exception(regs)) { | |
625 | if (notify_die(DIE_GPF, "general protection fault", regs, | |
626 | error_code, 13, SIGSEGV) == NOTIFY_STOP) | |
627 | return; | |
628 | die("general protection fault", regs, error_code); | |
629 | } | |
630 | } | |
631 | ||
632 | static void mem_parity_error(unsigned char reason, struct pt_regs * regs) | |
633 | { | |
9c107805 DJ |
634 | printk(KERN_EMERG "Uhhuh. NMI received. Dazed and confused, but trying " |
635 | "to continue\n"); | |
636 | printk(KERN_EMERG "You probably have a hardware problem with your RAM " | |
637 | "chips\n"); | |
1da177e4 LT |
638 | |
639 | /* Clear and disable the memory parity error line. */ | |
640 | clear_mem_error(reason); | |
641 | } | |
642 | ||
643 | static void io_check_error(unsigned char reason, struct pt_regs * regs) | |
644 | { | |
645 | unsigned long i; | |
646 | ||
9c107805 | 647 | printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n"); |
1da177e4 LT |
648 | show_registers(regs); |
649 | ||
650 | /* Re-enable the IOCK line, wait for a few seconds */ | |
651 | reason = (reason & 0xf) | 8; | |
652 | outb(reason, 0x61); | |
653 | i = 2000; | |
654 | while (--i) udelay(1000); | |
655 | reason &= ~8; | |
656 | outb(reason, 0x61); | |
657 | } | |
658 | ||
659 | static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs) | |
660 | { | |
661 | #ifdef CONFIG_MCA | |
662 | /* Might actually be able to figure out what the guilty party | |
663 | * is. */ | |
664 | if( MCA_bus ) { | |
665 | mca_handle_nmi(); | |
666 | return; | |
667 | } | |
668 | #endif | |
669 | printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | |
670 | reason, smp_processor_id()); | |
671 | printk("Dazed and confused, but trying to continue\n"); | |
672 | printk("Do you have a strange power saving mode enabled?\n"); | |
673 | } | |
674 | ||
675 | static DEFINE_SPINLOCK(nmi_print_lock); | |
676 | ||
677 | void die_nmi (struct pt_regs *regs, const char *msg) | |
678 | { | |
20c0d2d4 | 679 | if (notify_die(DIE_NMIWATCHDOG, msg, regs, 0, 2, SIGINT) == |
748f2edb GA |
680 | NOTIFY_STOP) |
681 | return; | |
682 | ||
1da177e4 LT |
683 | spin_lock(&nmi_print_lock); |
684 | /* | |
685 | * We are in trouble anyway, lets at least try | |
686 | * to get a message out. | |
687 | */ | |
688 | bust_spinlocks(1); | |
9c107805 | 689 | printk(KERN_EMERG "%s", msg); |
1da177e4 LT |
690 | printk(" on CPU%d, eip %08lx, registers:\n", |
691 | smp_processor_id(), regs->eip); | |
692 | show_registers(regs); | |
9c107805 | 693 | printk(KERN_EMERG "console shuts up ...\n"); |
1da177e4 LT |
694 | console_silent(); |
695 | spin_unlock(&nmi_print_lock); | |
696 | bust_spinlocks(0); | |
6e274d14 AN |
697 | |
698 | /* If we are in kernel we are probably nested up pretty bad | |
699 | * and might aswell get out now while we still can. | |
700 | */ | |
db753bdf | 701 | if (!user_mode_vm(regs)) { |
6e274d14 AN |
702 | current->thread.trap_no = 2; |
703 | crash_kexec(regs); | |
704 | } | |
705 | ||
1da177e4 LT |
706 | do_exit(SIGSEGV); |
707 | } | |
708 | ||
709 | static void default_do_nmi(struct pt_regs * regs) | |
710 | { | |
711 | unsigned char reason = 0; | |
712 | ||
713 | /* Only the BSP gets external NMIs from the system. */ | |
714 | if (!smp_processor_id()) | |
715 | reason = get_nmi_reason(); | |
716 | ||
717 | if (!(reason & 0xc0)) { | |
20c0d2d4 | 718 | if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT) |
1da177e4 LT |
719 | == NOTIFY_STOP) |
720 | return; | |
721 | #ifdef CONFIG_X86_LOCAL_APIC | |
722 | /* | |
723 | * Ok, so this is none of the documented NMI sources, | |
724 | * so it must be the NMI watchdog. | |
725 | */ | |
726 | if (nmi_watchdog) { | |
727 | nmi_watchdog_tick(regs); | |
728 | return; | |
729 | } | |
730 | #endif | |
731 | unknown_nmi_error(reason, regs); | |
732 | return; | |
733 | } | |
20c0d2d4 | 734 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP) |
1da177e4 LT |
735 | return; |
736 | if (reason & 0x80) | |
737 | mem_parity_error(reason, regs); | |
738 | if (reason & 0x40) | |
739 | io_check_error(reason, regs); | |
740 | /* | |
741 | * Reassert NMI in case it became active meanwhile | |
742 | * as it's edge-triggered. | |
743 | */ | |
744 | reassert_nmi(); | |
745 | } | |
746 | ||
747 | static int dummy_nmi_callback(struct pt_regs * regs, int cpu) | |
748 | { | |
749 | return 0; | |
750 | } | |
751 | ||
752 | static nmi_callback_t nmi_callback = dummy_nmi_callback; | |
753 | ||
754 | fastcall void do_nmi(struct pt_regs * regs, long error_code) | |
755 | { | |
756 | int cpu; | |
757 | ||
758 | nmi_enter(); | |
759 | ||
760 | cpu = smp_processor_id(); | |
f3705136 | 761 | |
1da177e4 LT |
762 | ++nmi_count(cpu); |
763 | ||
19306059 | 764 | if (!rcu_dereference(nmi_callback)(regs, cpu)) |
1da177e4 LT |
765 | default_do_nmi(regs); |
766 | ||
767 | nmi_exit(); | |
768 | } | |
769 | ||
770 | void set_nmi_callback(nmi_callback_t callback) | |
771 | { | |
101f12af | 772 | vmalloc_sync_all(); |
19306059 | 773 | rcu_assign_pointer(nmi_callback, callback); |
1da177e4 | 774 | } |
129f6946 | 775 | EXPORT_SYMBOL_GPL(set_nmi_callback); |
1da177e4 LT |
776 | |
777 | void unset_nmi_callback(void) | |
778 | { | |
779 | nmi_callback = dummy_nmi_callback; | |
780 | } | |
129f6946 | 781 | EXPORT_SYMBOL_GPL(unset_nmi_callback); |
1da177e4 LT |
782 | |
783 | #ifdef CONFIG_KPROBES | |
3d97ae5b | 784 | fastcall void __kprobes do_int3(struct pt_regs *regs, long error_code) |
1da177e4 LT |
785 | { |
786 | if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP) | |
787 | == NOTIFY_STOP) | |
48c88211 | 788 | return; |
1da177e4 LT |
789 | /* This is an interrupt gate, because kprobes wants interrupts |
790 | disabled. Normal trap handlers don't. */ | |
791 | restore_interrupts(regs); | |
792 | do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL); | |
1da177e4 LT |
793 | } |
794 | #endif | |
795 | ||
796 | /* | |
797 | * Our handling of the processor debug registers is non-trivial. | |
798 | * We do not clear them on entry and exit from the kernel. Therefore | |
799 | * it is possible to get a watchpoint trap here from inside the kernel. | |
800 | * However, the code in ./ptrace.c has ensured that the user can | |
801 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
802 | * watchpoint trap can only occur in code which is reading/writing | |
803 | * from user space. Such code must not hold kernel locks (since it | |
804 | * can equally take a page fault), therefore it is safe to call | |
805 | * force_sig_info even though that claims and releases locks. | |
806 | * | |
807 | * Code in ./signal.c ensures that the debug control register | |
808 | * is restored before we deliver any signal, and therefore that | |
809 | * user code runs with the correct debug control register even though | |
810 | * we clear it here. | |
811 | * | |
812 | * Being careful here means that we don't have to be as careful in a | |
813 | * lot of more complicated places (task switching can be a bit lazy | |
814 | * about restoring all the debug state, and ptrace doesn't have to | |
815 | * find every occurrence of the TF bit that could be saved away even | |
816 | * by user code) | |
817 | */ | |
3d97ae5b | 818 | fastcall void __kprobes do_debug(struct pt_regs * regs, long error_code) |
1da177e4 LT |
819 | { |
820 | unsigned int condition; | |
821 | struct task_struct *tsk = current; | |
822 | ||
1cc6f12e | 823 | get_debugreg(condition, 6); |
1da177e4 LT |
824 | |
825 | if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code, | |
826 | SIGTRAP) == NOTIFY_STOP) | |
827 | return; | |
828 | /* It's safe to allow irq's after DR6 has been saved */ | |
829 | if (regs->eflags & X86_EFLAGS_IF) | |
830 | local_irq_enable(); | |
831 | ||
832 | /* Mask out spurious debug traps due to lazy DR7 setting */ | |
833 | if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) { | |
834 | if (!tsk->thread.debugreg[7]) | |
835 | goto clear_dr7; | |
836 | } | |
837 | ||
838 | if (regs->eflags & VM_MASK) | |
839 | goto debug_vm86; | |
840 | ||
841 | /* Save debug status register where ptrace can see it */ | |
842 | tsk->thread.debugreg[6] = condition; | |
843 | ||
844 | /* | |
845 | * Single-stepping through TF: make sure we ignore any events in | |
846 | * kernel space (but re-enable TF when returning to user mode). | |
847 | */ | |
848 | if (condition & DR_STEP) { | |
849 | /* | |
850 | * We already checked v86 mode above, so we can | |
851 | * check for kernel mode by just checking the CPL | |
852 | * of CS. | |
853 | */ | |
717b594a | 854 | if (!user_mode(regs)) |
1da177e4 LT |
855 | goto clear_TF_reenable; |
856 | } | |
857 | ||
858 | /* Ok, finally something we can handle */ | |
859 | send_sigtrap(tsk, regs, error_code); | |
860 | ||
861 | /* Disable additional traps. They'll be re-enabled when | |
862 | * the signal is delivered. | |
863 | */ | |
864 | clear_dr7: | |
1cc6f12e | 865 | set_debugreg(0, 7); |
1da177e4 LT |
866 | return; |
867 | ||
868 | debug_vm86: | |
869 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1); | |
870 | return; | |
871 | ||
872 | clear_TF_reenable: | |
873 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
874 | regs->eflags &= ~TF_MASK; | |
875 | return; | |
876 | } | |
877 | ||
878 | /* | |
879 | * Note that we play around with the 'TS' bit in an attempt to get | |
880 | * the correct behaviour even in the presence of the asynchronous | |
881 | * IRQ13 behaviour | |
882 | */ | |
883 | void math_error(void __user *eip) | |
884 | { | |
885 | struct task_struct * task; | |
886 | siginfo_t info; | |
887 | unsigned short cwd, swd; | |
888 | ||
889 | /* | |
890 | * Save the info for the exception handler and clear the error. | |
891 | */ | |
892 | task = current; | |
893 | save_init_fpu(task); | |
894 | task->thread.trap_no = 16; | |
895 | task->thread.error_code = 0; | |
896 | info.si_signo = SIGFPE; | |
897 | info.si_errno = 0; | |
898 | info.si_code = __SI_FAULT; | |
899 | info.si_addr = eip; | |
900 | /* | |
901 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
902 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
903 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
904 | * fault bit. We should only be taking one exception at a time, | |
905 | * so if this combination doesn't produce any single exception, | |
906 | * then we have a bad program that isn't syncronizing its FPU usage | |
907 | * and it will suffer the consequences since we won't be able to | |
908 | * fully reproduce the context of the exception | |
909 | */ | |
910 | cwd = get_fpu_cwd(task); | |
911 | swd = get_fpu_swd(task); | |
b1daec30 | 912 | switch (swd & ~cwd & 0x3f) { |
33333373 CE |
913 | case 0x000: /* No unmasked exception */ |
914 | return; | |
915 | default: /* Multiple exceptions */ | |
1da177e4 LT |
916 | break; |
917 | case 0x001: /* Invalid Op */ | |
b1daec30 CE |
918 | /* |
919 | * swd & 0x240 == 0x040: Stack Underflow | |
920 | * swd & 0x240 == 0x240: Stack Overflow | |
921 | * User must clear the SF bit (0x40) if set | |
922 | */ | |
1da177e4 | 923 | info.si_code = FPE_FLTINV; |
1da177e4 LT |
924 | break; |
925 | case 0x002: /* Denormalize */ | |
926 | case 0x010: /* Underflow */ | |
927 | info.si_code = FPE_FLTUND; | |
928 | break; | |
929 | case 0x004: /* Zero Divide */ | |
930 | info.si_code = FPE_FLTDIV; | |
931 | break; | |
932 | case 0x008: /* Overflow */ | |
933 | info.si_code = FPE_FLTOVF; | |
934 | break; | |
935 | case 0x020: /* Precision */ | |
936 | info.si_code = FPE_FLTRES; | |
937 | break; | |
938 | } | |
939 | force_sig_info(SIGFPE, &info, task); | |
940 | } | |
941 | ||
942 | fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code) | |
943 | { | |
944 | ignore_fpu_irq = 1; | |
945 | math_error((void __user *)regs->eip); | |
946 | } | |
947 | ||
948 | static void simd_math_error(void __user *eip) | |
949 | { | |
950 | struct task_struct * task; | |
951 | siginfo_t info; | |
952 | unsigned short mxcsr; | |
953 | ||
954 | /* | |
955 | * Save the info for the exception handler and clear the error. | |
956 | */ | |
957 | task = current; | |
958 | save_init_fpu(task); | |
959 | task->thread.trap_no = 19; | |
960 | task->thread.error_code = 0; | |
961 | info.si_signo = SIGFPE; | |
962 | info.si_errno = 0; | |
963 | info.si_code = __SI_FAULT; | |
964 | info.si_addr = eip; | |
965 | /* | |
966 | * The SIMD FPU exceptions are handled a little differently, as there | |
967 | * is only a single status/control register. Thus, to determine which | |
968 | * unmasked exception was caught we must mask the exception mask bits | |
969 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
970 | */ | |
971 | mxcsr = get_fpu_mxcsr(task); | |
972 | switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) { | |
973 | case 0x000: | |
974 | default: | |
975 | break; | |
976 | case 0x001: /* Invalid Op */ | |
977 | info.si_code = FPE_FLTINV; | |
978 | break; | |
979 | case 0x002: /* Denormalize */ | |
980 | case 0x010: /* Underflow */ | |
981 | info.si_code = FPE_FLTUND; | |
982 | break; | |
983 | case 0x004: /* Zero Divide */ | |
984 | info.si_code = FPE_FLTDIV; | |
985 | break; | |
986 | case 0x008: /* Overflow */ | |
987 | info.si_code = FPE_FLTOVF; | |
988 | break; | |
989 | case 0x020: /* Precision */ | |
990 | info.si_code = FPE_FLTRES; | |
991 | break; | |
992 | } | |
993 | force_sig_info(SIGFPE, &info, task); | |
994 | } | |
995 | ||
996 | fastcall void do_simd_coprocessor_error(struct pt_regs * regs, | |
997 | long error_code) | |
998 | { | |
999 | if (cpu_has_xmm) { | |
1000 | /* Handle SIMD FPU exceptions on PIII+ processors. */ | |
1001 | ignore_fpu_irq = 1; | |
1002 | simd_math_error((void __user *)regs->eip); | |
1003 | } else { | |
1004 | /* | |
1005 | * Handle strange cache flush from user space exception | |
1006 | * in all other cases. This is undocumented behaviour. | |
1007 | */ | |
1008 | if (regs->eflags & VM_MASK) { | |
1009 | handle_vm86_fault((struct kernel_vm86_regs *)regs, | |
1010 | error_code); | |
1011 | return; | |
1012 | } | |
1da177e4 LT |
1013 | current->thread.trap_no = 19; |
1014 | current->thread.error_code = error_code; | |
4f339ecb | 1015 | die_if_kernel("cache flush denied", regs, error_code); |
1da177e4 LT |
1016 | force_sig(SIGSEGV, current); |
1017 | } | |
1018 | } | |
1019 | ||
1020 | fastcall void do_spurious_interrupt_bug(struct pt_regs * regs, | |
1021 | long error_code) | |
1022 | { | |
1023 | #if 0 | |
1024 | /* No need to warn about this any longer. */ | |
1025 | printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); | |
1026 | #endif | |
1027 | } | |
1028 | ||
1029 | fastcall void setup_x86_bogus_stack(unsigned char * stk) | |
1030 | { | |
1031 | unsigned long *switch16_ptr, *switch32_ptr; | |
1032 | struct pt_regs *regs; | |
1033 | unsigned long stack_top, stack_bot; | |
1034 | unsigned short iret_frame16_off; | |
1035 | int cpu = smp_processor_id(); | |
1036 | /* reserve the space on 32bit stack for the magic switch16 pointer */ | |
1037 | memmove(stk, stk + 8, sizeof(struct pt_regs)); | |
1038 | switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs)); | |
1039 | regs = (struct pt_regs *)stk; | |
1040 | /* now the switch32 on 16bit stack */ | |
1041 | stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu); | |
1042 | stack_top = stack_bot + CPU_16BIT_STACK_SIZE; | |
1043 | switch32_ptr = (unsigned long *)(stack_top - 8); | |
1044 | iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20; | |
1045 | /* copy iret frame on 16bit stack */ | |
1046 | memcpy((void *)(stack_bot + iret_frame16_off), ®s->eip, 20); | |
1047 | /* fill in the switch pointers */ | |
1048 | switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off; | |
1049 | switch16_ptr[1] = __ESPFIX_SS; | |
1050 | switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) + | |
1051 | 8 - CPU_16BIT_STACK_SIZE; | |
1052 | switch32_ptr[1] = __KERNEL_DS; | |
1053 | } | |
1054 | ||
1055 | fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp) | |
1056 | { | |
1057 | unsigned long *switch32_ptr; | |
1058 | unsigned char *stack16, *stack32; | |
1059 | unsigned long stack_top, stack_bot; | |
1060 | int len; | |
1061 | int cpu = smp_processor_id(); | |
1062 | stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu); | |
1063 | stack_top = stack_bot + CPU_16BIT_STACK_SIZE; | |
1064 | switch32_ptr = (unsigned long *)(stack_top - 8); | |
1065 | /* copy the data from 16bit stack to 32bit stack */ | |
1066 | len = CPU_16BIT_STACK_SIZE - 8 - sp; | |
1067 | stack16 = (unsigned char *)(stack_bot + sp); | |
1068 | stack32 = (unsigned char *) | |
1069 | (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len); | |
1070 | memcpy(stack32, stack16, len); | |
1071 | return stack32; | |
1072 | } | |
1073 | ||
1074 | /* | |
1075 | * 'math_state_restore()' saves the current math information in the | |
1076 | * old math state array, and gets the new ones from the current task | |
1077 | * | |
1078 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
1079 | * Don't touch unless you *really* know how it works. | |
1080 | * | |
1081 | * Must be called with kernel preemption disabled (in this case, | |
1082 | * local interrupts are disabled at the call-site in entry.S). | |
1083 | */ | |
1084 | asmlinkage void math_state_restore(struct pt_regs regs) | |
1085 | { | |
1086 | struct thread_info *thread = current_thread_info(); | |
1087 | struct task_struct *tsk = thread->task; | |
1088 | ||
1089 | clts(); /* Allow maths ops (or we recurse) */ | |
1090 | if (!tsk_used_math(tsk)) | |
1091 | init_fpu(tsk); | |
1092 | restore_fpu(tsk); | |
1093 | thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */ | |
1094 | } | |
1095 | ||
1096 | #ifndef CONFIG_MATH_EMULATION | |
1097 | ||
1098 | asmlinkage void math_emulate(long arg) | |
1099 | { | |
9c107805 DJ |
1100 | printk(KERN_EMERG "math-emulation not enabled and no coprocessor found.\n"); |
1101 | printk(KERN_EMERG "killing %s.\n",current->comm); | |
1da177e4 LT |
1102 | force_sig(SIGFPE,current); |
1103 | schedule(); | |
1104 | } | |
1105 | ||
1106 | #endif /* CONFIG_MATH_EMULATION */ | |
1107 | ||
1108 | #ifdef CONFIG_X86_F00F_BUG | |
1109 | void __init trap_init_f00f_bug(void) | |
1110 | { | |
1111 | __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO); | |
1112 | ||
1113 | /* | |
1114 | * Update the IDT descriptor and reload the IDT so that | |
1115 | * it uses the read-only mapped virtual address. | |
1116 | */ | |
1117 | idt_descr.address = fix_to_virt(FIX_F00F_IDT); | |
4d37e7e3 | 1118 | load_idt(&idt_descr); |
1da177e4 LT |
1119 | } |
1120 | #endif | |
1121 | ||
1122 | #define _set_gate(gate_addr,type,dpl,addr,seg) \ | |
1123 | do { \ | |
1124 | int __d0, __d1; \ | |
1125 | __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \ | |
1126 | "movw %4,%%dx\n\t" \ | |
1127 | "movl %%eax,%0\n\t" \ | |
1128 | "movl %%edx,%1" \ | |
1129 | :"=m" (*((long *) (gate_addr))), \ | |
1130 | "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \ | |
1131 | :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \ | |
1132 | "3" ((char *) (addr)),"2" ((seg) << 16)); \ | |
1133 | } while (0) | |
1134 | ||
1135 | ||
1136 | /* | |
1137 | * This needs to use 'idt_table' rather than 'idt', and | |
1138 | * thus use the _nonmapped_ version of the IDT, as the | |
1139 | * Pentium F0 0F bugfix can have resulted in the mapped | |
1140 | * IDT being write-protected. | |
1141 | */ | |
1142 | void set_intr_gate(unsigned int n, void *addr) | |
1143 | { | |
1144 | _set_gate(idt_table+n,14,0,addr,__KERNEL_CS); | |
1145 | } | |
1146 | ||
1147 | /* | |
1148 | * This routine sets up an interrupt gate at directory privilege level 3. | |
1149 | */ | |
1150 | static inline void set_system_intr_gate(unsigned int n, void *addr) | |
1151 | { | |
1152 | _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS); | |
1153 | } | |
1154 | ||
1155 | static void __init set_trap_gate(unsigned int n, void *addr) | |
1156 | { | |
1157 | _set_gate(idt_table+n,15,0,addr,__KERNEL_CS); | |
1158 | } | |
1159 | ||
1160 | static void __init set_system_gate(unsigned int n, void *addr) | |
1161 | { | |
1162 | _set_gate(idt_table+n,15,3,addr,__KERNEL_CS); | |
1163 | } | |
1164 | ||
1165 | static void __init set_task_gate(unsigned int n, unsigned int gdt_entry) | |
1166 | { | |
1167 | _set_gate(idt_table+n,5,0,0,(gdt_entry<<3)); | |
1168 | } | |
1169 | ||
1170 | ||
1171 | void __init trap_init(void) | |
1172 | { | |
1173 | #ifdef CONFIG_EISA | |
1174 | void __iomem *p = ioremap(0x0FFFD9, 4); | |
1175 | if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) { | |
1176 | EISA_bus = 1; | |
1177 | } | |
1178 | iounmap(p); | |
1179 | #endif | |
1180 | ||
1181 | #ifdef CONFIG_X86_LOCAL_APIC | |
1182 | init_apic_mappings(); | |
1183 | #endif | |
1184 | ||
1185 | set_trap_gate(0,÷_error); | |
1186 | set_intr_gate(1,&debug); | |
1187 | set_intr_gate(2,&nmi); | |
eb05c324 | 1188 | set_system_intr_gate(3, &int3); /* int3/4 can be called from all */ |
1da177e4 | 1189 | set_system_gate(4,&overflow); |
eb05c324 | 1190 | set_trap_gate(5,&bounds); |
1da177e4 LT |
1191 | set_trap_gate(6,&invalid_op); |
1192 | set_trap_gate(7,&device_not_available); | |
1193 | set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS); | |
1194 | set_trap_gate(9,&coprocessor_segment_overrun); | |
1195 | set_trap_gate(10,&invalid_TSS); | |
1196 | set_trap_gate(11,&segment_not_present); | |
1197 | set_trap_gate(12,&stack_segment); | |
1198 | set_trap_gate(13,&general_protection); | |
1199 | set_intr_gate(14,&page_fault); | |
1200 | set_trap_gate(15,&spurious_interrupt_bug); | |
1201 | set_trap_gate(16,&coprocessor_error); | |
1202 | set_trap_gate(17,&alignment_check); | |
1203 | #ifdef CONFIG_X86_MCE | |
1204 | set_trap_gate(18,&machine_check); | |
1205 | #endif | |
1206 | set_trap_gate(19,&simd_coprocessor_error); | |
1207 | ||
d43c6e80 JB |
1208 | if (cpu_has_fxsr) { |
1209 | /* | |
1210 | * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned. | |
1211 | * Generates a compile-time "error: zero width for bit-field" if | |
1212 | * the alignment is wrong. | |
1213 | */ | |
1214 | struct fxsrAlignAssert { | |
1215 | int _:!(offsetof(struct task_struct, | |
1216 | thread.i387.fxsave) & 15); | |
1217 | }; | |
1218 | ||
1219 | printk(KERN_INFO "Enabling fast FPU save and restore... "); | |
1220 | set_in_cr4(X86_CR4_OSFXSR); | |
1221 | printk("done.\n"); | |
1222 | } | |
1223 | if (cpu_has_xmm) { | |
1224 | printk(KERN_INFO "Enabling unmasked SIMD FPU exception " | |
1225 | "support... "); | |
1226 | set_in_cr4(X86_CR4_OSXMMEXCPT); | |
1227 | printk("done.\n"); | |
1228 | } | |
1229 | ||
1da177e4 LT |
1230 | set_system_gate(SYSCALL_VECTOR,&system_call); |
1231 | ||
1232 | /* | |
1233 | * Should be a barrier for any external CPU state. | |
1234 | */ | |
1235 | cpu_init(); | |
1236 | ||
1237 | trap_init_hook(); | |
1238 | } | |
1239 | ||
1240 | static int __init kstack_setup(char *s) | |
1241 | { | |
1242 | kstack_depth_to_print = simple_strtoul(s, NULL, 0); | |
9b41046c | 1243 | return 1; |
1da177e4 LT |
1244 | } |
1245 | __setup("kstack=", kstack_setup); | |
c33bd9aa | 1246 | |
ea424055 | 1247 | #ifdef CONFIG_STACK_UNWIND |
c33bd9aa JB |
1248 | static int __init call_trace_setup(char *s) |
1249 | { | |
1250 | if (strcmp(s, "old") == 0) | |
1251 | call_trace = -1; | |
1252 | else if (strcmp(s, "both") == 0) | |
1253 | call_trace = 0; | |
70583161 | 1254 | else if (strcmp(s, "newfallback") == 0) |
c33bd9aa | 1255 | call_trace = 1; |
70583161 AK |
1256 | else if (strcmp(s, "new") == 2) |
1257 | call_trace = 2; | |
c33bd9aa JB |
1258 | return 1; |
1259 | } | |
1260 | __setup("call_trace=", call_trace_setup); | |
ea424055 | 1261 | #endif |