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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Machine specific setup for generic | |
3 | */ | |
4 | ||
5 | #include <linux/config.h> | |
6 | #include <linux/init.h> | |
7 | #include <linux/irq.h> | |
8 | #include <linux/interrupt.h> | |
9 | #include <asm/acpi.h> | |
10 | #include <asm/arch_hooks.h> | |
11 | ||
12 | void __init pre_intr_init_hook(void) | |
13 | { | |
14 | init_ISA_irqs(); | |
15 | } | |
16 | ||
17 | /* | |
18 | * IRQ2 is cascade interrupt to second interrupt controller | |
19 | */ | |
20 | static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; | |
21 | ||
22 | void __init intr_init_hook(void) | |
23 | { | |
24 | #ifdef CONFIG_SMP | |
25 | smp_intr_init(); | |
26 | #endif | |
27 | ||
28 | if (!acpi_ioapic) | |
29 | setup_irq(2, &irq2); | |
30 | } | |
31 | ||
32 | void __init pre_setup_arch_hook(void) | |
33 | { | |
34 | /* Voyagers run their CPUs from independent clocks, so disable | |
35 | * the TSC code because we can't sync them */ | |
36 | tsc_disable = 1; | |
37 | } | |
38 | ||
39 | void __init trap_init_hook(void) | |
40 | { | |
41 | } | |
42 | ||
43 | static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; | |
44 | ||
45 | void __init time_init_hook(void) | |
46 | { | |
47 | setup_irq(0, &irq0); | |
48 | } |