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CommitLineData
1da177e4
LT
1/*
2 * Machine vector for IA-64.
3 *
4 * Copyright (C) 1999 Silicon Graphics, Inc.
5 * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
6 * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
7 * Copyright (C) 1999-2001, 2003-2004 Hewlett-Packard Co.
8 * David Mosberger-Tang <davidm@hpl.hp.com>
9 */
10#ifndef _ASM_IA64_MACHVEC_H
11#define _ASM_IA64_MACHVEC_H
12
1da177e4
LT
13#include <linux/types.h>
14
15/* forward declarations: */
16struct device;
17struct pt_regs;
18struct scatterlist;
19struct page;
20struct mm_struct;
21struct pci_bus;
e08e6c52 22struct task_struct;
3b7d1921 23struct pci_dev;
f7feaca7 24struct msi_desc;
309df0c5 25struct dma_attrs;
1da177e4
LT
26
27typedef void ia64_mv_setup_t (char **);
28typedef void ia64_mv_cpu_init_t (void);
29typedef void ia64_mv_irq_init_t (void);
30typedef void ia64_mv_send_ipi_t (int, int, int, int);
7d12e780 31typedef void ia64_mv_timer_interrupt_t (int, void *);
c1902aae 32typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long);
1da177e4 33typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *);
1115200a 34typedef u8 ia64_mv_irq_to_vector (int);
1da177e4
LT
35typedef unsigned int ia64_mv_local_vector_to_irq (u8);
36typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *);
37typedef int ia64_mv_pci_legacy_read_t (struct pci_bus *, u16 port, u32 *val,
38 u8 size);
39typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val,
40 u8 size);
e08e6c52 41typedef void ia64_mv_migrate_t(struct task_struct * task);
8ea6091f 42typedef void ia64_mv_pci_fixup_bus_t (struct pci_bus *);
a7956113 43typedef void ia64_mv_kernel_launch_event_t(void);
1da177e4
LT
44
45/* DMA-mapping interface: */
46typedef void ia64_mv_dma_init (void);
06a54497 47typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t);
1da177e4
LT
48typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t);
49typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int);
50typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int);
51typedef int ia64_mv_dma_map_sg (struct device *, struct scatterlist *, int, int);
52typedef void ia64_mv_dma_unmap_sg (struct device *, struct scatterlist *, int, int);
53typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_t, int);
54typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int);
55typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int);
56typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int);
8d8bb39b 57typedef int ia64_mv_dma_mapping_error(struct device *, dma_addr_t dma_addr);
1da177e4
LT
58typedef int ia64_mv_dma_supported (struct device *, u64);
59
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60typedef dma_addr_t ia64_mv_dma_map_single_attrs (struct device *, void *, size_t, int, struct dma_attrs *);
61typedef void ia64_mv_dma_unmap_single_attrs (struct device *, dma_addr_t, size_t, int, struct dma_attrs *);
62typedef int ia64_mv_dma_map_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
63typedef void ia64_mv_dma_unmap_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
64
1da177e4
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65/*
66 * WARNING: The legacy I/O space is _architected_. Platforms are
67 * expected to follow this architected model (see Section 10.7 in the
68 * IA-64 Architecture Software Developer's Manual). Unfortunately,
69 * some broken machines do not follow that model, which is why we have
70 * to make the inX/outX operations part of the machine vector.
71 * Platform designers should follow the architected model whenever
72 * possible.
73 */
74typedef unsigned int ia64_mv_inb_t (unsigned long);
75typedef unsigned int ia64_mv_inw_t (unsigned long);
76typedef unsigned int ia64_mv_inl_t (unsigned long);
77typedef void ia64_mv_outb_t (unsigned char, unsigned long);
78typedef void ia64_mv_outw_t (unsigned short, unsigned long);
79typedef void ia64_mv_outl_t (unsigned int, unsigned long);
80typedef void ia64_mv_mmiowb_t (void);
81typedef unsigned char ia64_mv_readb_t (const volatile void __iomem *);
82typedef unsigned short ia64_mv_readw_t (const volatile void __iomem *);
83typedef unsigned int ia64_mv_readl_t (const volatile void __iomem *);
84typedef unsigned long ia64_mv_readq_t (const volatile void __iomem *);
85typedef unsigned char ia64_mv_readb_relaxed_t (const volatile void __iomem *);
86typedef unsigned short ia64_mv_readw_relaxed_t (const volatile void __iomem *);
87typedef unsigned int ia64_mv_readl_relaxed_t (const volatile void __iomem *);
88typedef unsigned long ia64_mv_readq_relaxed_t (const volatile void __iomem *);
3b7d1921 89
f7feaca7 90typedef int ia64_mv_setup_msi_irq_t (struct pci_dev *pdev, struct msi_desc *);
3b7d1921 91typedef void ia64_mv_teardown_msi_irq_t (unsigned int irq);
1da177e4
LT
92
93static inline void
94machvec_noop (void)
95{
96}
97
98static inline void
99machvec_noop_mm (struct mm_struct *mm)
100{
101}
102
e08e6c52
BC
103static inline void
104machvec_noop_task (struct task_struct *task)
105{
106}
107
8ea6091f
JK
108static inline void
109machvec_noop_bus (struct pci_bus *bus)
110{
111}
112
1da177e4 113extern void machvec_setup (char **);
7d12e780 114extern void machvec_timer_interrupt (int, void *);
1da177e4
LT
115extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int);
116extern void machvec_dma_sync_sg (struct device *, struct scatterlist *, int, int);
117extern void machvec_tlb_migrate_finish (struct mm_struct *);
118
119# if defined (CONFIG_IA64_HP_SIM)
120# include <asm/machvec_hpsim.h>
121# elif defined (CONFIG_IA64_DIG)
122# include <asm/machvec_dig.h>
62fdd767
FY
123# elif defined(CONFIG_IA64_DIG_VTD)
124# include <asm/machvec_dig_vtd.h>
1da177e4
LT
125# elif defined (CONFIG_IA64_HP_ZX1)
126# include <asm/machvec_hpzx1.h>
127# elif defined (CONFIG_IA64_HP_ZX1_SWIOTLB)
128# include <asm/machvec_hpzx1_swiotlb.h>
129# elif defined (CONFIG_IA64_SGI_SN2)
130# include <asm/machvec_sn2.h>
22246614
JS
131# elif defined (CONFIG_IA64_SGI_UV)
132# include <asm/machvec_uv.h>
1da177e4
LT
133# elif defined (CONFIG_IA64_GENERIC)
134
135# ifdef MACHVEC_PLATFORM_HEADER
136# include MACHVEC_PLATFORM_HEADER
137# else
138# define platform_name ia64_mv.name
139# define platform_setup ia64_mv.setup
140# define platform_cpu_init ia64_mv.cpu_init
141# define platform_irq_init ia64_mv.irq_init
142# define platform_send_ipi ia64_mv.send_ipi
143# define platform_timer_interrupt ia64_mv.timer_interrupt
144# define platform_global_tlb_purge ia64_mv.global_tlb_purge
145# define platform_tlb_migrate_finish ia64_mv.tlb_migrate_finish
146# define platform_dma_init ia64_mv.dma_init
147# define platform_dma_alloc_coherent ia64_mv.dma_alloc_coherent
148# define platform_dma_free_coherent ia64_mv.dma_free_coherent
309df0c5
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149# define platform_dma_map_single_attrs ia64_mv.dma_map_single_attrs
150# define platform_dma_unmap_single_attrs ia64_mv.dma_unmap_single_attrs
151# define platform_dma_map_sg_attrs ia64_mv.dma_map_sg_attrs
152# define platform_dma_unmap_sg_attrs ia64_mv.dma_unmap_sg_attrs
1da177e4
LT
153# define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu
154# define platform_dma_sync_sg_for_cpu ia64_mv.dma_sync_sg_for_cpu
155# define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device
156# define platform_dma_sync_sg_for_device ia64_mv.dma_sync_sg_for_device
157# define platform_dma_mapping_error ia64_mv.dma_mapping_error
158# define platform_dma_supported ia64_mv.dma_supported
1115200a 159# define platform_irq_to_vector ia64_mv.irq_to_vector
1da177e4
LT
160# define platform_local_vector_to_irq ia64_mv.local_vector_to_irq
161# define platform_pci_get_legacy_mem ia64_mv.pci_get_legacy_mem
162# define platform_pci_legacy_read ia64_mv.pci_legacy_read
163# define platform_pci_legacy_write ia64_mv.pci_legacy_write
164# define platform_inb ia64_mv.inb
165# define platform_inw ia64_mv.inw
166# define platform_inl ia64_mv.inl
167# define platform_outb ia64_mv.outb
168# define platform_outw ia64_mv.outw
169# define platform_outl ia64_mv.outl
170# define platform_mmiowb ia64_mv.mmiowb
171# define platform_readb ia64_mv.readb
172# define platform_readw ia64_mv.readw
173# define platform_readl ia64_mv.readl
174# define platform_readq ia64_mv.readq
175# define platform_readb_relaxed ia64_mv.readb_relaxed
176# define platform_readw_relaxed ia64_mv.readw_relaxed
177# define platform_readl_relaxed ia64_mv.readl_relaxed
178# define platform_readq_relaxed ia64_mv.readq_relaxed
e08e6c52 179# define platform_migrate ia64_mv.migrate
3b7d1921
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180# define platform_setup_msi_irq ia64_mv.setup_msi_irq
181# define platform_teardown_msi_irq ia64_mv.teardown_msi_irq
8ea6091f 182# define platform_pci_fixup_bus ia64_mv.pci_fixup_bus
6a3d0390 183# define platform_kernel_launch_event ia64_mv.kernel_launch_event
1da177e4
LT
184# endif
185
186/* __attribute__((__aligned__(16))) is required to make size of the
187 * structure multiple of 16 bytes.
188 * This will fillup the holes created because of section 3.3.1 in
189 * Software Conventions guide.
190 */
191struct ia64_machine_vector {
192 const char *name;
193 ia64_mv_setup_t *setup;
194 ia64_mv_cpu_init_t *cpu_init;
195 ia64_mv_irq_init_t *irq_init;
196 ia64_mv_send_ipi_t *send_ipi;
197 ia64_mv_timer_interrupt_t *timer_interrupt;
198 ia64_mv_global_tlb_purge_t *global_tlb_purge;
199 ia64_mv_tlb_migrate_finish_t *tlb_migrate_finish;
200 ia64_mv_dma_init *dma_init;
201 ia64_mv_dma_alloc_coherent *dma_alloc_coherent;
202 ia64_mv_dma_free_coherent *dma_free_coherent;
309df0c5
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203 ia64_mv_dma_map_single_attrs *dma_map_single_attrs;
204 ia64_mv_dma_unmap_single_attrs *dma_unmap_single_attrs;
205 ia64_mv_dma_map_sg_attrs *dma_map_sg_attrs;
206 ia64_mv_dma_unmap_sg_attrs *dma_unmap_sg_attrs;
1da177e4
LT
207 ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu;
208 ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu;
209 ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device;
210 ia64_mv_dma_sync_sg_for_device *dma_sync_sg_for_device;
211 ia64_mv_dma_mapping_error *dma_mapping_error;
212 ia64_mv_dma_supported *dma_supported;
1115200a 213 ia64_mv_irq_to_vector *irq_to_vector;
1da177e4
LT
214 ia64_mv_local_vector_to_irq *local_vector_to_irq;
215 ia64_mv_pci_get_legacy_mem_t *pci_get_legacy_mem;
216 ia64_mv_pci_legacy_read_t *pci_legacy_read;
217 ia64_mv_pci_legacy_write_t *pci_legacy_write;
218 ia64_mv_inb_t *inb;
219 ia64_mv_inw_t *inw;
220 ia64_mv_inl_t *inl;
221 ia64_mv_outb_t *outb;
222 ia64_mv_outw_t *outw;
223 ia64_mv_outl_t *outl;
224 ia64_mv_mmiowb_t *mmiowb;
225 ia64_mv_readb_t *readb;
226 ia64_mv_readw_t *readw;
227 ia64_mv_readl_t *readl;
228 ia64_mv_readq_t *readq;
229 ia64_mv_readb_relaxed_t *readb_relaxed;
230 ia64_mv_readw_relaxed_t *readw_relaxed;
231 ia64_mv_readl_relaxed_t *readl_relaxed;
232 ia64_mv_readq_relaxed_t *readq_relaxed;
e08e6c52 233 ia64_mv_migrate_t *migrate;
3b7d1921
EB
234 ia64_mv_setup_msi_irq_t *setup_msi_irq;
235 ia64_mv_teardown_msi_irq_t *teardown_msi_irq;
8ea6091f 236 ia64_mv_pci_fixup_bus_t *pci_fixup_bus;
a7956113 237 ia64_mv_kernel_launch_event_t *kernel_launch_event;
1da177e4
LT
238} __attribute__((__aligned__(16))); /* align attrib? see above comment */
239
240#define MACHVEC_INIT(name) \
241{ \
242 #name, \
243 platform_setup, \
244 platform_cpu_init, \
245 platform_irq_init, \
246 platform_send_ipi, \
247 platform_timer_interrupt, \
248 platform_global_tlb_purge, \
249 platform_tlb_migrate_finish, \
250 platform_dma_init, \
251 platform_dma_alloc_coherent, \
252 platform_dma_free_coherent, \
309df0c5
AK
253 platform_dma_map_single_attrs, \
254 platform_dma_unmap_single_attrs, \
255 platform_dma_map_sg_attrs, \
256 platform_dma_unmap_sg_attrs, \
1da177e4
LT
257 platform_dma_sync_single_for_cpu, \
258 platform_dma_sync_sg_for_cpu, \
259 platform_dma_sync_single_for_device, \
260 platform_dma_sync_sg_for_device, \
261 platform_dma_mapping_error, \
262 platform_dma_supported, \
1115200a 263 platform_irq_to_vector, \
1da177e4
LT
264 platform_local_vector_to_irq, \
265 platform_pci_get_legacy_mem, \
266 platform_pci_legacy_read, \
267 platform_pci_legacy_write, \
268 platform_inb, \
269 platform_inw, \
270 platform_inl, \
271 platform_outb, \
272 platform_outw, \
273 platform_outl, \
274 platform_mmiowb, \
275 platform_readb, \
276 platform_readw, \
277 platform_readl, \
278 platform_readq, \
279 platform_readb_relaxed, \
280 platform_readw_relaxed, \
281 platform_readl_relaxed, \
282 platform_readq_relaxed, \
e08e6c52 283 platform_migrate, \
3b7d1921
EB
284 platform_setup_msi_irq, \
285 platform_teardown_msi_irq, \
8ea6091f 286 platform_pci_fixup_bus, \
6a3d0390 287 platform_kernel_launch_event \
1da177e4
LT
288}
289
290extern struct ia64_machine_vector ia64_mv;
291extern void machvec_init (const char *name);
a07ee862 292extern void machvec_init_from_cmdline(const char *cmdline);
1da177e4
LT
293
294# else
7f30491c 295# error Unknown configuration. Update arch/ia64/include/asm/machvec.h.
1da177e4
LT
296# endif /* CONFIG_IA64_GENERIC */
297
298/*
299 * Declare default routines which aren't declared anywhere else:
300 */
301extern ia64_mv_dma_init swiotlb_init;
302extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent;
303extern ia64_mv_dma_free_coherent swiotlb_free_coherent;
304extern ia64_mv_dma_map_single swiotlb_map_single;
309df0c5 305extern ia64_mv_dma_map_single_attrs swiotlb_map_single_attrs;
1da177e4 306extern ia64_mv_dma_unmap_single swiotlb_unmap_single;
309df0c5 307extern ia64_mv_dma_unmap_single_attrs swiotlb_unmap_single_attrs;
1da177e4 308extern ia64_mv_dma_map_sg swiotlb_map_sg;
309df0c5 309extern ia64_mv_dma_map_sg_attrs swiotlb_map_sg_attrs;
1da177e4 310extern ia64_mv_dma_unmap_sg swiotlb_unmap_sg;
309df0c5 311extern ia64_mv_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs;
1da177e4
LT
312extern ia64_mv_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu;
313extern ia64_mv_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu;
314extern ia64_mv_dma_sync_single_for_device swiotlb_sync_single_for_device;
315extern ia64_mv_dma_sync_sg_for_device swiotlb_sync_sg_for_device;
316extern ia64_mv_dma_mapping_error swiotlb_dma_mapping_error;
317extern ia64_mv_dma_supported swiotlb_dma_supported;
318
319/*
320 * Define default versions so we can extend machvec for new platforms without having
321 * to update the machvec files for all existing platforms.
322 */
323#ifndef platform_setup
324# define platform_setup machvec_setup
325#endif
326#ifndef platform_cpu_init
327# define platform_cpu_init machvec_noop
328#endif
329#ifndef platform_irq_init
330# define platform_irq_init machvec_noop
331#endif
332
333#ifndef platform_send_ipi
334# define platform_send_ipi ia64_send_ipi /* default to architected version */
335#endif
336#ifndef platform_timer_interrupt
337# define platform_timer_interrupt machvec_timer_interrupt
338#endif
339#ifndef platform_global_tlb_purge
340# define platform_global_tlb_purge ia64_global_tlb_purge /* default to architected version */
341#endif
342#ifndef platform_tlb_migrate_finish
343# define platform_tlb_migrate_finish machvec_noop_mm
344#endif
a7956113
ZN
345#ifndef platform_kernel_launch_event
346# define platform_kernel_launch_event machvec_noop
347#endif
1da177e4
LT
348#ifndef platform_dma_init
349# define platform_dma_init swiotlb_init
350#endif
351#ifndef platform_dma_alloc_coherent
352# define platform_dma_alloc_coherent swiotlb_alloc_coherent
353#endif
354#ifndef platform_dma_free_coherent
355# define platform_dma_free_coherent swiotlb_free_coherent
356#endif
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357#ifndef platform_dma_map_single_attrs
358# define platform_dma_map_single_attrs swiotlb_map_single_attrs
1da177e4 359#endif
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AK
360#ifndef platform_dma_unmap_single_attrs
361# define platform_dma_unmap_single_attrs swiotlb_unmap_single_attrs
1da177e4 362#endif
309df0c5
AK
363#ifndef platform_dma_map_sg_attrs
364# define platform_dma_map_sg_attrs swiotlb_map_sg_attrs
1da177e4 365#endif
309df0c5
AK
366#ifndef platform_dma_unmap_sg_attrs
367# define platform_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs
1da177e4
LT
368#endif
369#ifndef platform_dma_sync_single_for_cpu
370# define platform_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu
371#endif
372#ifndef platform_dma_sync_sg_for_cpu
373# define platform_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu
374#endif
375#ifndef platform_dma_sync_single_for_device
376# define platform_dma_sync_single_for_device swiotlb_sync_single_for_device
377#endif
378#ifndef platform_dma_sync_sg_for_device
379# define platform_dma_sync_sg_for_device swiotlb_sync_sg_for_device
380#endif
381#ifndef platform_dma_mapping_error
382# define platform_dma_mapping_error swiotlb_dma_mapping_error
383#endif
384#ifndef platform_dma_supported
385# define platform_dma_supported swiotlb_dma_supported
386#endif
1115200a
KK
387#ifndef platform_irq_to_vector
388# define platform_irq_to_vector __ia64_irq_to_vector
389#endif
1da177e4
LT
390#ifndef platform_local_vector_to_irq
391# define platform_local_vector_to_irq __ia64_local_vector_to_irq
392#endif
393#ifndef platform_pci_get_legacy_mem
394# define platform_pci_get_legacy_mem ia64_pci_get_legacy_mem
395#endif
396#ifndef platform_pci_legacy_read
397# define platform_pci_legacy_read ia64_pci_legacy_read
a72391e4 398extern int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size);
1da177e4
LT
399#endif
400#ifndef platform_pci_legacy_write
401# define platform_pci_legacy_write ia64_pci_legacy_write
a72391e4 402extern int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size);
1da177e4
LT
403#endif
404#ifndef platform_inb
405# define platform_inb __ia64_inb
406#endif
407#ifndef platform_inw
408# define platform_inw __ia64_inw
409#endif
410#ifndef platform_inl
411# define platform_inl __ia64_inl
412#endif
413#ifndef platform_outb
414# define platform_outb __ia64_outb
415#endif
416#ifndef platform_outw
417# define platform_outw __ia64_outw
418#endif
419#ifndef platform_outl
420# define platform_outl __ia64_outl
421#endif
422#ifndef platform_mmiowb
423# define platform_mmiowb __ia64_mmiowb
424#endif
425#ifndef platform_readb
426# define platform_readb __ia64_readb
427#endif
428#ifndef platform_readw
429# define platform_readw __ia64_readw
430#endif
431#ifndef platform_readl
432# define platform_readl __ia64_readl
433#endif
434#ifndef platform_readq
435# define platform_readq __ia64_readq
436#endif
437#ifndef platform_readb_relaxed
438# define platform_readb_relaxed __ia64_readb_relaxed
439#endif
440#ifndef platform_readw_relaxed
441# define platform_readw_relaxed __ia64_readw_relaxed
442#endif
443#ifndef platform_readl_relaxed
444# define platform_readl_relaxed __ia64_readl_relaxed
445#endif
446#ifndef platform_readq_relaxed
447# define platform_readq_relaxed __ia64_readq_relaxed
448#endif
e08e6c52
BC
449#ifndef platform_migrate
450# define platform_migrate machvec_noop_task
451#endif
3b7d1921
EB
452#ifndef platform_setup_msi_irq
453# define platform_setup_msi_irq ((ia64_mv_setup_msi_irq_t*)NULL)
454#endif
455#ifndef platform_teardown_msi_irq
456# define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL)
fd58e55f 457#endif
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JK
458#ifndef platform_pci_fixup_bus
459# define platform_pci_fixup_bus machvec_noop_bus
460#endif
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LT
461
462#endif /* _ASM_IA64_MACHVEC_H */