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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * This file contains NUMA specific prototypes and definitions. | |
7 | * | |
8 | * 2002/08/05 Erich Focht <efocht@ess.nec.de> | |
9 | * | |
10 | */ | |
11 | #ifndef _ASM_IA64_NUMA_H | |
12 | #define _ASM_IA64_NUMA_H | |
13 | ||
1da177e4 LT |
14 | |
15 | #ifdef CONFIG_NUMA | |
16 | ||
17 | #include <linux/cache.h> | |
18 | #include <linux/cpumask.h> | |
19 | #include <linux/numa.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/threads.h> | |
22 | ||
23 | #include <asm/mmzone.h> | |
24 | ||
2c6e6db4 | 25 | #define NUMA_NO_NODE -1 |
26 | ||
a9de9835 | 27 | extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned; |
1da177e4 | 28 | extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned; |
fd59d231 | 29 | extern pg_data_t *pgdat_list[MAX_NUMNODES]; |
1da177e4 LT |
30 | |
31 | /* Stuff below this line could be architecture independent */ | |
32 | ||
33 | extern int num_node_memblks; /* total number of memory chunks */ | |
34 | ||
35 | /* | |
36 | * List of node memory chunks. Filled when parsing SRAT table to | |
37 | * obtain information about memory nodes. | |
38 | */ | |
39 | ||
40 | struct node_memblk_s { | |
41 | unsigned long start_paddr; | |
42 | unsigned long size; | |
43 | int nid; /* which logical node contains this chunk? */ | |
44 | int bank; /* which mem bank on this node */ | |
45 | }; | |
46 | ||
47 | struct node_cpuid_s { | |
48 | u16 phys_id; /* id << 8 | eid */ | |
49 | int nid; /* logical node containing this CPU */ | |
50 | }; | |
51 | ||
52 | extern struct node_memblk_s node_memblk[NR_NODE_MEMBLKS]; | |
53 | extern struct node_cpuid_s node_cpuid[NR_CPUS]; | |
54 | ||
55 | /* | |
56 | * ACPI 2.0 SLIT (System Locality Information Table) | |
57 | * http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf | |
58 | * | |
59 | * This is a matrix with "distances" between nodes, they should be | |
60 | * proportional to the memory access latency ratios. | |
61 | */ | |
62 | ||
63 | extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES]; | |
64 | #define node_distance(from,to) (numa_slit[(from) * num_online_nodes() + (to)]) | |
65 | ||
66 | extern int paddr_to_nid(unsigned long paddr); | |
67 | ||
68 | #define local_nodeid (cpu_to_node_map[smp_processor_id()]) | |
69 | ||
3212fe15 KH |
70 | extern void map_cpu_to_node(int cpu, int nid); |
71 | extern void unmap_cpu_from_node(int cpu, int nid); | |
72 | ||
73 | ||
1da177e4 | 74 | #else /* !CONFIG_NUMA */ |
bbf2bef9 KH |
75 | #define map_cpu_to_node(cpu, nid) do{}while(0) |
76 | #define unmap_cpu_from_node(cpu, nid) do{}while(0) | |
1da177e4 LT |
77 | |
78 | #define paddr_to_nid(addr) 0 | |
79 | ||
80 | #endif /* CONFIG_NUMA */ | |
81 | ||
82 | #endif /* _ASM_IA64_NUMA_H */ |