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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef _ASM_IA64_PCI_H |
3 | #define _ASM_IA64_PCI_H | |
4 | ||
5 | #include <linux/mm.h> | |
6 | #include <linux/slab.h> | |
7 | #include <linux/spinlock.h> | |
8 | #include <linux/string.h> | |
9 | #include <linux/types.h> | |
84be456f | 10 | #include <linux/scatterlist.h> |
1da177e4 LT |
11 | |
12 | #include <asm/io.h> | |
8621235b | 13 | #include <asm/hw_irq.h> |
1da177e4 | 14 | |
c140d879 DH |
15 | struct pci_vector_struct { |
16 | __u16 segment; /* PCI Segment number */ | |
17 | __u16 bus; /* PCI Bus number */ | |
18 | __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */ | |
19 | __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */ | |
20 | __u32 irq; /* IRQ assigned */ | |
21 | }; | |
22 | ||
1da177e4 LT |
23 | /* |
24 | * Can be used to override the logic in pci_scan_bus for skipping already-configured bus | |
25 | * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the | |
26 | * loader. | |
27 | */ | |
28 | #define pcibios_assign_all_busses() 0 | |
1da177e4 LT |
29 | |
30 | #define PCIBIOS_MIN_IO 0x1000 | |
31 | #define PCIBIOS_MIN_MEM 0x10000000 | |
32 | ||
1da177e4 | 33 | #define HAVE_PCI_MMAP |
d9c102de | 34 | #define ARCH_GENERIC_PCI_MMAP_RESOURCE |
ae749c7a DW |
35 | #define arch_can_pci_mmap_wc() 1 |
36 | ||
1da177e4 LT |
37 | #define HAVE_PCI_LEGACY |
38 | extern int pci_mmap_legacy_page_range(struct pci_bus *bus, | |
f19aeb1f BH |
39 | struct vm_area_struct *vma, |
40 | enum pci_mmap_state mmap_state); | |
1da177e4 LT |
41 | |
42 | #define pci_get_legacy_mem platform_pci_get_legacy_mem | |
43 | #define pci_legacy_read platform_pci_legacy_read | |
44 | #define pci_legacy_write platform_pci_legacy_write | |
45 | ||
1da177e4 | 46 | struct pci_controller { |
7b199811 | 47 | struct acpi_device *companion; |
1da177e4 LT |
48 | void *iommu; |
49 | int segment; | |
b1e9cee7 | 50 | int node; /* nearest node with memory or NUMA_NO_NODE for global allocation */ |
1da177e4 | 51 | |
1da177e4 LT |
52 | void *platform_data; |
53 | }; | |
54 | ||
5cd7595d | 55 | |
1da177e4 LT |
56 | #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata) |
57 | #define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment) | |
58 | ||
59 | extern struct pci_ops pci_root_ops; | |
60 | ||
61 | static inline int pci_proc_domain(struct pci_bus *bus) | |
62 | { | |
63 | return (pci_domain_nr(bus) != 0); | |
64 | } | |
65 | ||
677c0a78 BZ |
66 | #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ |
67 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) | |
68 | { | |
8621235b | 69 | return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14); |
677c0a78 BZ |
70 | } |
71 | ||
d3f13810 | 72 | #ifdef CONFIG_INTEL_IOMMU |
62fdd767 FY |
73 | extern void pci_iommu_alloc(void); |
74 | #endif | |
1da177e4 | 75 | #endif /* _ASM_IA64_PCI_H */ |