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1da177e4 LT |
1 | /* |
2 | * Architecture-specific setup. | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
6 | */ | |
7 | #define __KERNEL_SYSCALLS__ /* see <asm/unistd.h> */ | |
8 | #include <linux/config.h> | |
9 | ||
10 | #include <linux/cpu.h> | |
11 | #include <linux/pm.h> | |
12 | #include <linux/elf.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/kallsyms.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/mm.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/notifier.h> | |
19 | #include <linux/personality.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/smp_lock.h> | |
23 | #include <linux/stddef.h> | |
24 | #include <linux/thread_info.h> | |
25 | #include <linux/unistd.h> | |
26 | #include <linux/efi.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/delay.h> | |
29 | ||
30 | #include <asm/cpu.h> | |
31 | #include <asm/delay.h> | |
32 | #include <asm/elf.h> | |
33 | #include <asm/ia32.h> | |
34 | #include <asm/irq.h> | |
35 | #include <asm/pgalloc.h> | |
36 | #include <asm/processor.h> | |
37 | #include <asm/sal.h> | |
38 | #include <asm/tlbflush.h> | |
39 | #include <asm/uaccess.h> | |
40 | #include <asm/unwind.h> | |
41 | #include <asm/user.h> | |
42 | ||
43 | #include "entry.h" | |
44 | ||
45 | #ifdef CONFIG_PERFMON | |
46 | # include <asm/perfmon.h> | |
47 | #endif | |
48 | ||
49 | #include "sigframe.h" | |
50 | ||
51 | void (*ia64_mark_idle)(int); | |
52 | static cpumask_t cpu_idle_map; | |
53 | ||
54 | unsigned long boot_option_idle_override = 0; | |
55 | EXPORT_SYMBOL(boot_option_idle_override); | |
56 | ||
57 | void | |
58 | ia64_do_show_stack (struct unw_frame_info *info, void *arg) | |
59 | { | |
60 | unsigned long ip, sp, bsp; | |
61 | char buf[128]; /* don't make it so big that it overflows the stack! */ | |
62 | ||
63 | printk("\nCall Trace:\n"); | |
64 | do { | |
65 | unw_get_ip(info, &ip); | |
66 | if (ip == 0) | |
67 | break; | |
68 | ||
69 | unw_get_sp(info, &sp); | |
70 | unw_get_bsp(info, &bsp); | |
71 | snprintf(buf, sizeof(buf), | |
72 | " [<%016lx>] %%s\n" | |
73 | " sp=%016lx bsp=%016lx\n", | |
74 | ip, sp, bsp); | |
75 | print_symbol(buf, ip); | |
76 | } while (unw_unwind(info) >= 0); | |
77 | } | |
78 | ||
79 | void | |
80 | show_stack (struct task_struct *task, unsigned long *sp) | |
81 | { | |
82 | if (!task) | |
83 | unw_init_running(ia64_do_show_stack, NULL); | |
84 | else { | |
85 | struct unw_frame_info info; | |
86 | ||
87 | unw_init_from_blocked_task(&info, task); | |
88 | ia64_do_show_stack(&info, NULL); | |
89 | } | |
90 | } | |
91 | ||
92 | void | |
93 | dump_stack (void) | |
94 | { | |
95 | show_stack(NULL, NULL); | |
96 | } | |
97 | ||
98 | EXPORT_SYMBOL(dump_stack); | |
99 | ||
100 | void | |
101 | show_regs (struct pt_regs *regs) | |
102 | { | |
103 | unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri; | |
104 | ||
105 | print_modules(); | |
106 | printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm); | |
107 | printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n", | |
108 | regs->cr_ipsr, regs->cr_ifs, ip, print_tainted()); | |
109 | print_symbol("ip is at %s\n", ip); | |
110 | printk("unat: %016lx pfs : %016lx rsc : %016lx\n", | |
111 | regs->ar_unat, regs->ar_pfs, regs->ar_rsc); | |
112 | printk("rnat: %016lx bsps: %016lx pr : %016lx\n", | |
113 | regs->ar_rnat, regs->ar_bspstore, regs->pr); | |
114 | printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n", | |
115 | regs->loadrs, regs->ar_ccv, regs->ar_fpsr); | |
116 | printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd); | |
117 | printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7); | |
118 | printk("f6 : %05lx%016lx f7 : %05lx%016lx\n", | |
119 | regs->f6.u.bits[1], regs->f6.u.bits[0], | |
120 | regs->f7.u.bits[1], regs->f7.u.bits[0]); | |
121 | printk("f8 : %05lx%016lx f9 : %05lx%016lx\n", | |
122 | regs->f8.u.bits[1], regs->f8.u.bits[0], | |
123 | regs->f9.u.bits[1], regs->f9.u.bits[0]); | |
124 | printk("f10 : %05lx%016lx f11 : %05lx%016lx\n", | |
125 | regs->f10.u.bits[1], regs->f10.u.bits[0], | |
126 | regs->f11.u.bits[1], regs->f11.u.bits[0]); | |
127 | ||
128 | printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3); | |
129 | printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10); | |
130 | printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13); | |
131 | printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16); | |
132 | printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19); | |
133 | printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22); | |
134 | printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25); | |
135 | printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28); | |
136 | printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31); | |
137 | ||
138 | if (user_mode(regs)) { | |
139 | /* print the stacked registers */ | |
140 | unsigned long val, *bsp, ndirty; | |
141 | int i, sof, is_nat = 0; | |
142 | ||
143 | sof = regs->cr_ifs & 0x7f; /* size of frame */ | |
144 | ndirty = (regs->loadrs >> 19); | |
145 | bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty); | |
146 | for (i = 0; i < sof; ++i) { | |
147 | get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i)); | |
148 | printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val, | |
149 | ((i == sof - 1) || (i % 3) == 2) ? "\n" : " "); | |
150 | } | |
151 | } else | |
152 | show_stack(NULL, NULL); | |
153 | } | |
154 | ||
155 | void | |
156 | do_notify_resume_user (sigset_t *oldset, struct sigscratch *scr, long in_syscall) | |
157 | { | |
158 | if (fsys_mode(current, &scr->pt)) { | |
159 | /* defer signal-handling etc. until we return to privilege-level 0. */ | |
160 | if (!ia64_psr(&scr->pt)->lp) | |
161 | ia64_psr(&scr->pt)->lp = 1; | |
162 | return; | |
163 | } | |
164 | ||
165 | #ifdef CONFIG_PERFMON | |
166 | if (current->thread.pfm_needs_checking) | |
167 | pfm_handle_work(); | |
168 | #endif | |
169 | ||
170 | /* deal with pending signal delivery */ | |
171 | if (test_thread_flag(TIF_SIGPENDING)) | |
172 | ia64_do_signal(oldset, scr, in_syscall); | |
173 | } | |
174 | ||
175 | static int pal_halt = 1; | |
176 | static int __init nohalt_setup(char * str) | |
177 | { | |
178 | pal_halt = 0; | |
179 | return 1; | |
180 | } | |
181 | __setup("nohalt", nohalt_setup); | |
182 | ||
183 | /* | |
184 | * We use this if we don't have any better idle routine.. | |
185 | */ | |
186 | void | |
187 | default_idle (void) | |
188 | { | |
189 | unsigned long pmu_active = ia64_getreg(_IA64_REG_PSR) & (IA64_PSR_PP | IA64_PSR_UP); | |
190 | ||
191 | while (!need_resched()) | |
192 | if (pal_halt && !pmu_active) | |
193 | safe_halt(); | |
194 | else | |
195 | cpu_relax(); | |
196 | } | |
197 | ||
198 | #ifdef CONFIG_HOTPLUG_CPU | |
199 | /* We don't actually take CPU down, just spin without interrupts. */ | |
200 | static inline void play_dead(void) | |
201 | { | |
202 | extern void ia64_cpu_local_tick (void); | |
203 | /* Ack it */ | |
204 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
205 | ||
206 | /* We shouldn't have to disable interrupts while dead, but | |
207 | * some interrupts just don't seem to go away, and this makes | |
208 | * it "work" for testing purposes. */ | |
209 | max_xtp(); | |
210 | local_irq_disable(); | |
211 | /* Death loop */ | |
212 | while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) | |
213 | cpu_relax(); | |
214 | ||
215 | /* | |
216 | * Enable timer interrupts from now on | |
217 | * Not required if we put processor in SAL_BOOT_RENDEZ mode. | |
218 | */ | |
219 | local_flush_tlb_all(); | |
220 | cpu_set(smp_processor_id(), cpu_online_map); | |
221 | wmb(); | |
222 | ia64_cpu_local_tick (); | |
223 | local_irq_enable(); | |
224 | } | |
225 | #else | |
226 | static inline void play_dead(void) | |
227 | { | |
228 | BUG(); | |
229 | } | |
230 | #endif /* CONFIG_HOTPLUG_CPU */ | |
231 | ||
232 | ||
233 | void cpu_idle_wait(void) | |
234 | { | |
235 | int cpu; | |
236 | cpumask_t map; | |
237 | ||
238 | for_each_online_cpu(cpu) | |
239 | cpu_set(cpu, cpu_idle_map); | |
240 | ||
241 | wmb(); | |
242 | do { | |
243 | ssleep(1); | |
244 | cpus_and(map, cpu_idle_map, cpu_online_map); | |
245 | } while (!cpus_empty(map)); | |
246 | } | |
247 | EXPORT_SYMBOL_GPL(cpu_idle_wait); | |
248 | ||
249 | void __attribute__((noreturn)) | |
250 | cpu_idle (void) | |
251 | { | |
252 | void (*mark_idle)(int) = ia64_mark_idle; | |
253 | int cpu = smp_processor_id(); | |
254 | ||
255 | /* endless idle loop with no priority at all */ | |
256 | while (1) { | |
257 | #ifdef CONFIG_SMP | |
258 | if (!need_resched()) | |
259 | min_xtp(); | |
260 | #endif | |
261 | while (!need_resched()) { | |
262 | void (*idle)(void); | |
263 | ||
264 | if (mark_idle) | |
265 | (*mark_idle)(1); | |
266 | ||
267 | if (cpu_isset(cpu, cpu_idle_map)) | |
268 | cpu_clear(cpu, cpu_idle_map); | |
269 | rmb(); | |
270 | idle = pm_idle; | |
271 | if (!idle) | |
272 | idle = default_idle; | |
273 | (*idle)(); | |
274 | } | |
275 | ||
276 | if (mark_idle) | |
277 | (*mark_idle)(0); | |
278 | ||
279 | #ifdef CONFIG_SMP | |
280 | normal_xtp(); | |
281 | #endif | |
282 | schedule(); | |
283 | check_pgt_cache(); | |
284 | if (cpu_is_offline(smp_processor_id())) | |
285 | play_dead(); | |
286 | } | |
287 | } | |
288 | ||
289 | void | |
290 | ia64_save_extra (struct task_struct *task) | |
291 | { | |
292 | #ifdef CONFIG_PERFMON | |
293 | unsigned long info; | |
294 | #endif | |
295 | ||
296 | if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0) | |
297 | ia64_save_debug_regs(&task->thread.dbr[0]); | |
298 | ||
299 | #ifdef CONFIG_PERFMON | |
300 | if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0) | |
301 | pfm_save_regs(task); | |
302 | ||
303 | info = __get_cpu_var(pfm_syst_info); | |
304 | if (info & PFM_CPUINFO_SYST_WIDE) | |
305 | pfm_syst_wide_update_task(task, info, 0); | |
306 | #endif | |
307 | ||
308 | #ifdef CONFIG_IA32_SUPPORT | |
309 | if (IS_IA32_PROCESS(ia64_task_regs(task))) | |
310 | ia32_save_state(task); | |
311 | #endif | |
312 | } | |
313 | ||
314 | void | |
315 | ia64_load_extra (struct task_struct *task) | |
316 | { | |
317 | #ifdef CONFIG_PERFMON | |
318 | unsigned long info; | |
319 | #endif | |
320 | ||
321 | if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0) | |
322 | ia64_load_debug_regs(&task->thread.dbr[0]); | |
323 | ||
324 | #ifdef CONFIG_PERFMON | |
325 | if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0) | |
326 | pfm_load_regs(task); | |
327 | ||
328 | info = __get_cpu_var(pfm_syst_info); | |
329 | if (info & PFM_CPUINFO_SYST_WIDE) | |
330 | pfm_syst_wide_update_task(task, info, 1); | |
331 | #endif | |
332 | ||
333 | #ifdef CONFIG_IA32_SUPPORT | |
334 | if (IS_IA32_PROCESS(ia64_task_regs(task))) | |
335 | ia32_load_state(task); | |
336 | #endif | |
337 | } | |
338 | ||
339 | /* | |
340 | * Copy the state of an ia-64 thread. | |
341 | * | |
342 | * We get here through the following call chain: | |
343 | * | |
344 | * from user-level: from kernel: | |
345 | * | |
346 | * <clone syscall> <some kernel call frames> | |
347 | * sys_clone : | |
348 | * do_fork do_fork | |
349 | * copy_thread copy_thread | |
350 | * | |
351 | * This means that the stack layout is as follows: | |
352 | * | |
353 | * +---------------------+ (highest addr) | |
354 | * | struct pt_regs | | |
355 | * +---------------------+ | |
356 | * | struct switch_stack | | |
357 | * +---------------------+ | |
358 | * | | | |
359 | * | memory stack | | |
360 | * | | <-- sp (lowest addr) | |
361 | * +---------------------+ | |
362 | * | |
363 | * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an | |
364 | * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register, | |
365 | * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the | |
366 | * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since | |
367 | * the stack is page aligned and the page size is at least 4KB, this is always the case, | |
368 | * so there is nothing to worry about. | |
369 | */ | |
370 | int | |
371 | copy_thread (int nr, unsigned long clone_flags, | |
372 | unsigned long user_stack_base, unsigned long user_stack_size, | |
373 | struct task_struct *p, struct pt_regs *regs) | |
374 | { | |
375 | extern char ia64_ret_from_clone, ia32_ret_from_clone; | |
376 | struct switch_stack *child_stack, *stack; | |
377 | unsigned long rbs, child_rbs, rbs_size; | |
378 | struct pt_regs *child_ptregs; | |
379 | int retval = 0; | |
380 | ||
381 | #ifdef CONFIG_SMP | |
382 | /* | |
383 | * For SMP idle threads, fork_by_hand() calls do_fork with | |
384 | * NULL regs. | |
385 | */ | |
386 | if (!regs) | |
387 | return 0; | |
388 | #endif | |
389 | ||
390 | stack = ((struct switch_stack *) regs) - 1; | |
391 | ||
392 | child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1; | |
393 | child_stack = (struct switch_stack *) child_ptregs - 1; | |
394 | ||
395 | /* copy parent's switch_stack & pt_regs to child: */ | |
396 | memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack)); | |
397 | ||
398 | rbs = (unsigned long) current + IA64_RBS_OFFSET; | |
399 | child_rbs = (unsigned long) p + IA64_RBS_OFFSET; | |
400 | rbs_size = stack->ar_bspstore - rbs; | |
401 | ||
402 | /* copy the parent's register backing store to the child: */ | |
403 | memcpy((void *) child_rbs, (void *) rbs, rbs_size); | |
404 | ||
405 | if (likely(user_mode(child_ptregs))) { | |
406 | if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs)) | |
407 | child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */ | |
408 | if (user_stack_base) { | |
409 | child_ptregs->r12 = user_stack_base + user_stack_size - 16; | |
410 | child_ptregs->ar_bspstore = user_stack_base; | |
411 | child_ptregs->ar_rnat = 0; | |
412 | child_ptregs->loadrs = 0; | |
413 | } | |
414 | } else { | |
415 | /* | |
416 | * Note: we simply preserve the relative position of | |
417 | * the stack pointer here. There is no need to | |
418 | * allocate a scratch area here, since that will have | |
419 | * been taken care of by the caller of sys_clone() | |
420 | * already. | |
421 | */ | |
422 | child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */ | |
423 | child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */ | |
424 | } | |
425 | child_stack->ar_bspstore = child_rbs + rbs_size; | |
426 | if (IS_IA32_PROCESS(regs)) | |
427 | child_stack->b0 = (unsigned long) &ia32_ret_from_clone; | |
428 | else | |
429 | child_stack->b0 = (unsigned long) &ia64_ret_from_clone; | |
430 | ||
431 | /* copy parts of thread_struct: */ | |
432 | p->thread.ksp = (unsigned long) child_stack - 16; | |
433 | ||
434 | /* stop some PSR bits from being inherited. | |
435 | * the psr.up/psr.pp bits must be cleared on fork but inherited on execve() | |
436 | * therefore we must specify them explicitly here and not include them in | |
437 | * IA64_PSR_BITS_TO_CLEAR. | |
438 | */ | |
439 | child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET) | |
440 | & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP)); | |
441 | ||
442 | /* | |
443 | * NOTE: The calling convention considers all floating point | |
444 | * registers in the high partition (fph) to be scratch. Since | |
445 | * the only way to get to this point is through a system call, | |
446 | * we know that the values in fph are all dead. Hence, there | |
447 | * is no need to inherit the fph state from the parent to the | |
448 | * child and all we have to do is to make sure that | |
449 | * IA64_THREAD_FPH_VALID is cleared in the child. | |
450 | * | |
451 | * XXX We could push this optimization a bit further by | |
452 | * clearing IA64_THREAD_FPH_VALID on ANY system call. | |
453 | * However, it's not clear this is worth doing. Also, it | |
454 | * would be a slight deviation from the normal Linux system | |
455 | * call behavior where scratch registers are preserved across | |
456 | * system calls (unless used by the system call itself). | |
457 | */ | |
458 | # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \ | |
459 | | IA64_THREAD_PM_VALID) | |
460 | # define THREAD_FLAGS_TO_SET 0 | |
461 | p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR) | |
462 | | THREAD_FLAGS_TO_SET); | |
463 | ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */ | |
464 | #ifdef CONFIG_IA32_SUPPORT | |
465 | /* | |
466 | * If we're cloning an IA32 task then save the IA32 extra | |
467 | * state from the current task to the new task | |
468 | */ | |
469 | if (IS_IA32_PROCESS(ia64_task_regs(current))) { | |
470 | ia32_save_state(p); | |
471 | if (clone_flags & CLONE_SETTLS) | |
472 | retval = ia32_clone_tls(p, child_ptregs); | |
473 | ||
474 | /* Copy partially mapped page list */ | |
475 | if (!retval) | |
476 | retval = ia32_copy_partial_page_list(p, clone_flags); | |
477 | } | |
478 | #endif | |
479 | ||
480 | #ifdef CONFIG_PERFMON | |
481 | if (current->thread.pfm_context) | |
482 | pfm_inherit(p, child_ptregs); | |
483 | #endif | |
484 | return retval; | |
485 | } | |
486 | ||
487 | static void | |
488 | do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg) | |
489 | { | |
490 | unsigned long mask, sp, nat_bits = 0, ip, ar_rnat, urbs_end, cfm; | |
491 | elf_greg_t *dst = arg; | |
492 | struct pt_regs *pt; | |
493 | char nat; | |
494 | int i; | |
495 | ||
496 | memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */ | |
497 | ||
498 | if (unw_unwind_to_user(info) < 0) | |
499 | return; | |
500 | ||
501 | unw_get_sp(info, &sp); | |
502 | pt = (struct pt_regs *) (sp + 16); | |
503 | ||
504 | urbs_end = ia64_get_user_rbs_end(task, pt, &cfm); | |
505 | ||
506 | if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0) | |
507 | return; | |
508 | ||
509 | ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end), | |
510 | &ar_rnat); | |
511 | ||
512 | /* | |
513 | * coredump format: | |
514 | * r0-r31 | |
515 | * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT) | |
516 | * predicate registers (p0-p63) | |
517 | * b0-b7 | |
518 | * ip cfm user-mask | |
519 | * ar.rsc ar.bsp ar.bspstore ar.rnat | |
520 | * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec | |
521 | */ | |
522 | ||
523 | /* r0 is zero */ | |
524 | for (i = 1, mask = (1UL << i); i < 32; ++i) { | |
525 | unw_get_gr(info, i, &dst[i], &nat); | |
526 | if (nat) | |
527 | nat_bits |= mask; | |
528 | mask <<= 1; | |
529 | } | |
530 | dst[32] = nat_bits; | |
531 | unw_get_pr(info, &dst[33]); | |
532 | ||
533 | for (i = 0; i < 8; ++i) | |
534 | unw_get_br(info, i, &dst[34 + i]); | |
535 | ||
536 | unw_get_rp(info, &ip); | |
537 | dst[42] = ip + ia64_psr(pt)->ri; | |
538 | dst[43] = cfm; | |
539 | dst[44] = pt->cr_ipsr & IA64_PSR_UM; | |
540 | ||
541 | unw_get_ar(info, UNW_AR_RSC, &dst[45]); | |
542 | /* | |
543 | * For bsp and bspstore, unw_get_ar() would return the kernel | |
544 | * addresses, but we need the user-level addresses instead: | |
545 | */ | |
546 | dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */ | |
547 | dst[47] = pt->ar_bspstore; | |
548 | dst[48] = ar_rnat; | |
549 | unw_get_ar(info, UNW_AR_CCV, &dst[49]); | |
550 | unw_get_ar(info, UNW_AR_UNAT, &dst[50]); | |
551 | unw_get_ar(info, UNW_AR_FPSR, &dst[51]); | |
552 | dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */ | |
553 | unw_get_ar(info, UNW_AR_LC, &dst[53]); | |
554 | unw_get_ar(info, UNW_AR_EC, &dst[54]); | |
555 | unw_get_ar(info, UNW_AR_CSD, &dst[55]); | |
556 | unw_get_ar(info, UNW_AR_SSD, &dst[56]); | |
557 | } | |
558 | ||
559 | void | |
560 | do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg) | |
561 | { | |
562 | elf_fpreg_t *dst = arg; | |
563 | int i; | |
564 | ||
565 | memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */ | |
566 | ||
567 | if (unw_unwind_to_user(info) < 0) | |
568 | return; | |
569 | ||
570 | /* f0 is 0.0, f1 is 1.0 */ | |
571 | ||
572 | for (i = 2; i < 32; ++i) | |
573 | unw_get_fr(info, i, dst + i); | |
574 | ||
575 | ia64_flush_fph(task); | |
576 | if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0) | |
577 | memcpy(dst + 32, task->thread.fph, 96*16); | |
578 | } | |
579 | ||
580 | void | |
581 | do_copy_regs (struct unw_frame_info *info, void *arg) | |
582 | { | |
583 | do_copy_task_regs(current, info, arg); | |
584 | } | |
585 | ||
586 | void | |
587 | do_dump_fpu (struct unw_frame_info *info, void *arg) | |
588 | { | |
589 | do_dump_task_fpu(current, info, arg); | |
590 | } | |
591 | ||
592 | int | |
593 | dump_task_regs(struct task_struct *task, elf_gregset_t *regs) | |
594 | { | |
595 | struct unw_frame_info tcore_info; | |
596 | ||
597 | if (current == task) { | |
598 | unw_init_running(do_copy_regs, regs); | |
599 | } else { | |
600 | memset(&tcore_info, 0, sizeof(tcore_info)); | |
601 | unw_init_from_blocked_task(&tcore_info, task); | |
602 | do_copy_task_regs(task, &tcore_info, regs); | |
603 | } | |
604 | return 1; | |
605 | } | |
606 | ||
607 | void | |
608 | ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst) | |
609 | { | |
610 | unw_init_running(do_copy_regs, dst); | |
611 | } | |
612 | ||
613 | int | |
614 | dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst) | |
615 | { | |
616 | struct unw_frame_info tcore_info; | |
617 | ||
618 | if (current == task) { | |
619 | unw_init_running(do_dump_fpu, dst); | |
620 | } else { | |
621 | memset(&tcore_info, 0, sizeof(tcore_info)); | |
622 | unw_init_from_blocked_task(&tcore_info, task); | |
623 | do_dump_task_fpu(task, &tcore_info, dst); | |
624 | } | |
625 | return 1; | |
626 | } | |
627 | ||
628 | int | |
629 | dump_fpu (struct pt_regs *pt, elf_fpregset_t dst) | |
630 | { | |
631 | unw_init_running(do_dump_fpu, dst); | |
632 | return 1; /* f0-f31 are always valid so we always return 1 */ | |
633 | } | |
634 | ||
635 | long | |
636 | sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp, | |
637 | struct pt_regs *regs) | |
638 | { | |
639 | char *fname; | |
640 | int error; | |
641 | ||
642 | fname = getname(filename); | |
643 | error = PTR_ERR(fname); | |
644 | if (IS_ERR(fname)) | |
645 | goto out; | |
646 | error = do_execve(fname, argv, envp, regs); | |
647 | putname(fname); | |
648 | out: | |
649 | return error; | |
650 | } | |
651 | ||
652 | pid_t | |
653 | kernel_thread (int (*fn)(void *), void *arg, unsigned long flags) | |
654 | { | |
655 | extern void start_kernel_thread (void); | |
656 | unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread; | |
657 | struct { | |
658 | struct switch_stack sw; | |
659 | struct pt_regs pt; | |
660 | } regs; | |
661 | ||
662 | memset(®s, 0, sizeof(regs)); | |
663 | regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */ | |
664 | regs.pt.r1 = helper_fptr[1]; /* set GP */ | |
665 | regs.pt.r9 = (unsigned long) fn; /* 1st argument */ | |
666 | regs.pt.r11 = (unsigned long) arg; /* 2nd argument */ | |
667 | /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */ | |
668 | regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN; | |
669 | regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */ | |
670 | regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR); | |
671 | regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET; | |
672 | regs.sw.pr = (1 << PRED_KERNEL_STACK); | |
673 | return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s.pt, 0, NULL, NULL); | |
674 | } | |
675 | EXPORT_SYMBOL(kernel_thread); | |
676 | ||
677 | /* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */ | |
678 | int | |
679 | kernel_thread_helper (int (*fn)(void *), void *arg) | |
680 | { | |
681 | #ifdef CONFIG_IA32_SUPPORT | |
682 | if (IS_IA32_PROCESS(ia64_task_regs(current))) { | |
683 | /* A kernel thread is always a 64-bit process. */ | |
684 | current->thread.map_base = DEFAULT_MAP_BASE; | |
685 | current->thread.task_size = DEFAULT_TASK_SIZE; | |
686 | ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob); | |
687 | ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1); | |
688 | } | |
689 | #endif | |
690 | return (*fn)(arg); | |
691 | } | |
692 | ||
693 | /* | |
694 | * Flush thread state. This is called when a thread does an execve(). | |
695 | */ | |
696 | void | |
697 | flush_thread (void) | |
698 | { | |
699 | /* drop floating-point and debug-register state if it exists: */ | |
700 | current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID); | |
701 | ia64_drop_fpu(current); | |
702 | if (IS_IA32_PROCESS(ia64_task_regs(current))) | |
703 | ia32_drop_partial_page_list(current); | |
704 | } | |
705 | ||
706 | /* | |
707 | * Clean up state associated with current thread. This is called when | |
708 | * the thread calls exit(). | |
709 | */ | |
710 | void | |
711 | exit_thread (void) | |
712 | { | |
713 | ia64_drop_fpu(current); | |
714 | #ifdef CONFIG_PERFMON | |
715 | /* if needed, stop monitoring and flush state to perfmon context */ | |
716 | if (current->thread.pfm_context) | |
717 | pfm_exit_thread(current); | |
718 | ||
719 | /* free debug register resources */ | |
720 | if (current->thread.flags & IA64_THREAD_DBG_VALID) | |
721 | pfm_release_debug_registers(current); | |
722 | #endif | |
723 | if (IS_IA32_PROCESS(ia64_task_regs(current))) | |
724 | ia32_drop_partial_page_list(current); | |
725 | } | |
726 | ||
727 | unsigned long | |
728 | get_wchan (struct task_struct *p) | |
729 | { | |
730 | struct unw_frame_info info; | |
731 | unsigned long ip; | |
732 | int count = 0; | |
733 | ||
734 | /* | |
735 | * Note: p may not be a blocked task (it could be current or | |
736 | * another process running on some other CPU. Rather than | |
737 | * trying to determine if p is really blocked, we just assume | |
738 | * it's blocked and rely on the unwind routines to fail | |
739 | * gracefully if the process wasn't really blocked after all. | |
740 | * --davidm 99/12/15 | |
741 | */ | |
742 | unw_init_from_blocked_task(&info, p); | |
743 | do { | |
744 | if (unw_unwind(&info) < 0) | |
745 | return 0; | |
746 | unw_get_ip(&info, &ip); | |
747 | if (!in_sched_functions(ip)) | |
748 | return ip; | |
749 | } while (count++ < 16); | |
750 | return 0; | |
751 | } | |
752 | ||
753 | void | |
754 | cpu_halt (void) | |
755 | { | |
756 | pal_power_mgmt_info_u_t power_info[8]; | |
757 | unsigned long min_power; | |
758 | int i, min_power_state; | |
759 | ||
760 | if (ia64_pal_halt_info(power_info) != 0) | |
761 | return; | |
762 | ||
763 | min_power_state = 0; | |
764 | min_power = power_info[0].pal_power_mgmt_info_s.power_consumption; | |
765 | for (i = 1; i < 8; ++i) | |
766 | if (power_info[i].pal_power_mgmt_info_s.im | |
767 | && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) { | |
768 | min_power = power_info[i].pal_power_mgmt_info_s.power_consumption; | |
769 | min_power_state = i; | |
770 | } | |
771 | ||
772 | while (1) | |
773 | ia64_pal_halt(min_power_state); | |
774 | } | |
775 | ||
776 | void | |
777 | machine_restart (char *restart_cmd) | |
778 | { | |
779 | (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL); | |
780 | } | |
781 | ||
782 | EXPORT_SYMBOL(machine_restart); | |
783 | ||
784 | void | |
785 | machine_halt (void) | |
786 | { | |
787 | cpu_halt(); | |
788 | } | |
789 | ||
790 | EXPORT_SYMBOL(machine_halt); | |
791 | ||
792 | void | |
793 | machine_power_off (void) | |
794 | { | |
795 | if (pm_power_off) | |
796 | pm_power_off(); | |
797 | machine_halt(); | |
798 | } | |
799 | ||
800 | EXPORT_SYMBOL(machine_power_off); |