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CommitLineData
1da177e4
LT
1/*
2 * Architecture-specific setup.
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
b8d8b883 6 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
9138d581
KO
7 *
8 * 2005-10-07 Keith Owens <kaos@sgi.com>
9 * Add notify_die() hooks.
1da177e4 10 */
1da177e4
LT
11#include <linux/cpu.h>
12#include <linux/pm.h>
13#include <linux/elf.h>
14#include <linux/errno.h>
15#include <linux/kallsyms.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
5a0e3ad6 18#include <linux/slab.h>
1da177e4
LT
19#include <linux/module.h>
20#include <linux/notifier.h>
21#include <linux/personality.h>
22#include <linux/sched.h>
b17b0153 23#include <linux/sched/debug.h>
ef8bd77f 24#include <linux/sched/hotplug.h>
29930025 25#include <linux/sched/task.h>
1da177e4
LT
26#include <linux/stddef.h>
27#include <linux/thread_info.h>
28#include <linux/unistd.h>
29#include <linux/efi.h>
30#include <linux/interrupt.h>
31#include <linux/delay.h>
1eeb66a1 32#include <linux/kdebug.h>
ee211b37 33#include <linux/utsname.h>
f14488cc 34#include <linux/tracehook.h>
93482f4e 35#include <linux/rcupdate.h>
1da177e4
LT
36
37#include <asm/cpu.h>
38#include <asm/delay.h>
39#include <asm/elf.h>
1da177e4 40#include <asm/irq.h>
c237508a 41#include <asm/kexec.h>
1da177e4
LT
42#include <asm/pgalloc.h>
43#include <asm/processor.h>
44#include <asm/sal.h>
93f37888 45#include <asm/switch_to.h>
1da177e4 46#include <asm/tlbflush.h>
7c0f6ba6 47#include <linux/uaccess.h>
1da177e4
LT
48#include <asm/unwind.h>
49#include <asm/user.h>
50
51#include "entry.h"
52
53#ifdef CONFIG_PERFMON
54# include <asm/perfmon.h>
55#endif
56
57#include "sigframe.h"
58
59void (*ia64_mark_idle)(int);
1da177e4 60
d1896049 61unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
1da177e4 62EXPORT_SYMBOL(boot_option_idle_override);
d868080d
AC
63void (*pm_power_off) (void);
64EXPORT_SYMBOL(pm_power_off);
1da177e4
LT
65
66void
67ia64_do_show_stack (struct unw_frame_info *info, void *arg)
68{
69 unsigned long ip, sp, bsp;
70 char buf[128]; /* don't make it so big that it overflows the stack! */
71
72 printk("\nCall Trace:\n");
73 do {
74 unw_get_ip(info, &ip);
75 if (ip == 0)
76 break;
77
78 unw_get_sp(info, &sp);
79 unw_get_bsp(info, &bsp);
80 snprintf(buf, sizeof(buf),
81 " [<%016lx>] %%s\n"
82 " sp=%016lx bsp=%016lx\n",
83 ip, sp, bsp);
84 print_symbol(buf, ip);
85 } while (unw_unwind(info) >= 0);
86}
87
88void
89show_stack (struct task_struct *task, unsigned long *sp)
90{
91 if (!task)
92 unw_init_running(ia64_do_show_stack, NULL);
93 else {
94 struct unw_frame_info info;
95
96 unw_init_from_blocked_task(&info, task);
97 ia64_do_show_stack(&info, NULL);
98 }
99}
100
1da177e4
LT
101void
102show_regs (struct pt_regs *regs)
103{
104 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
105
106 print_modules();
a43cb95d
TH
107 printk("\n");
108 show_regs_print_info(KERN_DEFAULT);
ee211b37
TL
109 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
110 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
111 init_utsname()->release);
1da177e4
LT
112 print_symbol("ip is at %s\n", ip);
113 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
114 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
115 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
116 regs->ar_rnat, regs->ar_bspstore, regs->pr);
117 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
118 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
119 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
120 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
121 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
122 regs->f6.u.bits[1], regs->f6.u.bits[0],
123 regs->f7.u.bits[1], regs->f7.u.bits[0]);
124 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
125 regs->f8.u.bits[1], regs->f8.u.bits[0],
126 regs->f9.u.bits[1], regs->f9.u.bits[0]);
127 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
128 regs->f10.u.bits[1], regs->f10.u.bits[0],
129 regs->f11.u.bits[1], regs->f11.u.bits[0]);
130
131 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
132 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
133 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
134 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
135 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
136 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
137 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
138 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
139 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
140
141 if (user_mode(regs)) {
142 /* print the stacked registers */
143 unsigned long val, *bsp, ndirty;
144 int i, sof, is_nat = 0;
145
146 sof = regs->cr_ifs & 0x7f; /* size of frame */
147 ndirty = (regs->loadrs >> 19);
148 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
149 for (i = 0; i < sof; ++i) {
150 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
151 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
152 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
153 }
154 } else
155 show_stack(NULL, NULL);
156}
157
353f6dd2
AS
158/* local support for deprecated console_print */
159void
160console_print(const char *s)
161{
162 printk(KERN_EMERG "%s", s);
163}
164
1da177e4 165void
3633c730 166do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall)
1da177e4
LT
167{
168 if (fsys_mode(current, &scr->pt)) {
3633c730
HS
169 /*
170 * defer signal-handling etc. until we return to
171 * privilege-level 0.
172 */
1da177e4
LT
173 if (!ia64_psr(&scr->pt)->lp)
174 ia64_psr(&scr->pt)->lp = 1;
175 return;
176 }
177
178#ifdef CONFIG_PERFMON
179 if (current->thread.pfm_needs_checking)
3633c730
HS
180 /*
181 * Note: pfm_handle_work() allow us to call it with interrupts
182 * disabled, and may enable interrupts within the function.
183 */
1da177e4
LT
184 pfm_handle_work();
185#endif
186
187 /* deal with pending signal delivery */
3633c730
HS
188 if (test_thread_flag(TIF_SIGPENDING)) {
189 local_irq_enable(); /* force interrupt enable */
4a177cbf 190 ia64_do_signal(scr, in_syscall);
3633c730 191 }
3b2ce0b1 192
0967237c
TL
193 if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME)) {
194 local_irq_enable(); /* force interrupt enable */
f14488cc
SL
195 tracehook_notify_resume(&scr->pt);
196 }
197
3b2ce0b1 198 /* copy user rbs to kernel rbs */
3633c730
HS
199 if (unlikely(test_thread_flag(TIF_RESTORE_RSE))) {
200 local_irq_enable(); /* force interrupt enable */
3b2ce0b1 201 ia64_sync_krbs();
3633c730
HS
202 }
203
204 local_irq_disable(); /* force interrupt disable */
1da177e4
LT
205}
206
1da177e4
LT
207static int __init nohalt_setup(char * str)
208{
91d591c3 209 cpu_idle_poll_ctrl(true);
1da177e4
LT
210 return 1;
211}
212__setup("nohalt", nohalt_setup);
213
1da177e4
LT
214#ifdef CONFIG_HOTPLUG_CPU
215/* We don't actually take CPU down, just spin without interrupts. */
216static inline void play_dead(void)
217{
b8d8b883
AR
218 unsigned int this_cpu = smp_processor_id();
219
1da177e4 220 /* Ack it */
6065a244 221 __this_cpu_write(cpu_state, CPU_DEAD);
1da177e4 222
1da177e4
LT
223 max_xtp();
224 local_irq_disable();
b8d8b883
AR
225 idle_task_exit();
226 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
1da177e4 227 /*
b8d8b883
AR
228 * The above is a point of no-return, the processor is
229 * expected to be in SAL loop now.
1da177e4 230 */
b8d8b883 231 BUG();
1da177e4
LT
232}
233#else
234static inline void play_dead(void)
235{
236 BUG();
237}
238#endif /* CONFIG_HOTPLUG_CPU */
239
91d591c3
TG
240void arch_cpu_idle_dead(void)
241{
242 play_dead();
243}
244
245void arch_cpu_idle(void)
1da177e4
LT
246{
247 void (*mark_idle)(int) = ia64_mark_idle;
1e185b97 248
1da177e4 249#ifdef CONFIG_SMP
91d591c3 250 min_xtp();
1da177e4 251#endif
91d591c3
TG
252 rmb();
253 if (mark_idle)
254 (*mark_idle)(1);
255
256 safe_halt();
1da177e4 257
91d591c3
TG
258 if (mark_idle)
259 (*mark_idle)(0);
1da177e4 260#ifdef CONFIG_SMP
91d591c3 261 normal_xtp();
1da177e4 262#endif
1da177e4
LT
263}
264
265void
266ia64_save_extra (struct task_struct *task)
267{
268#ifdef CONFIG_PERFMON
269 unsigned long info;
270#endif
271
272 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
273 ia64_save_debug_regs(&task->thread.dbr[0]);
274
275#ifdef CONFIG_PERFMON
276 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
277 pfm_save_regs(task);
278
6065a244 279 info = __this_cpu_read(pfm_syst_info);
1da177e4
LT
280 if (info & PFM_CPUINFO_SYST_WIDE)
281 pfm_syst_wide_update_task(task, info, 0);
282#endif
1da177e4
LT
283}
284
285void
286ia64_load_extra (struct task_struct *task)
287{
288#ifdef CONFIG_PERFMON
289 unsigned long info;
290#endif
291
292 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
293 ia64_load_debug_regs(&task->thread.dbr[0]);
294
295#ifdef CONFIG_PERFMON
296 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
297 pfm_load_regs(task);
298
6065a244 299 info = __this_cpu_read(pfm_syst_info);
1da177e4
LT
300 if (info & PFM_CPUINFO_SYST_WIDE)
301 pfm_syst_wide_update_task(task, info, 1);
302#endif
1da177e4
LT
303}
304
305/*
306 * Copy the state of an ia-64 thread.
307 *
308 * We get here through the following call chain:
309 *
310 * from user-level: from kernel:
311 *
312 * <clone syscall> <some kernel call frames>
313 * sys_clone :
314 * do_fork do_fork
315 * copy_thread copy_thread
316 *
317 * This means that the stack layout is as follows:
318 *
319 * +---------------------+ (highest addr)
320 * | struct pt_regs |
321 * +---------------------+
322 * | struct switch_stack |
323 * +---------------------+
324 * | |
325 * | memory stack |
326 * | | <-- sp (lowest addr)
327 * +---------------------+
328 *
329 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
330 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
331 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
332 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
333 * the stack is page aligned and the page size is at least 4KB, this is always the case,
334 * so there is nothing to worry about.
335 */
336int
6f2c55b8 337copy_thread(unsigned long clone_flags,
1da177e4 338 unsigned long user_stack_base, unsigned long user_stack_size,
afa86fc4 339 struct task_struct *p)
1da177e4 340{
32974ad4 341 extern char ia64_ret_from_clone;
1da177e4
LT
342 struct switch_stack *child_stack, *stack;
343 unsigned long rbs, child_rbs, rbs_size;
344 struct pt_regs *child_ptregs;
afa86fc4 345 struct pt_regs *regs = current_pt_regs();
1da177e4
LT
346 int retval = 0;
347
1da177e4
LT
348 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
349 child_stack = (struct switch_stack *) child_ptregs - 1;
350
1da177e4
LT
351 rbs = (unsigned long) current + IA64_RBS_OFFSET;
352 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
1da177e4 353
1da177e4
LT
354 /* copy parts of thread_struct: */
355 p->thread.ksp = (unsigned long) child_stack - 16;
356
1da177e4
LT
357 /*
358 * NOTE: The calling convention considers all floating point
359 * registers in the high partition (fph) to be scratch. Since
360 * the only way to get to this point is through a system call,
361 * we know that the values in fph are all dead. Hence, there
362 * is no need to inherit the fph state from the parent to the
363 * child and all we have to do is to make sure that
364 * IA64_THREAD_FPH_VALID is cleared in the child.
365 *
366 * XXX We could push this optimization a bit further by
367 * clearing IA64_THREAD_FPH_VALID on ANY system call.
368 * However, it's not clear this is worth doing. Also, it
369 * would be a slight deviation from the normal Linux system
370 * call behavior where scratch registers are preserved across
371 * system calls (unless used by the system call itself).
372 */
373# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
374 | IA64_THREAD_PM_VALID)
375# define THREAD_FLAGS_TO_SET 0
376 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
377 | THREAD_FLAGS_TO_SET);
54d496c3 378
1da177e4 379 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
1da177e4 380
54d496c3
AV
381 if (unlikely(p->flags & PF_KTHREAD)) {
382 if (unlikely(!user_stack_base)) {
383 /* fork_idle() called us */
384 return 0;
385 }
386 memset(child_stack, 0, sizeof(*child_ptregs) + sizeof(*child_stack));
387 child_stack->r4 = user_stack_base; /* payload */
388 child_stack->r5 = user_stack_size; /* argument */
389 /*
390 * Preserve PSR bits, except for bits 32-34 and 37-45,
391 * which we can't read.
392 */
393 child_ptregs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
394 /* mark as valid, empty frame */
395 child_ptregs->cr_ifs = 1UL << 63;
396 child_stack->ar_fpsr = child_ptregs->ar_fpsr
397 = ia64_getreg(_IA64_REG_AR_FPSR);
398 child_stack->pr = (1 << PRED_KERNEL_STACK);
399 child_stack->ar_bspstore = child_rbs;
400 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
401
402 /* stop some PSR bits from being inherited.
403 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
404 * therefore we must specify them explicitly here and not include them in
405 * IA64_PSR_BITS_TO_CLEAR.
406 */
407 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
408 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
409
410 return 0;
411 }
412 stack = ((struct switch_stack *) regs) - 1;
413 /* copy parent's switch_stack & pt_regs to child: */
414 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
415
416 /* copy the parent's register backing store to the child: */
417 rbs_size = stack->ar_bspstore - rbs;
418 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
419 if (clone_flags & CLONE_SETTLS)
420 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
421 if (user_stack_base) {
422 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
423 child_ptregs->ar_bspstore = user_stack_base;
424 child_ptregs->ar_rnat = 0;
425 child_ptregs->loadrs = 0;
426 }
427 child_stack->ar_bspstore = child_rbs + rbs_size;
428 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
429
430 /* stop some PSR bits from being inherited.
431 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
432 * therefore we must specify them explicitly here and not include them in
433 * IA64_PSR_BITS_TO_CLEAR.
434 */
435 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
436 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
437
1da177e4
LT
438#ifdef CONFIG_PERFMON
439 if (current->thread.pfm_context)
440 pfm_inherit(p, child_ptregs);
441#endif
442 return retval;
443}
444
445static void
446do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
447{
256a7e09
JS
448 unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
449 unsigned long uninitialized_var(ip); /* GCC be quiet */
1da177e4
LT
450 elf_greg_t *dst = arg;
451 struct pt_regs *pt;
452 char nat;
453 int i;
454
455 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
456
457 if (unw_unwind_to_user(info) < 0)
458 return;
459
460 unw_get_sp(info, &sp);
461 pt = (struct pt_regs *) (sp + 16);
462
463 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
464
465 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
466 return;
467
468 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
469 &ar_rnat);
470
471 /*
472 * coredump format:
473 * r0-r31
474 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
475 * predicate registers (p0-p63)
476 * b0-b7
477 * ip cfm user-mask
478 * ar.rsc ar.bsp ar.bspstore ar.rnat
479 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
480 */
481
482 /* r0 is zero */
483 for (i = 1, mask = (1UL << i); i < 32; ++i) {
484 unw_get_gr(info, i, &dst[i], &nat);
485 if (nat)
486 nat_bits |= mask;
487 mask <<= 1;
488 }
489 dst[32] = nat_bits;
490 unw_get_pr(info, &dst[33]);
491
492 for (i = 0; i < 8; ++i)
493 unw_get_br(info, i, &dst[34 + i]);
494
495 unw_get_rp(info, &ip);
496 dst[42] = ip + ia64_psr(pt)->ri;
497 dst[43] = cfm;
498 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
499
500 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
501 /*
502 * For bsp and bspstore, unw_get_ar() would return the kernel
503 * addresses, but we need the user-level addresses instead:
504 */
505 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
506 dst[47] = pt->ar_bspstore;
507 dst[48] = ar_rnat;
508 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
509 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
510 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
511 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
512 unw_get_ar(info, UNW_AR_LC, &dst[53]);
513 unw_get_ar(info, UNW_AR_EC, &dst[54]);
514 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
515 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
516}
517
518void
519do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
520{
521 elf_fpreg_t *dst = arg;
522 int i;
523
524 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
525
526 if (unw_unwind_to_user(info) < 0)
527 return;
528
529 /* f0 is 0.0, f1 is 1.0 */
530
531 for (i = 2; i < 32; ++i)
532 unw_get_fr(info, i, dst + i);
533
534 ia64_flush_fph(task);
535 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
536 memcpy(dst + 32, task->thread.fph, 96*16);
537}
538
539void
540do_copy_regs (struct unw_frame_info *info, void *arg)
541{
542 do_copy_task_regs(current, info, arg);
543}
544
545void
546do_dump_fpu (struct unw_frame_info *info, void *arg)
547{
548 do_dump_task_fpu(current, info, arg);
549}
550
1da177e4
LT
551void
552ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
553{
554 unw_init_running(do_copy_regs, dst);
555}
556
1da177e4
LT
557int
558dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
559{
560 unw_init_running(do_dump_fpu, dst);
561 return 1; /* f0-f31 are always valid so we always return 1 */
562}
563
1da177e4
LT
564/*
565 * Flush thread state. This is called when a thread does an execve().
566 */
567void
568flush_thread (void)
569{
570 /* drop floating-point and debug-register state if it exists: */
571 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
572 ia64_drop_fpu(current);
1da177e4
LT
573}
574
575/*
e6464694 576 * Clean up state associated with a thread. This is called when
1da177e4
LT
577 * the thread calls exit().
578 */
579void
e6464694 580exit_thread (struct task_struct *tsk)
1da177e4 581{
9508dbfe 582
e6464694 583 ia64_drop_fpu(tsk);
1da177e4
LT
584#ifdef CONFIG_PERFMON
585 /* if needed, stop monitoring and flush state to perfmon context */
e6464694
JS
586 if (tsk->thread.pfm_context)
587 pfm_exit_thread(tsk);
1da177e4
LT
588
589 /* free debug register resources */
e6464694
JS
590 if (tsk->thread.flags & IA64_THREAD_DBG_VALID)
591 pfm_release_debug_registers(tsk);
1da177e4 592#endif
1da177e4
LT
593}
594
595unsigned long
596get_wchan (struct task_struct *p)
597{
598 struct unw_frame_info info;
599 unsigned long ip;
600 int count = 0;
601
6ae38488
RH
602 if (!p || p == current || p->state == TASK_RUNNING)
603 return 0;
604
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605 /*
606 * Note: p may not be a blocked task (it could be current or
607 * another process running on some other CPU. Rather than
608 * trying to determine if p is really blocked, we just assume
609 * it's blocked and rely on the unwind routines to fail
610 * gracefully if the process wasn't really blocked after all.
611 * --davidm 99/12/15
612 */
613 unw_init_from_blocked_task(&info, p);
614 do {
6ae38488
RH
615 if (p->state == TASK_RUNNING)
616 return 0;
1da177e4
LT
617 if (unw_unwind(&info) < 0)
618 return 0;
619 unw_get_ip(&info, &ip);
620 if (!in_sched_functions(ip))
621 return ip;
622 } while (count++ < 16);
623 return 0;
624}
625
626void
627cpu_halt (void)
628{
629 pal_power_mgmt_info_u_t power_info[8];
630 unsigned long min_power;
631 int i, min_power_state;
632
633 if (ia64_pal_halt_info(power_info) != 0)
634 return;
635
636 min_power_state = 0;
637 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
638 for (i = 1; i < 8; ++i)
639 if (power_info[i].pal_power_mgmt_info_s.im
640 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
641 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
642 min_power_state = i;
643 }
644
645 while (1)
646 ia64_pal_halt(min_power_state);
647}
648
c237508a
H
649void machine_shutdown(void)
650{
651#ifdef CONFIG_HOTPLUG_CPU
652 int cpu;
653
654 for_each_online_cpu(cpu) {
655 if (cpu != smp_processor_id())
656 cpu_down(cpu);
657 }
658#endif
659#ifdef CONFIG_KEXEC
660 kexec_disable_iosapic();
661#endif
662}
663
1da177e4
LT
664void
665machine_restart (char *restart_cmd)
666{
9138d581 667 (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
8562c99c 668 efi_reboot(REBOOT_WARM, NULL);
1da177e4
LT
669}
670
1da177e4
LT
671void
672machine_halt (void)
673{
9138d581 674 (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
1da177e4
LT
675 cpu_halt();
676}
677
1da177e4
LT
678void
679machine_power_off (void)
680{
681 if (pm_power_off)
682 pm_power_off();
683 machine_halt();
684}
685