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CommitLineData
1da177e4
LT
1/*
2 * Architecture-specific setup.
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
b8d8b883 6 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
9138d581
KO
7 *
8 * 2005-10-07 Keith Owens <kaos@sgi.com>
9 * Add notify_die() hooks.
1da177e4 10 */
1da177e4
LT
11#include <linux/cpu.h>
12#include <linux/pm.h>
13#include <linux/elf.h>
14#include <linux/errno.h>
15#include <linux/kallsyms.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
5a0e3ad6 18#include <linux/slab.h>
1da177e4
LT
19#include <linux/module.h>
20#include <linux/notifier.h>
21#include <linux/personality.h>
22#include <linux/sched.h>
b17b0153 23#include <linux/sched/debug.h>
ef8bd77f 24#include <linux/sched/hotplug.h>
29930025 25#include <linux/sched/task.h>
68db0cf1 26#include <linux/sched/task_stack.h>
1da177e4
LT
27#include <linux/stddef.h>
28#include <linux/thread_info.h>
29#include <linux/unistd.h>
30#include <linux/efi.h>
31#include <linux/interrupt.h>
32#include <linux/delay.h>
1eeb66a1 33#include <linux/kdebug.h>
ee211b37 34#include <linux/utsname.h>
f14488cc 35#include <linux/tracehook.h>
93482f4e 36#include <linux/rcupdate.h>
1da177e4
LT
37
38#include <asm/cpu.h>
39#include <asm/delay.h>
40#include <asm/elf.h>
1da177e4 41#include <asm/irq.h>
c237508a 42#include <asm/kexec.h>
1da177e4
LT
43#include <asm/pgalloc.h>
44#include <asm/processor.h>
45#include <asm/sal.h>
93f37888 46#include <asm/switch_to.h>
1da177e4 47#include <asm/tlbflush.h>
7c0f6ba6 48#include <linux/uaccess.h>
1da177e4
LT
49#include <asm/unwind.h>
50#include <asm/user.h>
51
52#include "entry.h"
53
54#ifdef CONFIG_PERFMON
55# include <asm/perfmon.h>
56#endif
57
58#include "sigframe.h"
59
60void (*ia64_mark_idle)(int);
1da177e4 61
d1896049 62unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
1da177e4 63EXPORT_SYMBOL(boot_option_idle_override);
d868080d
AC
64void (*pm_power_off) (void);
65EXPORT_SYMBOL(pm_power_off);
1da177e4
LT
66
67void
68ia64_do_show_stack (struct unw_frame_info *info, void *arg)
69{
70 unsigned long ip, sp, bsp;
71 char buf[128]; /* don't make it so big that it overflows the stack! */
72
73 printk("\nCall Trace:\n");
74 do {
75 unw_get_ip(info, &ip);
76 if (ip == 0)
77 break;
78
79 unw_get_sp(info, &sp);
80 unw_get_bsp(info, &bsp);
81 snprintf(buf, sizeof(buf),
82 " [<%016lx>] %%s\n"
83 " sp=%016lx bsp=%016lx\n",
84 ip, sp, bsp);
85 print_symbol(buf, ip);
86 } while (unw_unwind(info) >= 0);
87}
88
89void
90show_stack (struct task_struct *task, unsigned long *sp)
91{
92 if (!task)
93 unw_init_running(ia64_do_show_stack, NULL);
94 else {
95 struct unw_frame_info info;
96
97 unw_init_from_blocked_task(&info, task);
98 ia64_do_show_stack(&info, NULL);
99 }
100}
101
1da177e4
LT
102void
103show_regs (struct pt_regs *regs)
104{
105 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
106
107 print_modules();
a43cb95d
TH
108 printk("\n");
109 show_regs_print_info(KERN_DEFAULT);
ee211b37
TL
110 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
111 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
112 init_utsname()->release);
1da177e4
LT
113 print_symbol("ip is at %s\n", ip);
114 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
115 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
116 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
117 regs->ar_rnat, regs->ar_bspstore, regs->pr);
118 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
119 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
120 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
121 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
122 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
123 regs->f6.u.bits[1], regs->f6.u.bits[0],
124 regs->f7.u.bits[1], regs->f7.u.bits[0]);
125 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
126 regs->f8.u.bits[1], regs->f8.u.bits[0],
127 regs->f9.u.bits[1], regs->f9.u.bits[0]);
128 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
129 regs->f10.u.bits[1], regs->f10.u.bits[0],
130 regs->f11.u.bits[1], regs->f11.u.bits[0]);
131
132 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
133 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
134 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
135 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
136 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
137 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
138 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
139 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
140 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
141
142 if (user_mode(regs)) {
143 /* print the stacked registers */
144 unsigned long val, *bsp, ndirty;
145 int i, sof, is_nat = 0;
146
147 sof = regs->cr_ifs & 0x7f; /* size of frame */
148 ndirty = (regs->loadrs >> 19);
149 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
150 for (i = 0; i < sof; ++i) {
151 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
152 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
153 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
154 }
155 } else
156 show_stack(NULL, NULL);
157}
158
353f6dd2
AS
159/* local support for deprecated console_print */
160void
161console_print(const char *s)
162{
163 printk(KERN_EMERG "%s", s);
164}
165
1da177e4 166void
3633c730 167do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall)
1da177e4
LT
168{
169 if (fsys_mode(current, &scr->pt)) {
3633c730
HS
170 /*
171 * defer signal-handling etc. until we return to
172 * privilege-level 0.
173 */
1da177e4
LT
174 if (!ia64_psr(&scr->pt)->lp)
175 ia64_psr(&scr->pt)->lp = 1;
176 return;
177 }
178
179#ifdef CONFIG_PERFMON
180 if (current->thread.pfm_needs_checking)
3633c730
HS
181 /*
182 * Note: pfm_handle_work() allow us to call it with interrupts
183 * disabled, and may enable interrupts within the function.
184 */
1da177e4
LT
185 pfm_handle_work();
186#endif
187
188 /* deal with pending signal delivery */
3633c730
HS
189 if (test_thread_flag(TIF_SIGPENDING)) {
190 local_irq_enable(); /* force interrupt enable */
4a177cbf 191 ia64_do_signal(scr, in_syscall);
3633c730 192 }
3b2ce0b1 193
0967237c
TL
194 if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME)) {
195 local_irq_enable(); /* force interrupt enable */
f14488cc
SL
196 tracehook_notify_resume(&scr->pt);
197 }
198
3b2ce0b1 199 /* copy user rbs to kernel rbs */
3633c730
HS
200 if (unlikely(test_thread_flag(TIF_RESTORE_RSE))) {
201 local_irq_enable(); /* force interrupt enable */
3b2ce0b1 202 ia64_sync_krbs();
3633c730
HS
203 }
204
205 local_irq_disable(); /* force interrupt disable */
1da177e4
LT
206}
207
1da177e4
LT
208static int __init nohalt_setup(char * str)
209{
91d591c3 210 cpu_idle_poll_ctrl(true);
1da177e4
LT
211 return 1;
212}
213__setup("nohalt", nohalt_setup);
214
1da177e4
LT
215#ifdef CONFIG_HOTPLUG_CPU
216/* We don't actually take CPU down, just spin without interrupts. */
217static inline void play_dead(void)
218{
b8d8b883
AR
219 unsigned int this_cpu = smp_processor_id();
220
1da177e4 221 /* Ack it */
6065a244 222 __this_cpu_write(cpu_state, CPU_DEAD);
1da177e4 223
1da177e4
LT
224 max_xtp();
225 local_irq_disable();
b8d8b883
AR
226 idle_task_exit();
227 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
1da177e4 228 /*
b8d8b883
AR
229 * The above is a point of no-return, the processor is
230 * expected to be in SAL loop now.
1da177e4 231 */
b8d8b883 232 BUG();
1da177e4
LT
233}
234#else
235static inline void play_dead(void)
236{
237 BUG();
238}
239#endif /* CONFIG_HOTPLUG_CPU */
240
91d591c3
TG
241void arch_cpu_idle_dead(void)
242{
243 play_dead();
244}
245
246void arch_cpu_idle(void)
1da177e4
LT
247{
248 void (*mark_idle)(int) = ia64_mark_idle;
1e185b97 249
1da177e4 250#ifdef CONFIG_SMP
91d591c3 251 min_xtp();
1da177e4 252#endif
91d591c3
TG
253 rmb();
254 if (mark_idle)
255 (*mark_idle)(1);
256
257 safe_halt();
1da177e4 258
91d591c3
TG
259 if (mark_idle)
260 (*mark_idle)(0);
1da177e4 261#ifdef CONFIG_SMP
91d591c3 262 normal_xtp();
1da177e4 263#endif
1da177e4
LT
264}
265
266void
267ia64_save_extra (struct task_struct *task)
268{
269#ifdef CONFIG_PERFMON
270 unsigned long info;
271#endif
272
273 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
274 ia64_save_debug_regs(&task->thread.dbr[0]);
275
276#ifdef CONFIG_PERFMON
277 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
278 pfm_save_regs(task);
279
6065a244 280 info = __this_cpu_read(pfm_syst_info);
1da177e4
LT
281 if (info & PFM_CPUINFO_SYST_WIDE)
282 pfm_syst_wide_update_task(task, info, 0);
283#endif
1da177e4
LT
284}
285
286void
287ia64_load_extra (struct task_struct *task)
288{
289#ifdef CONFIG_PERFMON
290 unsigned long info;
291#endif
292
293 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
294 ia64_load_debug_regs(&task->thread.dbr[0]);
295
296#ifdef CONFIG_PERFMON
297 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
298 pfm_load_regs(task);
299
6065a244 300 info = __this_cpu_read(pfm_syst_info);
1da177e4
LT
301 if (info & PFM_CPUINFO_SYST_WIDE)
302 pfm_syst_wide_update_task(task, info, 1);
303#endif
1da177e4
LT
304}
305
306/*
307 * Copy the state of an ia-64 thread.
308 *
309 * We get here through the following call chain:
310 *
311 * from user-level: from kernel:
312 *
313 * <clone syscall> <some kernel call frames>
314 * sys_clone :
315 * do_fork do_fork
316 * copy_thread copy_thread
317 *
318 * This means that the stack layout is as follows:
319 *
320 * +---------------------+ (highest addr)
321 * | struct pt_regs |
322 * +---------------------+
323 * | struct switch_stack |
324 * +---------------------+
325 * | |
326 * | memory stack |
327 * | | <-- sp (lowest addr)
328 * +---------------------+
329 *
330 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
331 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
332 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
333 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
334 * the stack is page aligned and the page size is at least 4KB, this is always the case,
335 * so there is nothing to worry about.
336 */
337int
6f2c55b8 338copy_thread(unsigned long clone_flags,
1da177e4 339 unsigned long user_stack_base, unsigned long user_stack_size,
afa86fc4 340 struct task_struct *p)
1da177e4 341{
32974ad4 342 extern char ia64_ret_from_clone;
1da177e4
LT
343 struct switch_stack *child_stack, *stack;
344 unsigned long rbs, child_rbs, rbs_size;
345 struct pt_regs *child_ptregs;
afa86fc4 346 struct pt_regs *regs = current_pt_regs();
1da177e4
LT
347 int retval = 0;
348
1da177e4
LT
349 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
350 child_stack = (struct switch_stack *) child_ptregs - 1;
351
1da177e4
LT
352 rbs = (unsigned long) current + IA64_RBS_OFFSET;
353 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
1da177e4 354
1da177e4
LT
355 /* copy parts of thread_struct: */
356 p->thread.ksp = (unsigned long) child_stack - 16;
357
1da177e4
LT
358 /*
359 * NOTE: The calling convention considers all floating point
360 * registers in the high partition (fph) to be scratch. Since
361 * the only way to get to this point is through a system call,
362 * we know that the values in fph are all dead. Hence, there
363 * is no need to inherit the fph state from the parent to the
364 * child and all we have to do is to make sure that
365 * IA64_THREAD_FPH_VALID is cleared in the child.
366 *
367 * XXX We could push this optimization a bit further by
368 * clearing IA64_THREAD_FPH_VALID on ANY system call.
369 * However, it's not clear this is worth doing. Also, it
370 * would be a slight deviation from the normal Linux system
371 * call behavior where scratch registers are preserved across
372 * system calls (unless used by the system call itself).
373 */
374# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
375 | IA64_THREAD_PM_VALID)
376# define THREAD_FLAGS_TO_SET 0
377 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
378 | THREAD_FLAGS_TO_SET);
54d496c3 379
1da177e4 380 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
1da177e4 381
54d496c3
AV
382 if (unlikely(p->flags & PF_KTHREAD)) {
383 if (unlikely(!user_stack_base)) {
384 /* fork_idle() called us */
385 return 0;
386 }
387 memset(child_stack, 0, sizeof(*child_ptregs) + sizeof(*child_stack));
388 child_stack->r4 = user_stack_base; /* payload */
389 child_stack->r5 = user_stack_size; /* argument */
390 /*
391 * Preserve PSR bits, except for bits 32-34 and 37-45,
392 * which we can't read.
393 */
394 child_ptregs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
395 /* mark as valid, empty frame */
396 child_ptregs->cr_ifs = 1UL << 63;
397 child_stack->ar_fpsr = child_ptregs->ar_fpsr
398 = ia64_getreg(_IA64_REG_AR_FPSR);
399 child_stack->pr = (1 << PRED_KERNEL_STACK);
400 child_stack->ar_bspstore = child_rbs;
401 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
402
403 /* stop some PSR bits from being inherited.
404 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
405 * therefore we must specify them explicitly here and not include them in
406 * IA64_PSR_BITS_TO_CLEAR.
407 */
408 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
409 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
410
411 return 0;
412 }
413 stack = ((struct switch_stack *) regs) - 1;
414 /* copy parent's switch_stack & pt_regs to child: */
415 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
416
417 /* copy the parent's register backing store to the child: */
418 rbs_size = stack->ar_bspstore - rbs;
419 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
420 if (clone_flags & CLONE_SETTLS)
421 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
422 if (user_stack_base) {
423 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
424 child_ptregs->ar_bspstore = user_stack_base;
425 child_ptregs->ar_rnat = 0;
426 child_ptregs->loadrs = 0;
427 }
428 child_stack->ar_bspstore = child_rbs + rbs_size;
429 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
430
431 /* stop some PSR bits from being inherited.
432 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
433 * therefore we must specify them explicitly here and not include them in
434 * IA64_PSR_BITS_TO_CLEAR.
435 */
436 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
437 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
438
1da177e4
LT
439#ifdef CONFIG_PERFMON
440 if (current->thread.pfm_context)
441 pfm_inherit(p, child_ptregs);
442#endif
443 return retval;
444}
445
446static void
447do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
448{
256a7e09
JS
449 unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
450 unsigned long uninitialized_var(ip); /* GCC be quiet */
1da177e4
LT
451 elf_greg_t *dst = arg;
452 struct pt_regs *pt;
453 char nat;
454 int i;
455
456 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
457
458 if (unw_unwind_to_user(info) < 0)
459 return;
460
461 unw_get_sp(info, &sp);
462 pt = (struct pt_regs *) (sp + 16);
463
464 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
465
466 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
467 return;
468
469 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
470 &ar_rnat);
471
472 /*
473 * coredump format:
474 * r0-r31
475 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
476 * predicate registers (p0-p63)
477 * b0-b7
478 * ip cfm user-mask
479 * ar.rsc ar.bsp ar.bspstore ar.rnat
480 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
481 */
482
483 /* r0 is zero */
484 for (i = 1, mask = (1UL << i); i < 32; ++i) {
485 unw_get_gr(info, i, &dst[i], &nat);
486 if (nat)
487 nat_bits |= mask;
488 mask <<= 1;
489 }
490 dst[32] = nat_bits;
491 unw_get_pr(info, &dst[33]);
492
493 for (i = 0; i < 8; ++i)
494 unw_get_br(info, i, &dst[34 + i]);
495
496 unw_get_rp(info, &ip);
497 dst[42] = ip + ia64_psr(pt)->ri;
498 dst[43] = cfm;
499 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
500
501 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
502 /*
503 * For bsp and bspstore, unw_get_ar() would return the kernel
504 * addresses, but we need the user-level addresses instead:
505 */
506 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
507 dst[47] = pt->ar_bspstore;
508 dst[48] = ar_rnat;
509 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
510 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
511 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
512 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
513 unw_get_ar(info, UNW_AR_LC, &dst[53]);
514 unw_get_ar(info, UNW_AR_EC, &dst[54]);
515 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
516 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
517}
518
519void
520do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
521{
522 elf_fpreg_t *dst = arg;
523 int i;
524
525 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
526
527 if (unw_unwind_to_user(info) < 0)
528 return;
529
530 /* f0 is 0.0, f1 is 1.0 */
531
532 for (i = 2; i < 32; ++i)
533 unw_get_fr(info, i, dst + i);
534
535 ia64_flush_fph(task);
536 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
537 memcpy(dst + 32, task->thread.fph, 96*16);
538}
539
540void
541do_copy_regs (struct unw_frame_info *info, void *arg)
542{
543 do_copy_task_regs(current, info, arg);
544}
545
546void
547do_dump_fpu (struct unw_frame_info *info, void *arg)
548{
549 do_dump_task_fpu(current, info, arg);
550}
551
1da177e4
LT
552void
553ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
554{
555 unw_init_running(do_copy_regs, dst);
556}
557
1da177e4
LT
558int
559dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
560{
561 unw_init_running(do_dump_fpu, dst);
562 return 1; /* f0-f31 are always valid so we always return 1 */
563}
564
1da177e4
LT
565/*
566 * Flush thread state. This is called when a thread does an execve().
567 */
568void
569flush_thread (void)
570{
571 /* drop floating-point and debug-register state if it exists: */
572 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
573 ia64_drop_fpu(current);
1da177e4
LT
574}
575
576/*
e6464694 577 * Clean up state associated with a thread. This is called when
1da177e4
LT
578 * the thread calls exit().
579 */
580void
e6464694 581exit_thread (struct task_struct *tsk)
1da177e4 582{
9508dbfe 583
e6464694 584 ia64_drop_fpu(tsk);
1da177e4
LT
585#ifdef CONFIG_PERFMON
586 /* if needed, stop monitoring and flush state to perfmon context */
e6464694
JS
587 if (tsk->thread.pfm_context)
588 pfm_exit_thread(tsk);
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LT
589
590 /* free debug register resources */
e6464694
JS
591 if (tsk->thread.flags & IA64_THREAD_DBG_VALID)
592 pfm_release_debug_registers(tsk);
1da177e4 593#endif
1da177e4
LT
594}
595
596unsigned long
597get_wchan (struct task_struct *p)
598{
599 struct unw_frame_info info;
600 unsigned long ip;
601 int count = 0;
602
6ae38488
RH
603 if (!p || p == current || p->state == TASK_RUNNING)
604 return 0;
605
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LT
606 /*
607 * Note: p may not be a blocked task (it could be current or
608 * another process running on some other CPU. Rather than
609 * trying to determine if p is really blocked, we just assume
610 * it's blocked and rely on the unwind routines to fail
611 * gracefully if the process wasn't really blocked after all.
612 * --davidm 99/12/15
613 */
614 unw_init_from_blocked_task(&info, p);
615 do {
6ae38488
RH
616 if (p->state == TASK_RUNNING)
617 return 0;
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LT
618 if (unw_unwind(&info) < 0)
619 return 0;
620 unw_get_ip(&info, &ip);
621 if (!in_sched_functions(ip))
622 return ip;
623 } while (count++ < 16);
624 return 0;
625}
626
627void
628cpu_halt (void)
629{
630 pal_power_mgmt_info_u_t power_info[8];
631 unsigned long min_power;
632 int i, min_power_state;
633
634 if (ia64_pal_halt_info(power_info) != 0)
635 return;
636
637 min_power_state = 0;
638 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
639 for (i = 1; i < 8; ++i)
640 if (power_info[i].pal_power_mgmt_info_s.im
641 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
642 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
643 min_power_state = i;
644 }
645
646 while (1)
647 ia64_pal_halt(min_power_state);
648}
649
c237508a
H
650void machine_shutdown(void)
651{
652#ifdef CONFIG_HOTPLUG_CPU
653 int cpu;
654
655 for_each_online_cpu(cpu) {
656 if (cpu != smp_processor_id())
657 cpu_down(cpu);
658 }
659#endif
660#ifdef CONFIG_KEXEC
661 kexec_disable_iosapic();
662#endif
663}
664
1da177e4
LT
665void
666machine_restart (char *restart_cmd)
667{
9138d581 668 (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
8562c99c 669 efi_reboot(REBOOT_WARM, NULL);
1da177e4
LT
670}
671
1da177e4
LT
672void
673machine_halt (void)
674{
9138d581 675 (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
1da177e4
LT
676 cpu_halt();
677}
678
1da177e4
LT
679void
680machine_power_off (void)
681{
682 if (pm_power_off)
683 pm_power_off();
684 machine_halt();
685}
686