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1da177e4 LT |
1 | /* |
2 | * linux/arch/ia64/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * Stephane Eranian <eranian@hpl.hp.com> | |
6 | * David Mosberger <davidm@hpl.hp.com> | |
7 | * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> | |
8 | * Copyright (C) 1999-2000 VA Linux Systems | |
9 | * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com> | |
10 | */ | |
1da177e4 LT |
11 | |
12 | #include <linux/cpu.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/profile.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/time.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/efi.h> | |
1da177e4 | 21 | #include <linux/timex.h> |
0aa366f3 | 22 | #include <linux/clocksource.h> |
1da177e4 LT |
23 | |
24 | #include <asm/machvec.h> | |
25 | #include <asm/delay.h> | |
26 | #include <asm/hw_irq.h> | |
27 | #include <asm/ptrace.h> | |
28 | #include <asm/sal.h> | |
29 | #include <asm/sections.h> | |
30 | #include <asm/system.h> | |
31 | ||
0aa366f3 TL |
32 | #include "fsyscall_gtod_data.h" |
33 | ||
34 | static cycle_t itc_get_cycles(void); | |
35 | ||
36 | struct fsyscall_gtod_data_t fsyscall_gtod_data = { | |
37 | .lock = SEQLOCK_UNLOCKED, | |
38 | }; | |
39 | ||
40 | struct itc_jitter_data_t itc_jitter_data; | |
41 | ||
ff741906 | 42 | volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */ |
1da177e4 LT |
43 | |
44 | #ifdef CONFIG_IA64_DEBUG_IRQ | |
45 | ||
46 | unsigned long last_cli_ip; | |
47 | EXPORT_SYMBOL(last_cli_ip); | |
48 | ||
49 | #endif | |
50 | ||
0aa366f3 TL |
51 | static struct clocksource clocksource_itc = { |
52 | .name = "itc", | |
53 | .rating = 350, | |
54 | .read = itc_get_cycles, | |
712aaa1c | 55 | .mask = CLOCKSOURCE_MASK(64), |
0aa366f3 TL |
56 | .mult = 0, /*to be caluclated*/ |
57 | .shift = 16, | |
58 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
1da177e4 | 59 | }; |
0aa366f3 | 60 | static struct clocksource *itc_clocksource; |
1da177e4 LT |
61 | |
62 | static irqreturn_t | |
7d12e780 | 63 | timer_interrupt (int irq, void *dev_id) |
1da177e4 LT |
64 | { |
65 | unsigned long new_itm; | |
66 | ||
67 | if (unlikely(cpu_is_offline(smp_processor_id()))) { | |
68 | return IRQ_HANDLED; | |
69 | } | |
70 | ||
7d12e780 | 71 | platform_timer_interrupt(irq, dev_id); |
1da177e4 LT |
72 | |
73 | new_itm = local_cpu_data->itm_next; | |
74 | ||
75 | if (!time_after(ia64_get_itc(), new_itm)) | |
76 | printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", | |
77 | ia64_get_itc(), new_itm); | |
78 | ||
7d12e780 | 79 | profile_tick(CPU_PROFILING); |
1da177e4 LT |
80 | |
81 | while (1) { | |
7d12e780 | 82 | update_process_times(user_mode(get_irq_regs())); |
1da177e4 LT |
83 | |
84 | new_itm += local_cpu_data->itm_delta; | |
85 | ||
ff741906 | 86 | if (smp_processor_id() == time_keeper_id) { |
1da177e4 LT |
87 | /* |
88 | * Here we are in the timer irq handler. We have irqs locally | |
89 | * disabled, but we don't know if the timer_bh is running on | |
90 | * another CPU. We need to avoid to SMP race by acquiring the | |
91 | * xtime_lock. | |
92 | */ | |
93 | write_seqlock(&xtime_lock); | |
3171a030 | 94 | do_timer(1); |
1da177e4 LT |
95 | local_cpu_data->itm_next = new_itm; |
96 | write_sequnlock(&xtime_lock); | |
97 | } else | |
98 | local_cpu_data->itm_next = new_itm; | |
99 | ||
100 | if (time_after(new_itm, ia64_get_itc())) | |
101 | break; | |
accaddb2 JS |
102 | |
103 | /* | |
104 | * Allow IPIs to interrupt the timer loop. | |
105 | */ | |
106 | local_irq_enable(); | |
107 | local_irq_disable(); | |
1da177e4 LT |
108 | } |
109 | ||
110 | do { | |
111 | /* | |
112 | * If we're too close to the next clock tick for | |
113 | * comfort, we increase the safety margin by | |
114 | * intentionally dropping the next tick(s). We do NOT | |
115 | * update itm.next because that would force us to call | |
116 | * do_timer() which in turn would let our clock run | |
117 | * too fast (with the potentially devastating effect | |
118 | * of losing monotony of time). | |
119 | */ | |
120 | while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2)) | |
121 | new_itm += local_cpu_data->itm_delta; | |
122 | ia64_set_itm(new_itm); | |
123 | /* double check, in case we got hit by a (slow) PMI: */ | |
124 | } while (time_after_eq(ia64_get_itc(), new_itm)); | |
125 | return IRQ_HANDLED; | |
126 | } | |
127 | ||
128 | /* | |
129 | * Encapsulate access to the itm structure for SMP. | |
130 | */ | |
131 | void | |
132 | ia64_cpu_local_tick (void) | |
133 | { | |
134 | int cpu = smp_processor_id(); | |
135 | unsigned long shift = 0, delta; | |
136 | ||
137 | /* arrange for the cycle counter to generate a timer interrupt: */ | |
138 | ia64_set_itv(IA64_TIMER_VECTOR); | |
139 | ||
140 | delta = local_cpu_data->itm_delta; | |
141 | /* | |
142 | * Stagger the timer tick for each CPU so they don't occur all at (almost) the | |
143 | * same time: | |
144 | */ | |
145 | if (cpu) { | |
146 | unsigned long hi = 1UL << ia64_fls(cpu); | |
147 | shift = (2*(cpu - hi) + 1) * delta/hi/2; | |
148 | } | |
149 | local_cpu_data->itm_next = ia64_get_itc() + delta + shift; | |
150 | ia64_set_itm(local_cpu_data->itm_next); | |
151 | } | |
152 | ||
153 | static int nojitter; | |
154 | ||
155 | static int __init nojitter_setup(char *str) | |
156 | { | |
157 | nojitter = 1; | |
158 | printk("Jitter checking for ITC timers disabled\n"); | |
159 | return 1; | |
160 | } | |
161 | ||
162 | __setup("nojitter", nojitter_setup); | |
163 | ||
164 | ||
165 | void __devinit | |
166 | ia64_init_itm (void) | |
167 | { | |
168 | unsigned long platform_base_freq, itc_freq; | |
169 | struct pal_freq_ratio itc_ratio, proc_ratio; | |
170 | long status, platform_base_drift, itc_drift; | |
171 | ||
172 | /* | |
173 | * According to SAL v2.6, we need to use a SAL call to determine the platform base | |
174 | * frequency and then a PAL call to determine the frequency ratio between the ITC | |
175 | * and the base frequency. | |
176 | */ | |
177 | status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM, | |
178 | &platform_base_freq, &platform_base_drift); | |
179 | if (status != 0) { | |
180 | printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status)); | |
181 | } else { | |
182 | status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio); | |
183 | if (status != 0) | |
184 | printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status); | |
185 | } | |
186 | if (status != 0) { | |
187 | /* invent "random" values */ | |
188 | printk(KERN_ERR | |
189 | "SAL/PAL failed to obtain frequency info---inventing reasonable values\n"); | |
190 | platform_base_freq = 100000000; | |
191 | platform_base_drift = -1; /* no drift info */ | |
192 | itc_ratio.num = 3; | |
193 | itc_ratio.den = 1; | |
194 | } | |
195 | if (platform_base_freq < 40000000) { | |
196 | printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n", | |
197 | platform_base_freq); | |
198 | platform_base_freq = 75000000; | |
199 | platform_base_drift = -1; | |
200 | } | |
201 | if (!proc_ratio.den) | |
202 | proc_ratio.den = 1; /* avoid division by zero */ | |
203 | if (!itc_ratio.den) | |
204 | itc_ratio.den = 1; /* avoid division by zero */ | |
205 | ||
206 | itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den; | |
207 | ||
208 | local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ; | |
2ab9391d | 209 | printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " |
1da177e4 LT |
210 | "ITC freq=%lu.%03luMHz", smp_processor_id(), |
211 | platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000, | |
212 | itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000); | |
213 | ||
214 | if (platform_base_drift != -1) { | |
215 | itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den; | |
216 | printk("+/-%ldppm\n", itc_drift); | |
217 | } else { | |
218 | itc_drift = -1; | |
219 | printk("\n"); | |
220 | } | |
221 | ||
222 | local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den; | |
223 | local_cpu_data->itc_freq = itc_freq; | |
224 | local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC; | |
225 | local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT) | |
226 | + itc_freq/2)/itc_freq; | |
227 | ||
228 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { | |
1da177e4 LT |
229 | #ifdef CONFIG_SMP |
230 | /* On IA64 in an SMP configuration ITCs are never accurately synchronized. | |
231 | * Jitter compensation requires a cmpxchg which may limit | |
232 | * the scalability of the syscalls for retrieving time. | |
233 | * The ITC synchronization is usually successful to within a few | |
234 | * ITC ticks but this is not a sure thing. If you need to improve | |
235 | * timer performance in SMP situations then boot the kernel with the | |
236 | * "nojitter" option. However, doing so may result in time fluctuating (maybe | |
237 | * even going backward) if the ITC offsets between the individual CPUs | |
238 | * are too large. | |
239 | */ | |
0aa366f3 TL |
240 | if (!nojitter) |
241 | itc_jitter_data.itc_jitter = 1; | |
1da177e4 | 242 | #endif |
1da177e4 LT |
243 | } |
244 | ||
245 | /* Setup the CPU local timer tick */ | |
246 | ia64_cpu_local_tick(); | |
0aa366f3 TL |
247 | |
248 | if (!itc_clocksource) { | |
249 | /* Sort out mult/shift values: */ | |
250 | clocksource_itc.mult = | |
251 | clocksource_hz2mult(local_cpu_data->itc_freq, | |
252 | clocksource_itc.shift); | |
253 | clocksource_register(&clocksource_itc); | |
254 | itc_clocksource = &clocksource_itc; | |
255 | } | |
1da177e4 LT |
256 | } |
257 | ||
8dc94630 | 258 | static cycle_t itc_get_cycles(void) |
0aa366f3 TL |
259 | { |
260 | u64 lcycle, now, ret; | |
261 | ||
262 | if (!itc_jitter_data.itc_jitter) | |
263 | return get_cycles(); | |
264 | ||
265 | lcycle = itc_jitter_data.itc_lastcycle; | |
266 | now = get_cycles(); | |
267 | if (lcycle && time_after(lcycle, now)) | |
268 | return lcycle; | |
269 | ||
270 | /* | |
271 | * Keep track of the last timer value returned. | |
272 | * In an SMP environment, you could lose out in contention of | |
273 | * cmpxchg. If so, your cmpxchg returns new value which the | |
274 | * winner of contention updated to. Use the new value instead. | |
275 | */ | |
276 | ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now); | |
277 | if (unlikely(ret != lcycle)) | |
278 | return ret; | |
279 | ||
280 | return now; | |
281 | } | |
282 | ||
283 | ||
1da177e4 LT |
284 | static struct irqaction timer_irqaction = { |
285 | .handler = timer_interrupt, | |
d217c265 | 286 | .flags = IRQF_DISABLED | IRQF_IRQPOLL, |
1da177e4 LT |
287 | .name = "timer" |
288 | }; | |
289 | ||
ff741906 AR |
290 | void __devinit ia64_disable_timer(void) |
291 | { | |
292 | ia64_set_itv(1 << 16); | |
293 | } | |
294 | ||
1da177e4 LT |
295 | void __init |
296 | time_init (void) | |
297 | { | |
298 | register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction); | |
299 | efi_gettimeofday(&xtime); | |
300 | ia64_init_itm(); | |
301 | ||
302 | /* | |
303 | * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the | |
304 | * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC). | |
305 | */ | |
306 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); | |
307 | } | |
f5899b5d | 308 | |
defbb2c9 | 309 | /* |
310 | * Generic udelay assumes that if preemption is allowed and the thread | |
311 | * migrates to another CPU, that the ITC values are synchronized across | |
312 | * all CPUs. | |
313 | */ | |
314 | static void | |
315 | ia64_itc_udelay (unsigned long usecs) | |
f5899b5d | 316 | { |
defbb2c9 | 317 | unsigned long start = ia64_get_itc(); |
318 | unsigned long end = start + usecs*local_cpu_data->cyc_per_usec; | |
f5899b5d | 319 | |
defbb2c9 | 320 | while (time_before(ia64_get_itc(), end)) |
321 | cpu_relax(); | |
322 | } | |
f5899b5d | 323 | |
defbb2c9 | 324 | void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay; |
f5899b5d | 325 | |
defbb2c9 | 326 | void |
327 | udelay (unsigned long usecs) | |
328 | { | |
329 | (*ia64_udelay)(usecs); | |
f5899b5d JH |
330 | } |
331 | EXPORT_SYMBOL(udelay); | |
d6e56a2a TL |
332 | |
333 | static unsigned long long ia64_itc_printk_clock(void) | |
334 | { | |
335 | if (ia64_get_kr(IA64_KR_PER_CPU_DATA)) | |
336 | return sched_clock(); | |
337 | return 0; | |
338 | } | |
339 | ||
340 | static unsigned long long ia64_default_printk_clock(void) | |
341 | { | |
342 | return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) * | |
343 | (1000000000/HZ); | |
344 | } | |
345 | ||
346 | unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock; | |
347 | ||
348 | unsigned long long printk_clock(void) | |
349 | { | |
350 | return ia64_printk_clock(); | |
351 | } | |
352 | ||
353 | void __init | |
354 | ia64_setup_printk_clock(void) | |
355 | { | |
356 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) | |
357 | ia64_printk_clock = ia64_itc_printk_clock; | |
358 | } | |
0aa366f3 TL |
359 | |
360 | void update_vsyscall(struct timespec *wall, struct clocksource *c) | |
361 | { | |
362 | unsigned long flags; | |
363 | ||
364 | write_seqlock_irqsave(&fsyscall_gtod_data.lock, flags); | |
365 | ||
366 | /* copy fsyscall clock data */ | |
367 | fsyscall_gtod_data.clk_mask = c->mask; | |
368 | fsyscall_gtod_data.clk_mult = c->mult; | |
369 | fsyscall_gtod_data.clk_shift = c->shift; | |
370 | fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio; | |
371 | fsyscall_gtod_data.clk_cycle_last = c->cycle_last; | |
372 | ||
373 | /* copy kernel time structures */ | |
374 | fsyscall_gtod_data.wall_time.tv_sec = wall->tv_sec; | |
375 | fsyscall_gtod_data.wall_time.tv_nsec = wall->tv_nsec; | |
376 | fsyscall_gtod_data.monotonic_time.tv_sec = wall_to_monotonic.tv_sec | |
377 | + wall->tv_sec; | |
378 | fsyscall_gtod_data.monotonic_time.tv_nsec = wall_to_monotonic.tv_nsec | |
379 | + wall->tv_nsec; | |
380 | ||
381 | /* normalize */ | |
382 | while (fsyscall_gtod_data.monotonic_time.tv_nsec >= NSEC_PER_SEC) { | |
383 | fsyscall_gtod_data.monotonic_time.tv_nsec -= NSEC_PER_SEC; | |
384 | fsyscall_gtod_data.monotonic_time.tv_sec++; | |
385 | } | |
386 | ||
387 | write_sequnlock_irqrestore(&fsyscall_gtod_data.lock, flags); | |
388 | } | |
389 |