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1da177e4 LT |
1 | /* |
2 | * linux/arch/ia64/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * Stephane Eranian <eranian@hpl.hp.com> | |
6 | * David Mosberger <davidm@hpl.hp.com> | |
7 | * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> | |
8 | * Copyright (C) 1999-2000 VA Linux Systems | |
9 | * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com> | |
10 | */ | |
1da177e4 LT |
11 | |
12 | #include <linux/cpu.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/profile.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/time.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/efi.h> | |
21 | #include <linux/profile.h> | |
22 | #include <linux/timex.h> | |
23 | ||
24 | #include <asm/machvec.h> | |
25 | #include <asm/delay.h> | |
26 | #include <asm/hw_irq.h> | |
27 | #include <asm/ptrace.h> | |
28 | #include <asm/sal.h> | |
29 | #include <asm/sections.h> | |
30 | #include <asm/system.h> | |
31 | ||
ff741906 | 32 | volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */ |
1da177e4 LT |
33 | |
34 | #ifdef CONFIG_IA64_DEBUG_IRQ | |
35 | ||
36 | unsigned long last_cli_ip; | |
37 | EXPORT_SYMBOL(last_cli_ip); | |
38 | ||
39 | #endif | |
40 | ||
41 | static struct time_interpolator itc_interpolator = { | |
42 | .shift = 16, | |
43 | .mask = 0xffffffffffffffffLL, | |
44 | .source = TIME_SOURCE_CPU | |
45 | }; | |
46 | ||
47 | static irqreturn_t | |
48 | timer_interrupt (int irq, void *dev_id, struct pt_regs *regs) | |
49 | { | |
50 | unsigned long new_itm; | |
51 | ||
52 | if (unlikely(cpu_is_offline(smp_processor_id()))) { | |
53 | return IRQ_HANDLED; | |
54 | } | |
55 | ||
56 | platform_timer_interrupt(irq, dev_id, regs); | |
57 | ||
58 | new_itm = local_cpu_data->itm_next; | |
59 | ||
60 | if (!time_after(ia64_get_itc(), new_itm)) | |
61 | printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", | |
62 | ia64_get_itc(), new_itm); | |
63 | ||
64 | profile_tick(CPU_PROFILING, regs); | |
65 | ||
66 | while (1) { | |
67 | update_process_times(user_mode(regs)); | |
68 | ||
69 | new_itm += local_cpu_data->itm_delta; | |
70 | ||
ff741906 | 71 | if (smp_processor_id() == time_keeper_id) { |
1da177e4 LT |
72 | /* |
73 | * Here we are in the timer irq handler. We have irqs locally | |
74 | * disabled, but we don't know if the timer_bh is running on | |
75 | * another CPU. We need to avoid to SMP race by acquiring the | |
76 | * xtime_lock. | |
77 | */ | |
78 | write_seqlock(&xtime_lock); | |
3171a030 | 79 | do_timer(1); |
1da177e4 LT |
80 | local_cpu_data->itm_next = new_itm; |
81 | write_sequnlock(&xtime_lock); | |
82 | } else | |
83 | local_cpu_data->itm_next = new_itm; | |
84 | ||
85 | if (time_after(new_itm, ia64_get_itc())) | |
86 | break; | |
87 | } | |
88 | ||
89 | do { | |
90 | /* | |
91 | * If we're too close to the next clock tick for | |
92 | * comfort, we increase the safety margin by | |
93 | * intentionally dropping the next tick(s). We do NOT | |
94 | * update itm.next because that would force us to call | |
95 | * do_timer() which in turn would let our clock run | |
96 | * too fast (with the potentially devastating effect | |
97 | * of losing monotony of time). | |
98 | */ | |
99 | while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2)) | |
100 | new_itm += local_cpu_data->itm_delta; | |
101 | ia64_set_itm(new_itm); | |
102 | /* double check, in case we got hit by a (slow) PMI: */ | |
103 | } while (time_after_eq(ia64_get_itc(), new_itm)); | |
104 | return IRQ_HANDLED; | |
105 | } | |
106 | ||
107 | /* | |
108 | * Encapsulate access to the itm structure for SMP. | |
109 | */ | |
110 | void | |
111 | ia64_cpu_local_tick (void) | |
112 | { | |
113 | int cpu = smp_processor_id(); | |
114 | unsigned long shift = 0, delta; | |
115 | ||
116 | /* arrange for the cycle counter to generate a timer interrupt: */ | |
117 | ia64_set_itv(IA64_TIMER_VECTOR); | |
118 | ||
119 | delta = local_cpu_data->itm_delta; | |
120 | /* | |
121 | * Stagger the timer tick for each CPU so they don't occur all at (almost) the | |
122 | * same time: | |
123 | */ | |
124 | if (cpu) { | |
125 | unsigned long hi = 1UL << ia64_fls(cpu); | |
126 | shift = (2*(cpu - hi) + 1) * delta/hi/2; | |
127 | } | |
128 | local_cpu_data->itm_next = ia64_get_itc() + delta + shift; | |
129 | ia64_set_itm(local_cpu_data->itm_next); | |
130 | } | |
131 | ||
132 | static int nojitter; | |
133 | ||
134 | static int __init nojitter_setup(char *str) | |
135 | { | |
136 | nojitter = 1; | |
137 | printk("Jitter checking for ITC timers disabled\n"); | |
138 | return 1; | |
139 | } | |
140 | ||
141 | __setup("nojitter", nojitter_setup); | |
142 | ||
143 | ||
144 | void __devinit | |
145 | ia64_init_itm (void) | |
146 | { | |
147 | unsigned long platform_base_freq, itc_freq; | |
148 | struct pal_freq_ratio itc_ratio, proc_ratio; | |
149 | long status, platform_base_drift, itc_drift; | |
150 | ||
151 | /* | |
152 | * According to SAL v2.6, we need to use a SAL call to determine the platform base | |
153 | * frequency and then a PAL call to determine the frequency ratio between the ITC | |
154 | * and the base frequency. | |
155 | */ | |
156 | status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM, | |
157 | &platform_base_freq, &platform_base_drift); | |
158 | if (status != 0) { | |
159 | printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status)); | |
160 | } else { | |
161 | status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio); | |
162 | if (status != 0) | |
163 | printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status); | |
164 | } | |
165 | if (status != 0) { | |
166 | /* invent "random" values */ | |
167 | printk(KERN_ERR | |
168 | "SAL/PAL failed to obtain frequency info---inventing reasonable values\n"); | |
169 | platform_base_freq = 100000000; | |
170 | platform_base_drift = -1; /* no drift info */ | |
171 | itc_ratio.num = 3; | |
172 | itc_ratio.den = 1; | |
173 | } | |
174 | if (platform_base_freq < 40000000) { | |
175 | printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n", | |
176 | platform_base_freq); | |
177 | platform_base_freq = 75000000; | |
178 | platform_base_drift = -1; | |
179 | } | |
180 | if (!proc_ratio.den) | |
181 | proc_ratio.den = 1; /* avoid division by zero */ | |
182 | if (!itc_ratio.den) | |
183 | itc_ratio.den = 1; /* avoid division by zero */ | |
184 | ||
185 | itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den; | |
186 | ||
187 | local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ; | |
2ab9391d | 188 | printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " |
1da177e4 LT |
189 | "ITC freq=%lu.%03luMHz", smp_processor_id(), |
190 | platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000, | |
191 | itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000); | |
192 | ||
193 | if (platform_base_drift != -1) { | |
194 | itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den; | |
195 | printk("+/-%ldppm\n", itc_drift); | |
196 | } else { | |
197 | itc_drift = -1; | |
198 | printk("\n"); | |
199 | } | |
200 | ||
201 | local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den; | |
202 | local_cpu_data->itc_freq = itc_freq; | |
203 | local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC; | |
204 | local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT) | |
205 | + itc_freq/2)/itc_freq; | |
206 | ||
207 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { | |
208 | itc_interpolator.frequency = local_cpu_data->itc_freq; | |
209 | itc_interpolator.drift = itc_drift; | |
210 | #ifdef CONFIG_SMP | |
211 | /* On IA64 in an SMP configuration ITCs are never accurately synchronized. | |
212 | * Jitter compensation requires a cmpxchg which may limit | |
213 | * the scalability of the syscalls for retrieving time. | |
214 | * The ITC synchronization is usually successful to within a few | |
215 | * ITC ticks but this is not a sure thing. If you need to improve | |
216 | * timer performance in SMP situations then boot the kernel with the | |
217 | * "nojitter" option. However, doing so may result in time fluctuating (maybe | |
218 | * even going backward) if the ITC offsets between the individual CPUs | |
219 | * are too large. | |
220 | */ | |
221 | if (!nojitter) itc_interpolator.jitter = 1; | |
222 | #endif | |
223 | register_time_interpolator(&itc_interpolator); | |
224 | } | |
225 | ||
226 | /* Setup the CPU local timer tick */ | |
227 | ia64_cpu_local_tick(); | |
228 | } | |
229 | ||
230 | static struct irqaction timer_irqaction = { | |
231 | .handler = timer_interrupt, | |
121a4226 | 232 | .flags = IRQF_DISABLED, |
1da177e4 LT |
233 | .name = "timer" |
234 | }; | |
235 | ||
ff741906 AR |
236 | void __devinit ia64_disable_timer(void) |
237 | { | |
238 | ia64_set_itv(1 << 16); | |
239 | } | |
240 | ||
1da177e4 LT |
241 | void __init |
242 | time_init (void) | |
243 | { | |
244 | register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction); | |
245 | efi_gettimeofday(&xtime); | |
246 | ia64_init_itm(); | |
247 | ||
248 | /* | |
249 | * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the | |
250 | * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC). | |
251 | */ | |
252 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); | |
253 | } | |
f5899b5d | 254 | |
defbb2c9 | 255 | /* |
256 | * Generic udelay assumes that if preemption is allowed and the thread | |
257 | * migrates to another CPU, that the ITC values are synchronized across | |
258 | * all CPUs. | |
259 | */ | |
260 | static void | |
261 | ia64_itc_udelay (unsigned long usecs) | |
f5899b5d | 262 | { |
defbb2c9 | 263 | unsigned long start = ia64_get_itc(); |
264 | unsigned long end = start + usecs*local_cpu_data->cyc_per_usec; | |
f5899b5d | 265 | |
defbb2c9 | 266 | while (time_before(ia64_get_itc(), end)) |
267 | cpu_relax(); | |
268 | } | |
f5899b5d | 269 | |
defbb2c9 | 270 | void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay; |
f5899b5d | 271 | |
defbb2c9 | 272 | void |
273 | udelay (unsigned long usecs) | |
274 | { | |
275 | (*ia64_udelay)(usecs); | |
f5899b5d JH |
276 | } |
277 | EXPORT_SYMBOL(udelay); | |
d6e56a2a TL |
278 | |
279 | static unsigned long long ia64_itc_printk_clock(void) | |
280 | { | |
281 | if (ia64_get_kr(IA64_KR_PER_CPU_DATA)) | |
282 | return sched_clock(); | |
283 | return 0; | |
284 | } | |
285 | ||
286 | static unsigned long long ia64_default_printk_clock(void) | |
287 | { | |
288 | return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) * | |
289 | (1000000000/HZ); | |
290 | } | |
291 | ||
292 | unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock; | |
293 | ||
294 | unsigned long long printk_clock(void) | |
295 | { | |
296 | return ia64_printk_clock(); | |
297 | } | |
298 | ||
299 | void __init | |
300 | ia64_setup_printk_clock(void) | |
301 | { | |
302 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) | |
303 | ia64_printk_clock = ia64_itc_printk_clock; | |
304 | } |