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Commit | Line | Data |
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1da177e4 LT |
1 | |
2 | #include <asm/cache.h> | |
3 | #include <asm/ptrace.h> | |
1da177e4 LT |
4 | #include <asm/pgtable.h> |
5 | ||
1da177e4 LT |
6 | #include <asm-generic/vmlinux.lds.h> |
7 | ||
8 | OUTPUT_FORMAT("elf64-ia64-little") | |
9 | OUTPUT_ARCH(ia64) | |
10 | ENTRY(phys_start) | |
11 | jiffies = jiffies_64; | |
7b313fdf | 12 | |
1da177e4 | 13 | PHDRS { |
7b313fdf SR |
14 | code PT_LOAD; |
15 | percpu PT_LOAD; | |
16 | data PT_LOAD; | |
17 | note PT_NOTE; | |
18 | unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */ | |
1da177e4 | 19 | } |
1da177e4 | 20 | |
7b313fdf SR |
21 | SECTIONS { |
22 | /* | |
23 | * unwind exit sections must be discarded before | |
24 | * the rest of the sections get included. | |
25 | */ | |
26 | /DISCARD/ : { | |
27 | *(.IA_64.unwind.exit.text) | |
28 | *(.IA_64.unwind_info.exit.text) | |
29 | *(.comment) | |
30 | *(.note) | |
31 | } | |
1da177e4 | 32 | |
7b313fdf SR |
33 | v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */ |
34 | phys_start = _start - LOAD_OFFSET; | |
35 | ||
36 | code : { | |
37 | } :code | |
38 | . = KERNEL_START; | |
39 | ||
40 | _text = .; | |
41 | _stext = .; | |
42 | ||
43 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | |
44 | __start_ivt_text = .; | |
45 | *(.text..ivt) | |
46 | __end_ivt_text = .; | |
47 | TEXT_TEXT | |
48 | SCHED_TEXT | |
49 | LOCK_TEXT | |
50 | KPROBES_TEXT | |
51 | *(.gnu.linkonce.t*) | |
52 | } | |
336cdba8 | 53 | |
7b313fdf SR |
54 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) { |
55 | *(.text2) | |
56 | } | |
1da177e4 | 57 | |
7b313fdf SR |
58 | #ifdef CONFIG_SMP |
59 | .text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) { | |
60 | *(.text..lock) | |
61 | } | |
62 | #endif | |
63 | _etext = .; | |
64 | ||
65 | /* | |
66 | * Read-only data | |
67 | */ | |
68 | NOTES :code :note /* put .notes in text and mark in PT_NOTE */ | |
69 | code_continues : { | |
70 | } : code /* switch back to regular program... */ | |
71 | ||
72 | EXCEPTION_TABLE(16) | |
73 | ||
74 | /* MCA table */ | |
75 | . = ALIGN(16); | |
76 | __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) { | |
77 | __start___mca_table = .; | |
78 | *(__mca_table) | |
79 | __stop___mca_table = .; | |
d89cfe7f RA |
80 | } |
81 | ||
7b313fdf SR |
82 | .data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) { |
83 | __start___phys_stack_reg_patchlist = .; | |
84 | *(.data..patch.phys_stack_reg) | |
85 | __end___phys_stack_reg_patchlist = .; | |
a0776ec8 KC |
86 | } |
87 | ||
7b313fdf SR |
88 | /* |
89 | * Global data | |
90 | */ | |
91 | _data = .; | |
1da177e4 | 92 | |
7b313fdf SR |
93 | /* Unwind info & table: */ |
94 | . = ALIGN(8); | |
95 | .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET) { | |
96 | *(.IA_64.unwind_info*) | |
97 | } | |
98 | .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET) { | |
99 | __start_unwind = .; | |
100 | *(.IA_64.unwind*) | |
101 | __end_unwind = .; | |
9bf77d0e | 102 | } :code :unwind |
7b313fdf SR |
103 | code_continues2 : { |
104 | } : code | |
1da177e4 | 105 | |
7b313fdf | 106 | RODATA |
1da177e4 | 107 | |
7b313fdf SR |
108 | .opd : AT(ADDR(.opd) - LOAD_OFFSET) { |
109 | *(.opd) | |
110 | } | |
1da177e4 | 111 | |
7b313fdf SR |
112 | /* |
113 | * Initialization code and data: | |
114 | */ | |
115 | . = ALIGN(PAGE_SIZE); | |
116 | __init_begin = .; | |
1da177e4 | 117 | |
7b313fdf SR |
118 | INIT_TEXT_SECTION(PAGE_SIZE) |
119 | INIT_DATA_SECTION(16) | |
39e18de8 | 120 | |
7b313fdf SR |
121 | .data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) { |
122 | __start___vtop_patchlist = .; | |
123 | *(.data..patch.vtop) | |
124 | __end___vtop_patchlist = .; | |
39e18de8 KC |
125 | } |
126 | ||
7b313fdf SR |
127 | .data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) { |
128 | __start___rse_patchlist = .; | |
129 | *(.data..patch.rse) | |
130 | __end___rse_patchlist = .; | |
4dcc29e1 TL |
131 | } |
132 | ||
7b313fdf SR |
133 | .data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) { |
134 | __start___mckinley_e9_bundles = .; | |
135 | *(.data..patch.mckinley_e9) | |
136 | __end___mckinley_e9_bundles = .; | |
39e18de8 KC |
137 | } |
138 | ||
139 | #if defined(CONFIG_IA64_GENERIC) | |
7b313fdf SR |
140 | /* Machine Vector */ |
141 | . = ALIGN(16); | |
142 | .machvec : AT(ADDR(.machvec) - LOAD_OFFSET) { | |
143 | machvec_start = .; | |
144 | *(.machvec) | |
145 | machvec_end = .; | |
39e18de8 KC |
146 | } |
147 | #endif | |
148 | ||
36886478 | 149 | #ifdef CONFIG_SMP |
7b313fdf SR |
150 | . = ALIGN(PERCPU_PAGE_SIZE); |
151 | __cpu0_per_cpu = .; | |
152 | . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */ | |
36886478 TH |
153 | #endif |
154 | ||
7b313fdf SR |
155 | . = ALIGN(PAGE_SIZE); |
156 | __init_end = .; | |
1da177e4 | 157 | |
7b313fdf SR |
158 | .data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) { |
159 | PAGE_ALIGNED_DATA(PAGE_SIZE) | |
160 | . = ALIGN(PAGE_SIZE); | |
161 | __start_gate_section = .; | |
162 | *(.data..gate) | |
163 | __stop_gate_section = .; | |
1da177e4 | 164 | } |
7b313fdf SR |
165 | /* |
166 | * make sure the gate page doesn't expose | |
167 | * kernel data | |
168 | */ | |
169 | . = ALIGN(PAGE_SIZE); | |
170 | ||
171 | /* Per-cpu data: */ | |
172 | . = ALIGN(PERCPU_PAGE_SIZE); | |
19df0c2f | 173 | PERCPU_VADDR(SMP_CACHE_BYTES, PERCPU_ADDR, :percpu) |
7b313fdf SR |
174 | __phys_per_cpu_start = __per_cpu_load; |
175 | /* | |
176 | * ensure percpu data fits | |
177 | * into percpu page size | |
178 | */ | |
179 | . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; | |
180 | ||
181 | data : { | |
182 | } :data | |
183 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | |
30f7276c | 184 | _sdata = .; |
6ae86350 NE |
185 | INIT_TASK_DATA(PAGE_SIZE) |
186 | CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES) | |
187 | READ_MOSTLY_DATA(SMP_CACHE_BYTES) | |
ca967258 SR |
188 | DATA_DATA |
189 | *(.data1) | |
190 | *(.gnu.linkonce.d*) | |
191 | CONSTRUCTORS | |
192 | } | |
1da177e4 | 193 | |
7b313fdf SR |
194 | . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */ |
195 | .got : AT(ADDR(.got) - LOAD_OFFSET) { | |
196 | *(.got.plt) | |
197 | *(.got) | |
198 | } | |
199 | __gp = ADDR(.got) + 0x200000; | |
200 | ||
201 | /* | |
202 | * We want the small data sections together, | |
203 | * so single-instruction offsets can access | |
204 | * them all, and initialized data all before | |
205 | * uninitialized, so we can shorten the | |
206 | * on-disk segment size. | |
207 | */ | |
208 | .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) { | |
209 | *(.sdata) | |
210 | *(.sdata1) | |
211 | *(.srdata) | |
212 | } | |
213 | _edata = .; | |
6ae86350 | 214 | |
7b313fdf | 215 | BSS_SECTION(0, 0, 0) |
1da177e4 | 216 | |
7b313fdf | 217 | _end = .; |
1da177e4 | 218 | |
7b313fdf SR |
219 | code : { |
220 | } :code | |
6ae86350 | 221 | |
7b313fdf SR |
222 | STABS_DEBUG |
223 | DWARF_DEBUG | |
023bf6f1 | 224 | |
7b313fdf SR |
225 | /* Default discards */ |
226 | DISCARDS | |
1da177e4 | 227 | } |