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Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 | 2 | |
65fddcfc | 3 | #include <linux/pgtable.h> |
1da177e4 LT |
4 | #include <asm/cache.h> |
5 | #include <asm/ptrace.h> | |
0500871f | 6 | #include <asm/thread_info.h> |
1da177e4 | 7 | |
441110a5 | 8 | #define EMITS_PT_NOTE |
9b30e704 | 9 | #define RO_EXCEPTION_TABLE_ALIGN 16 |
441110a5 | 10 | |
1da177e4 LT |
11 | #include <asm-generic/vmlinux.lds.h> |
12 | ||
13 | OUTPUT_FORMAT("elf64-ia64-little") | |
14 | OUTPUT_ARCH(ia64) | |
15 | ENTRY(phys_start) | |
16 | jiffies = jiffies_64; | |
7b313fdf | 17 | |
1da177e4 | 18 | PHDRS { |
430c6b26 | 19 | text PT_LOAD; |
7b313fdf SR |
20 | percpu PT_LOAD; |
21 | data PT_LOAD; | |
22 | note PT_NOTE; | |
23 | unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */ | |
1da177e4 | 24 | } |
1da177e4 | 25 | |
7b313fdf SR |
26 | SECTIONS { |
27 | /* | |
28 | * unwind exit sections must be discarded before | |
29 | * the rest of the sections get included. | |
30 | */ | |
31 | /DISCARD/ : { | |
32 | *(.IA_64.unwind.exit.text) | |
33 | *(.IA_64.unwind_info.exit.text) | |
34 | *(.comment) | |
35 | *(.note) | |
36 | } | |
1da177e4 | 37 | |
7b313fdf SR |
38 | v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */ |
39 | phys_start = _start - LOAD_OFFSET; | |
40 | ||
41 | code : { | |
430c6b26 | 42 | } :text |
7b313fdf SR |
43 | . = KERNEL_START; |
44 | ||
45 | _text = .; | |
46 | _stext = .; | |
47 | ||
48 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | |
49 | __start_ivt_text = .; | |
50 | *(.text..ivt) | |
51 | __end_ivt_text = .; | |
52 | TEXT_TEXT | |
53 | SCHED_TEXT | |
6727ad9e | 54 | CPUIDLE_TEXT |
7b313fdf SR |
55 | LOCK_TEXT |
56 | KPROBES_TEXT | |
505a0ef1 AP |
57 | IRQENTRY_TEXT |
58 | SOFTIRQENTRY_TEXT | |
7b313fdf SR |
59 | *(.gnu.linkonce.t*) |
60 | } | |
336cdba8 | 61 | |
7b313fdf SR |
62 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) { |
63 | *(.text2) | |
64 | } | |
1da177e4 | 65 | |
7b313fdf SR |
66 | #ifdef CONFIG_SMP |
67 | .text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) { | |
68 | *(.text..lock) | |
69 | } | |
70 | #endif | |
71 | _etext = .; | |
72 | ||
73 | /* | |
74 | * Read-only data | |
75 | */ | |
7b313fdf SR |
76 | |
77 | /* MCA table */ | |
78 | . = ALIGN(16); | |
79 | __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) { | |
80 | __start___mca_table = .; | |
81 | *(__mca_table) | |
82 | __stop___mca_table = .; | |
d89cfe7f RA |
83 | } |
84 | ||
7b313fdf SR |
85 | .data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) { |
86 | __start___phys_stack_reg_patchlist = .; | |
87 | *(.data..patch.phys_stack_reg) | |
88 | __end___phys_stack_reg_patchlist = .; | |
a0776ec8 KC |
89 | } |
90 | ||
7b313fdf SR |
91 | /* |
92 | * Global data | |
93 | */ | |
94 | _data = .; | |
1da177e4 | 95 | |
7b313fdf SR |
96 | /* Unwind info & table: */ |
97 | . = ALIGN(8); | |
98 | .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET) { | |
99 | *(.IA_64.unwind_info*) | |
100 | } | |
101 | .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET) { | |
102 | __start_unwind = .; | |
103 | *(.IA_64.unwind*) | |
104 | __end_unwind = .; | |
430c6b26 | 105 | } :text :unwind |
7b313fdf | 106 | code_continues2 : { |
430c6b26 | 107 | } :text |
1da177e4 | 108 | |
c8231825 | 109 | RO_DATA(4096) |
1da177e4 | 110 | |
7b313fdf | 111 | .opd : AT(ADDR(.opd) - LOAD_OFFSET) { |
8e307888 | 112 | __start_opd = .; |
7b313fdf | 113 | *(.opd) |
8e307888 | 114 | __end_opd = .; |
7b313fdf | 115 | } |
1da177e4 | 116 | |
7b313fdf SR |
117 | /* |
118 | * Initialization code and data: | |
119 | */ | |
120 | . = ALIGN(PAGE_SIZE); | |
121 | __init_begin = .; | |
1da177e4 | 122 | |
7b313fdf SR |
123 | INIT_TEXT_SECTION(PAGE_SIZE) |
124 | INIT_DATA_SECTION(16) | |
39e18de8 | 125 | |
7b313fdf SR |
126 | .data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) { |
127 | __start___vtop_patchlist = .; | |
128 | *(.data..patch.vtop) | |
129 | __end___vtop_patchlist = .; | |
39e18de8 KC |
130 | } |
131 | ||
7b313fdf SR |
132 | .data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) { |
133 | __start___rse_patchlist = .; | |
134 | *(.data..patch.rse) | |
135 | __end___rse_patchlist = .; | |
4dcc29e1 TL |
136 | } |
137 | ||
7b313fdf SR |
138 | .data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) { |
139 | __start___mckinley_e9_bundles = .; | |
140 | *(.data..patch.mckinley_e9) | |
141 | __end___mckinley_e9_bundles = .; | |
39e18de8 KC |
142 | } |
143 | ||
36886478 | 144 | #ifdef CONFIG_SMP |
7b313fdf SR |
145 | . = ALIGN(PERCPU_PAGE_SIZE); |
146 | __cpu0_per_cpu = .; | |
147 | . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */ | |
36886478 TH |
148 | #endif |
149 | ||
7b313fdf SR |
150 | . = ALIGN(PAGE_SIZE); |
151 | __init_end = .; | |
1da177e4 | 152 | |
7b313fdf SR |
153 | .data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) { |
154 | PAGE_ALIGNED_DATA(PAGE_SIZE) | |
155 | . = ALIGN(PAGE_SIZE); | |
156 | __start_gate_section = .; | |
157 | *(.data..gate) | |
158 | __stop_gate_section = .; | |
1da177e4 | 159 | } |
7b313fdf SR |
160 | /* |
161 | * make sure the gate page doesn't expose | |
162 | * kernel data | |
163 | */ | |
164 | . = ALIGN(PAGE_SIZE); | |
165 | ||
166 | /* Per-cpu data: */ | |
167 | . = ALIGN(PERCPU_PAGE_SIZE); | |
19df0c2f | 168 | PERCPU_VADDR(SMP_CACHE_BYTES, PERCPU_ADDR, :percpu) |
7b313fdf SR |
169 | __phys_per_cpu_start = __per_cpu_load; |
170 | /* | |
171 | * ensure percpu data fits | |
172 | * into percpu page size | |
173 | */ | |
174 | . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; | |
175 | ||
176 | data : { | |
177 | } :data | |
178 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | |
30f7276c | 179 | _sdata = .; |
6ae86350 NE |
180 | INIT_TASK_DATA(PAGE_SIZE) |
181 | CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES) | |
182 | READ_MOSTLY_DATA(SMP_CACHE_BYTES) | |
ca967258 SR |
183 | DATA_DATA |
184 | *(.data1) | |
185 | *(.gnu.linkonce.d*) | |
186 | CONSTRUCTORS | |
187 | } | |
1da177e4 | 188 | |
b5effd38 PZ |
189 | BUG_TABLE |
190 | ||
7b313fdf SR |
191 | . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */ |
192 | .got : AT(ADDR(.got) - LOAD_OFFSET) { | |
193 | *(.got.plt) | |
194 | *(.got) | |
195 | } | |
196 | __gp = ADDR(.got) + 0x200000; | |
197 | ||
198 | /* | |
199 | * We want the small data sections together, | |
200 | * so single-instruction offsets can access | |
201 | * them all, and initialized data all before | |
202 | * uninitialized, so we can shorten the | |
203 | * on-disk segment size. | |
204 | */ | |
205 | .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) { | |
206 | *(.sdata) | |
207 | *(.sdata1) | |
208 | *(.srdata) | |
209 | } | |
210 | _edata = .; | |
6ae86350 | 211 | |
7b313fdf | 212 | BSS_SECTION(0, 0, 0) |
1da177e4 | 213 | |
7b313fdf | 214 | _end = .; |
1da177e4 | 215 | |
7b313fdf | 216 | code : { |
430c6b26 | 217 | } :text |
6ae86350 | 218 | |
7b313fdf SR |
219 | STABS_DEBUG |
220 | DWARF_DEBUG | |
023bf6f1 | 221 | |
7b313fdf SR |
222 | /* Default discards */ |
223 | DISCARDS | |
1da177e4 | 224 | } |