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1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
4 | * This implementation is for IA-64 platforms that do not support | |
5 | * I/O TLBs (aka DMA address translation hardware). | |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. | |
15 | */ | |
16 | ||
17 | #include <linux/cache.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/pci.h> | |
21 | #include <linux/spinlock.h> | |
22 | #include <linux/string.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/ctype.h> | |
25 | ||
26 | #include <asm/io.h> | |
27 | #include <asm/pci.h> | |
28 | #include <asm/dma.h> | |
29 | ||
30 | #include <linux/init.h> | |
31 | #include <linux/bootmem.h> | |
32 | ||
33 | #define OFFSET(val,align) ((unsigned long) \ | |
34 | ( (val) & ( (align) - 1))) | |
35 | ||
36 | #define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset) | |
37 | #define SG_ENT_PHYS_ADDRESS(SG) virt_to_phys(SG_ENT_VIRT_ADDRESS(SG)) | |
38 | ||
39 | /* | |
40 | * Maximum allowable number of contiguous slabs to map, | |
41 | * must be a power of 2. What is the appropriate value ? | |
42 | * The complexity of {map,unmap}_single is linearly dependent on this value. | |
43 | */ | |
44 | #define IO_TLB_SEGSIZE 128 | |
45 | ||
46 | /* | |
47 | * log of the size of each IO TLB slab. The number of slabs is command line | |
48 | * controllable. | |
49 | */ | |
50 | #define IO_TLB_SHIFT 11 | |
51 | ||
52 | int swiotlb_force; | |
53 | ||
54 | /* | |
55 | * Used to do a quick range check in swiotlb_unmap_single and | |
56 | * swiotlb_sync_single_*, to see if the memory was in fact allocated by this | |
57 | * API. | |
58 | */ | |
59 | static char *io_tlb_start, *io_tlb_end; | |
60 | ||
61 | /* | |
62 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
63 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
64 | */ | |
65 | static unsigned long io_tlb_nslabs; | |
66 | ||
67 | /* | |
68 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
69 | */ | |
70 | static unsigned long io_tlb_overflow = 32*1024; | |
71 | ||
72 | void *io_tlb_overflow_buffer; | |
73 | ||
74 | /* | |
75 | * This is a free list describing the number of free entries available from | |
76 | * each index | |
77 | */ | |
78 | static unsigned int *io_tlb_list; | |
79 | static unsigned int io_tlb_index; | |
80 | ||
81 | /* | |
82 | * We need to save away the original address corresponding to a mapped entry | |
83 | * for the sync operations. | |
84 | */ | |
85 | static unsigned char **io_tlb_orig_addr; | |
86 | ||
87 | /* | |
88 | * Protect the above data structures in the map and unmap calls | |
89 | */ | |
90 | static DEFINE_SPINLOCK(io_tlb_lock); | |
91 | ||
92 | static int __init | |
93 | setup_io_tlb_npages(char *str) | |
94 | { | |
95 | if (isdigit(*str)) { | |
96 | io_tlb_nslabs = simple_strtoul(str, &str, 0) << | |
97 | (PAGE_SHIFT - IO_TLB_SHIFT); | |
98 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ | |
99 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
100 | } | |
101 | if (*str == ',') | |
102 | ++str; | |
103 | if (!strcmp(str, "force")) | |
104 | swiotlb_force = 1; | |
105 | return 1; | |
106 | } | |
107 | __setup("swiotlb=", setup_io_tlb_npages); | |
108 | /* make io_tlb_overflow tunable too? */ | |
109 | ||
110 | /* | |
111 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
112 | * structures for the software IO TLB used to implement the PCI DMA API. | |
113 | */ | |
114 | void | |
115 | swiotlb_init_with_default_size (size_t default_size) | |
116 | { | |
117 | unsigned long i; | |
118 | ||
119 | if (!io_tlb_nslabs) { | |
120 | io_tlb_nslabs = (default_size >> PAGE_SHIFT); | |
121 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
122 | } | |
123 | ||
124 | /* | |
125 | * Get IO TLB memory from the low pages | |
126 | */ | |
127 | io_tlb_start = alloc_bootmem_low_pages(io_tlb_nslabs * | |
128 | (1 << IO_TLB_SHIFT)); | |
129 | if (!io_tlb_start) | |
130 | panic("Cannot allocate SWIOTLB buffer"); | |
131 | io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT); | |
132 | ||
133 | /* | |
134 | * Allocate and initialize the free list array. This array is used | |
135 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
136 | * between io_tlb_start and io_tlb_end. | |
137 | */ | |
138 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
139 | for (i = 0; i < io_tlb_nslabs; i++) | |
140 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
141 | io_tlb_index = 0; | |
142 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *)); | |
143 | ||
144 | /* | |
145 | * Get the overflow emergency buffer | |
146 | */ | |
147 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
148 | printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n", | |
149 | virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end)); | |
150 | } | |
151 | ||
152 | void | |
153 | swiotlb_init (void) | |
154 | { | |
155 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ | |
156 | } | |
157 | ||
158 | static inline int | |
159 | address_needs_mapping(struct device *hwdev, dma_addr_t addr) | |
160 | { | |
161 | dma_addr_t mask = 0xffffffff; | |
162 | /* If the device has a mask, use it, otherwise default to 32 bits */ | |
163 | if (hwdev && hwdev->dma_mask) | |
164 | mask = *hwdev->dma_mask; | |
165 | return (addr & ~mask) != 0; | |
166 | } | |
167 | ||
168 | /* | |
169 | * Allocates bounce buffer and returns its kernel virtual address. | |
170 | */ | |
171 | static void * | |
172 | map_single(struct device *hwdev, char *buffer, size_t size, int dir) | |
173 | { | |
174 | unsigned long flags; | |
175 | char *dma_addr; | |
176 | unsigned int nslots, stride, index, wrap; | |
177 | int i; | |
178 | ||
179 | /* | |
180 | * For mappings greater than a page, we limit the stride (and | |
181 | * hence alignment) to a page size. | |
182 | */ | |
183 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
184 | if (size > PAGE_SIZE) | |
185 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
186 | else | |
187 | stride = 1; | |
188 | ||
189 | if (!nslots) | |
190 | BUG(); | |
191 | ||
192 | /* | |
193 | * Find suitable number of IO TLB entries size that will fit this | |
194 | * request and allocate a buffer from that IO TLB pool. | |
195 | */ | |
196 | spin_lock_irqsave(&io_tlb_lock, flags); | |
197 | { | |
198 | wrap = index = ALIGN(io_tlb_index, stride); | |
199 | ||
200 | if (index >= io_tlb_nslabs) | |
201 | wrap = index = 0; | |
202 | ||
203 | do { | |
204 | /* | |
205 | * If we find a slot that indicates we have 'nslots' | |
206 | * number of contiguous buffers, we allocate the | |
207 | * buffers from that slot and mark the entries as '0' | |
208 | * indicating unavailable. | |
209 | */ | |
210 | if (io_tlb_list[index] >= nslots) { | |
211 | int count = 0; | |
212 | ||
213 | for (i = index; i < (int) (index + nslots); i++) | |
214 | io_tlb_list[i] = 0; | |
215 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
216 | io_tlb_list[i] = ++count; | |
217 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
218 | ||
219 | /* | |
220 | * Update the indices to avoid searching in | |
221 | * the next round. | |
222 | */ | |
223 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
224 | ? (index + nslots) : 0); | |
225 | ||
226 | goto found; | |
227 | } | |
228 | index += stride; | |
229 | if (index >= io_tlb_nslabs) | |
230 | index = 0; | |
231 | } while (index != wrap); | |
232 | ||
233 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
234 | return NULL; | |
235 | } | |
236 | found: | |
237 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
238 | ||
239 | /* | |
240 | * Save away the mapping from the original address to the DMA address. | |
241 | * This is needed when we sync the memory. Then we sync the buffer if | |
242 | * needed. | |
243 | */ | |
244 | io_tlb_orig_addr[index] = buffer; | |
245 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
246 | memcpy(dma_addr, buffer, size); | |
247 | ||
248 | return dma_addr; | |
249 | } | |
250 | ||
251 | /* | |
252 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
253 | */ | |
254 | static void | |
255 | unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | |
256 | { | |
257 | unsigned long flags; | |
258 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
259 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
260 | char *buffer = io_tlb_orig_addr[index]; | |
261 | ||
262 | /* | |
263 | * First, sync the memory before unmapping the entry | |
264 | */ | |
265 | if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) | |
266 | /* | |
267 | * bounce... copy the data back into the original buffer * and | |
268 | * delete the bounce buffer. | |
269 | */ | |
270 | memcpy(buffer, dma_addr, size); | |
271 | ||
272 | /* | |
273 | * Return the buffer to the free list by setting the corresponding | |
274 | * entries to indicate the number of contigous entries available. | |
275 | * While returning the entries to the free list, we merge the entries | |
276 | * with slots below and above the pool being returned. | |
277 | */ | |
278 | spin_lock_irqsave(&io_tlb_lock, flags); | |
279 | { | |
280 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
281 | io_tlb_list[index + nslots] : 0); | |
282 | /* | |
283 | * Step 1: return the slots to the free list, merging the | |
284 | * slots with superceeding slots | |
285 | */ | |
286 | for (i = index + nslots - 1; i >= index; i--) | |
287 | io_tlb_list[i] = ++count; | |
288 | /* | |
289 | * Step 2: merge the returned slots with the preceding slots, | |
290 | * if available (non zero) | |
291 | */ | |
292 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
293 | io_tlb_list[i] = ++count; | |
294 | } | |
295 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
296 | } | |
297 | ||
298 | static void | |
299 | sync_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | |
300 | { | |
301 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
302 | char *buffer = io_tlb_orig_addr[index]; | |
303 | ||
304 | /* | |
305 | * bounce... copy the data back into/from the original buffer | |
306 | * XXX How do you handle DMA_BIDIRECTIONAL here ? | |
307 | */ | |
308 | if (dir == DMA_FROM_DEVICE) | |
309 | memcpy(buffer, dma_addr, size); | |
310 | else if (dir == DMA_TO_DEVICE) | |
311 | memcpy(dma_addr, buffer, size); | |
312 | else | |
313 | BUG(); | |
314 | } | |
315 | ||
316 | void * | |
317 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
318 | dma_addr_t *dma_handle, int flags) | |
319 | { | |
320 | unsigned long dev_addr; | |
321 | void *ret; | |
322 | int order = get_order(size); | |
323 | ||
324 | /* | |
325 | * XXX fix me: the DMA API should pass us an explicit DMA mask | |
326 | * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32 | |
327 | * bit range instead of a 16MB one). | |
328 | */ | |
329 | flags |= GFP_DMA; | |
330 | ||
331 | ret = (void *)__get_free_pages(flags, order); | |
332 | if (ret && address_needs_mapping(hwdev, virt_to_phys(ret))) { | |
333 | /* | |
334 | * The allocated memory isn't reachable by the device. | |
335 | * Fall back on swiotlb_map_single(). | |
336 | */ | |
337 | free_pages((unsigned long) ret, order); | |
338 | ret = NULL; | |
339 | } | |
340 | if (!ret) { | |
341 | /* | |
342 | * We are either out of memory or the device can't DMA | |
343 | * to GFP_DMA memory; fall back on | |
344 | * swiotlb_map_single(), which will grab memory from | |
345 | * the lowest available address range. | |
346 | */ | |
347 | dma_addr_t handle; | |
348 | handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE); | |
349 | if (dma_mapping_error(handle)) | |
350 | return NULL; | |
351 | ||
352 | ret = phys_to_virt(handle); | |
353 | } | |
354 | ||
355 | memset(ret, 0, size); | |
356 | dev_addr = virt_to_phys(ret); | |
357 | ||
358 | /* Confirm address can be DMA'd by device */ | |
359 | if (address_needs_mapping(hwdev, dev_addr)) { | |
360 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016lx\n", | |
361 | (unsigned long long)*hwdev->dma_mask, dev_addr); | |
362 | panic("swiotlb_alloc_coherent: allocated memory is out of " | |
363 | "range for device"); | |
364 | } | |
365 | *dma_handle = dev_addr; | |
366 | return ret; | |
367 | } | |
368 | ||
369 | void | |
370 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
371 | dma_addr_t dma_handle) | |
372 | { | |
373 | if (!(vaddr >= (void *)io_tlb_start | |
374 | && vaddr < (void *)io_tlb_end)) | |
375 | free_pages((unsigned long) vaddr, get_order(size)); | |
376 | else | |
377 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
378 | swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE); | |
379 | } | |
380 | ||
381 | static void | |
382 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
383 | { | |
384 | /* | |
385 | * Ran out of IOMMU space for this operation. This is very bad. | |
386 | * Unfortunately the drivers cannot handle this operation properly. | |
387 | * unless they check for pci_dma_mapping_error (most don't) | |
388 | * When the mapping is small enough return a static buffer to limit | |
389 | * the damage, or panic when the transfer is too big. | |
390 | */ | |
391 | printk(KERN_ERR "PCI-DMA: Out of SW-IOMMU space for %lu bytes at " | |
392 | "device %s\n", size, dev ? dev->bus_id : "?"); | |
393 | ||
394 | if (size > io_tlb_overflow && do_panic) { | |
395 | if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL) | |
396 | panic("PCI-DMA: Memory would be corrupted\n"); | |
397 | if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL) | |
398 | panic("PCI-DMA: Random memory would be DMAed\n"); | |
399 | } | |
400 | } | |
401 | ||
402 | /* | |
403 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
404 | * PCI address to use is returned. | |
405 | * | |
406 | * Once the device is given the dma address, the device owns this memory until | |
407 | * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed. | |
408 | */ | |
409 | dma_addr_t | |
410 | swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir) | |
411 | { | |
412 | unsigned long dev_addr = virt_to_phys(ptr); | |
413 | void *map; | |
414 | ||
415 | if (dir == DMA_NONE) | |
416 | BUG(); | |
417 | /* | |
418 | * If the pointer passed in happens to be in the device's DMA window, | |
419 | * we can safely return the device addr and not worry about bounce | |
420 | * buffering it. | |
421 | */ | |
422 | if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force) | |
423 | return dev_addr; | |
424 | ||
425 | /* | |
426 | * Oh well, have to allocate and map a bounce buffer. | |
427 | */ | |
428 | map = map_single(hwdev, ptr, size, dir); | |
429 | if (!map) { | |
430 | swiotlb_full(hwdev, size, dir, 1); | |
431 | map = io_tlb_overflow_buffer; | |
432 | } | |
433 | ||
434 | dev_addr = virt_to_phys(map); | |
435 | ||
436 | /* | |
437 | * Ensure that the address returned is DMA'ble | |
438 | */ | |
439 | if (address_needs_mapping(hwdev, dev_addr)) | |
440 | panic("map_single: bounce buffer is not DMA'ble"); | |
441 | ||
442 | return dev_addr; | |
443 | } | |
444 | ||
445 | /* | |
446 | * Since DMA is i-cache coherent, any (complete) pages that were written via | |
447 | * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to | |
448 | * flush them when they get mapped into an executable vm-area. | |
449 | */ | |
450 | static void | |
451 | mark_clean(void *addr, size_t size) | |
452 | { | |
453 | unsigned long pg_addr, end; | |
454 | ||
455 | pg_addr = PAGE_ALIGN((unsigned long) addr); | |
456 | end = (unsigned long) addr + size; | |
457 | while (pg_addr + PAGE_SIZE <= end) { | |
458 | struct page *page = virt_to_page(pg_addr); | |
459 | set_bit(PG_arch_1, &page->flags); | |
460 | pg_addr += PAGE_SIZE; | |
461 | } | |
462 | } | |
463 | ||
464 | /* | |
465 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
466 | * match what was provided for in a previous swiotlb_map_single call. All | |
467 | * other usages are undefined. | |
468 | * | |
469 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
470 | * whatever the device wrote there. | |
471 | */ | |
472 | void | |
473 | swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size, | |
474 | int dir) | |
475 | { | |
476 | char *dma_addr = phys_to_virt(dev_addr); | |
477 | ||
478 | if (dir == DMA_NONE) | |
479 | BUG(); | |
480 | if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end) | |
481 | unmap_single(hwdev, dma_addr, size, dir); | |
482 | else if (dir == DMA_FROM_DEVICE) | |
483 | mark_clean(dma_addr, size); | |
484 | } | |
485 | ||
486 | /* | |
487 | * Make physical memory consistent for a single streaming mode DMA translation | |
488 | * after a transfer. | |
489 | * | |
490 | * If you perform a swiotlb_map_single() but wish to interrogate the buffer | |
491 | * using the cpu, yet do not wish to teardown the PCI dma mapping, you must | |
492 | * call this function before doing so. At the next point you give the PCI dma | |
493 | * address back to the card, you must first perform a | |
494 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
495 | */ | |
496 | void | |
497 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
498 | size_t size, int dir) | |
499 | { | |
500 | char *dma_addr = phys_to_virt(dev_addr); | |
501 | ||
502 | if (dir == DMA_NONE) | |
503 | BUG(); | |
504 | if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end) | |
505 | sync_single(hwdev, dma_addr, size, dir); | |
506 | else if (dir == DMA_FROM_DEVICE) | |
507 | mark_clean(dma_addr, size); | |
508 | } | |
509 | ||
510 | void | |
511 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
512 | size_t size, int dir) | |
513 | { | |
514 | char *dma_addr = phys_to_virt(dev_addr); | |
515 | ||
516 | if (dir == DMA_NONE) | |
517 | BUG(); | |
518 | if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end) | |
519 | sync_single(hwdev, dma_addr, size, dir); | |
520 | else if (dir == DMA_FROM_DEVICE) | |
521 | mark_clean(dma_addr, size); | |
522 | } | |
523 | ||
524 | /* | |
525 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
526 | * This is the scatter-gather version of the above swiotlb_map_single | |
527 | * interface. Here the scatter gather list elements are each tagged with the | |
528 | * appropriate dma address and length. They are obtained via | |
529 | * sg_dma_{address,length}(SG). | |
530 | * | |
531 | * NOTE: An implementation may be able to use a smaller number of | |
532 | * DMA address/length pairs than there are SG table elements. | |
533 | * (for example via virtual mapping capabilities) | |
534 | * The routine returns the number of addr/length pairs actually | |
535 | * used, at most nents. | |
536 | * | |
537 | * Device ownership issues as mentioned above for swiotlb_map_single are the | |
538 | * same here. | |
539 | */ | |
540 | int | |
541 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems, | |
542 | int dir) | |
543 | { | |
544 | void *addr; | |
545 | unsigned long dev_addr; | |
546 | int i; | |
547 | ||
548 | if (dir == DMA_NONE) | |
549 | BUG(); | |
550 | ||
551 | for (i = 0; i < nelems; i++, sg++) { | |
552 | addr = SG_ENT_VIRT_ADDRESS(sg); | |
553 | dev_addr = virt_to_phys(addr); | |
554 | if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) { | |
555 | sg->dma_address = (dma_addr_t) virt_to_phys(map_single(hwdev, addr, sg->length, dir)); | |
556 | if (!sg->dma_address) { | |
557 | /* Don't panic here, we expect map_sg users | |
558 | to do proper error handling. */ | |
559 | swiotlb_full(hwdev, sg->length, dir, 0); | |
560 | swiotlb_unmap_sg(hwdev, sg - i, i, dir); | |
561 | sg[0].dma_length = 0; | |
562 | return 0; | |
563 | } | |
564 | } else | |
565 | sg->dma_address = dev_addr; | |
566 | sg->dma_length = sg->length; | |
567 | } | |
568 | return nelems; | |
569 | } | |
570 | ||
571 | /* | |
572 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
573 | * concerning calls here are the same as for swiotlb_unmap_single() above. | |
574 | */ | |
575 | void | |
576 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems, | |
577 | int dir) | |
578 | { | |
579 | int i; | |
580 | ||
581 | if (dir == DMA_NONE) | |
582 | BUG(); | |
583 | ||
584 | for (i = 0; i < nelems; i++, sg++) | |
585 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | |
586 | unmap_single(hwdev, (void *) phys_to_virt(sg->dma_address), sg->dma_length, dir); | |
587 | else if (dir == DMA_FROM_DEVICE) | |
588 | mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); | |
589 | } | |
590 | ||
591 | /* | |
592 | * Make physical memory consistent for a set of streaming mode DMA translations | |
593 | * after a transfer. | |
594 | * | |
595 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
596 | * and usage. | |
597 | */ | |
598 | void | |
599 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
600 | int nelems, int dir) | |
601 | { | |
602 | int i; | |
603 | ||
604 | if (dir == DMA_NONE) | |
605 | BUG(); | |
606 | ||
607 | for (i = 0; i < nelems; i++, sg++) | |
608 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | |
609 | sync_single(hwdev, (void *) sg->dma_address, | |
610 | sg->dma_length, dir); | |
611 | } | |
612 | ||
613 | void | |
614 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
615 | int nelems, int dir) | |
616 | { | |
617 | int i; | |
618 | ||
619 | if (dir == DMA_NONE) | |
620 | BUG(); | |
621 | ||
622 | for (i = 0; i < nelems; i++, sg++) | |
623 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | |
624 | sync_single(hwdev, (void *) sg->dma_address, | |
625 | sg->dma_length, dir); | |
626 | } | |
627 | ||
628 | int | |
629 | swiotlb_dma_mapping_error(dma_addr_t dma_addr) | |
630 | { | |
631 | return (dma_addr == virt_to_phys(io_tlb_overflow_buffer)); | |
632 | } | |
633 | ||
634 | /* | |
635 | * Return whether the given PCI device DMA address mask can be supported | |
636 | * properly. For example, if your device can only drive the low 24-bits | |
637 | * during PCI bus mastering, then you would pass 0x00ffffff as the mask to | |
638 | * this function. | |
639 | */ | |
640 | int | |
641 | swiotlb_dma_supported (struct device *hwdev, u64 mask) | |
642 | { | |
643 | return (virt_to_phys (io_tlb_end) - 1) <= mask; | |
644 | } | |
645 | ||
646 | EXPORT_SYMBOL(swiotlb_init); | |
647 | EXPORT_SYMBOL(swiotlb_map_single); | |
648 | EXPORT_SYMBOL(swiotlb_unmap_single); | |
649 | EXPORT_SYMBOL(swiotlb_map_sg); | |
650 | EXPORT_SYMBOL(swiotlb_unmap_sg); | |
651 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | |
652 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | |
653 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); | |
654 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | |
655 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | |
656 | EXPORT_SYMBOL(swiotlb_alloc_coherent); | |
657 | EXPORT_SYMBOL(swiotlb_free_coherent); | |
658 | EXPORT_SYMBOL(swiotlb_dma_supported); |