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[IA64-SGI] pcdp: add PCDP pci interface support
[mirror_ubuntu-bionic-kernel.git] / arch / ia64 / sn / kernel / setup.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
2e34f07f 6 * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
1da177e4
LT
7 */
8
9#include <linux/config.h>
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/delay.h>
13#include <linux/kernel.h>
14#include <linux/kdev_t.h>
15#include <linux/string.h>
16#include <linux/tty.h>
17#include <linux/console.h>
18#include <linux/timex.h>
19#include <linux/sched.h>
20#include <linux/ioport.h>
21#include <linux/mm.h>
22#include <linux/serial.h>
23#include <linux/irq.h>
24#include <linux/bootmem.h>
25#include <linux/mmzone.h>
26#include <linux/interrupt.h>
27#include <linux/acpi.h>
28#include <linux/compiler.h>
29#include <linux/sched.h>
30#include <linux/root_dev.h>
31#include <linux/nodemask.h>
c1298c5c 32#include <linux/pm.h>
1da177e4
LT
33
34#include <asm/io.h>
35#include <asm/sal.h>
36#include <asm/machvec.h>
37#include <asm/system.h>
38#include <asm/processor.h>
39#include <asm/sn/arch.h>
40#include <asm/sn/addrs.h>
41#include <asm/sn/pda.h>
42#include <asm/sn/nodepda.h>
43#include <asm/sn/sn_cpuid.h>
44#include <asm/sn/simulator.h>
45#include <asm/sn/leds.h>
46#include <asm/sn/bte.h>
47#include <asm/sn/shub_mmr.h>
48#include <asm/sn/clksupport.h>
49#include <asm/sn/sn_sal.h>
50#include <asm/sn/geo.h>
51#include "xtalk/xwidgetdev.h"
52#include "xtalk/hubdev.h"
53#include <asm/sn/klconfig.h>
54
55
56DEFINE_PER_CPU(struct pda_s, pda_percpu);
57
58#define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
59
60lboard_t *root_lboard[MAX_COMPACT_NODES];
61
62extern void bte_init_node(nodepda_t *, cnodeid_t);
63
64extern void sn_timer_init(void);
65extern unsigned long last_time_offset;
66extern void (*ia64_mark_idle) (int);
67extern void snidle(int);
68extern unsigned char acpi_kbd_controller_present;
69
70unsigned long sn_rtc_cycles_per_second;
71EXPORT_SYMBOL(sn_rtc_cycles_per_second);
72
73DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
74EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
75
2e34f07f
DN
76DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
77EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
78
9b48b466
DN
79DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
80EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
81
1da177e4
LT
82partid_t sn_partid = -1;
83EXPORT_SYMBOL(sn_partid);
84char sn_system_serial_number_string[128];
85EXPORT_SYMBOL(sn_system_serial_number_string);
86u64 sn_partition_serial_number;
87EXPORT_SYMBOL(sn_partition_serial_number);
88u8 sn_partition_id;
89EXPORT_SYMBOL(sn_partition_id);
90u8 sn_system_size;
91EXPORT_SYMBOL(sn_system_size);
92u8 sn_sharing_domain_size;
93EXPORT_SYMBOL(sn_sharing_domain_size);
94u8 sn_coherency_id;
95EXPORT_SYMBOL(sn_coherency_id);
96u8 sn_region_size;
97EXPORT_SYMBOL(sn_region_size);
98
99short physical_node_map[MAX_PHYSNODE_ID];
100
101EXPORT_SYMBOL(physical_node_map);
102
103int numionodes;
104
105static void sn_init_pdas(char **);
106static void scan_for_ionodes(void);
107
108static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
109
110/*
111 * The format of "screen_info" is strange, and due to early i386-setup
112 * code. This is just enough to make the console code think we're on a
113 * VGA color display.
114 */
115struct screen_info sn_screen_info = {
116 .orig_x = 0,
117 .orig_y = 0,
118 .orig_video_mode = 3,
119 .orig_video_cols = 80,
120 .orig_video_ega_bx = 3,
121 .orig_video_lines = 25,
122 .orig_video_isVGA = 1,
123 .orig_video_points = 16
124};
125
126/*
127 * This is here so we can use the CMOS detection in ide-probe.c to
128 * determine what drives are present. In theory, we don't need this
129 * as the auto-detection could be done via ide-probe.c:do_probe() but
130 * in practice that would be much slower, which is painful when
131 * running in the simulator. Note that passing zeroes in DRIVE_INFO
132 * is sufficient (the IDE driver will autodetect the drive geometry).
133 */
134#ifdef CONFIG_IA64_GENERIC
135extern char drive_info[4 * 16];
136#else
137char drive_info[4 * 16];
138#endif
139
140/*
141 * Get nasid of current cpu early in boot before nodepda is initialized
142 */
143static int
144boot_get_nasid(void)
145{
146 int nasid;
147
148 if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
149 BUG();
150 return nasid;
151}
152
153/*
154 * This routine can only be used during init, since
155 * smp_boot_data is an init data structure.
156 * We have to use smp_boot_data.cpu_phys_id to find
157 * the physical id of the processor because the normal
158 * cpu_physical_id() relies on data structures that
159 * may not be initialized yet.
160 */
161
162static int __init pxm_to_nasid(int pxm)
163{
164 int i;
165 int nid;
166
167 nid = pxm_to_nid_map[pxm];
168 for (i = 0; i < num_node_memblks; i++) {
169 if (node_memblk[i].nid == nid) {
170 return NASID_GET(node_memblk[i].start_paddr);
171 }
172 }
173 return -1;
174}
175
176/**
177 * early_sn_setup - early setup routine for SN platforms
178 *
179 * Sets up an initial console to aid debugging. Intended primarily
180 * for bringup. See start_kernel() in init/main.c.
181 */
182
183void __init early_sn_setup(void)
184{
185 efi_system_table_t *efi_systab;
186 efi_config_table_t *config_tables;
187 struct ia64_sal_systab *sal_systab;
188 struct ia64_sal_desc_entry_point *ep;
189 char *p;
190 int i, j;
191
192 /*
193 * Parse enough of the SAL tables to locate the SAL entry point. Since, console
194 * IO on SN2 is done via SAL calls, early_printk won't work without this.
195 *
196 * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
197 * Any changes to those file may have to be made hereas well.
198 */
199 efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
200 config_tables = __va(efi_systab->tables);
201 for (i = 0; i < efi_systab->nr_tables; i++) {
202 if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
203 0) {
204 sal_systab = __va(config_tables[i].table);
205 p = (char *)(sal_systab + 1);
206 for (j = 0; j < sal_systab->entry_count; j++) {
207 if (*p == SAL_DESC_ENTRY_POINT) {
208 ep = (struct ia64_sal_desc_entry_point
209 *)p;
210 ia64_sal_handler_init(__va
211 (ep->sal_proc),
212 __va(ep->gp));
213 return;
214 }
215 p += SAL_DESC_SIZE(*p);
216 }
217 }
218 }
219 /* Uh-oh, SAL not available?? */
220 printk(KERN_ERR "failed to find SAL entry point\n");
221}
222
223extern int platform_intr_list[];
224extern nasid_t master_nasid;
ff89bf3b 225static int __initdata shub_1_1_found = 0;
1da177e4
LT
226
227/*
228 * sn_check_for_wars
229 *
230 * Set flag for enabling shub specific wars
231 */
232
233static inline int __init is_shub_1_1(int nasid)
234{
235 unsigned long id;
236 int rev;
237
238 if (is_shub2())
239 return 0;
240 id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
241 rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
242 return rev <= 2;
243}
244
245static void __init sn_check_for_wars(void)
246{
247 int cnode;
248
249 if (is_shub2()) {
250 /* none yet */
251 } else {
252 for_each_online_node(cnode) {
253 if (is_shub_1_1(cnodeid_to_nasid(cnode)))
ff89bf3b 254 shub_1_1_found = 1;
1da177e4
LT
255 }
256 }
257}
258
259/**
260 * sn_setup - SN platform setup routine
261 * @cmdline_p: kernel command line
262 *
263 * Handles platform setup for SN machines. This includes determining
264 * the RTC frequency (via a SAL call), initializing secondary CPUs, and
265 * setting up per-node data areas. The console is also initialized here.
266 */
267void __init sn_setup(char **cmdline_p)
268{
269 long status, ticks_per_sec, drift;
270 int pxm;
271 int major = sn_sal_rev_major(), minor = sn_sal_rev_minor();
272 extern void sn_cpu_init(void);
273
6872ec54
RA
274 ia64_sn_plat_set_error_handling_features();
275
1da177e4
LT
276 /*
277 * If the generic code has enabled vga console support - lets
278 * get rid of it again. This is a kludge for the fact that ACPI
279 * currtently has no way of informing us if legacy VGA is available
280 * or not.
281 */
282#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
283 if (conswitchp == &vga_con) {
284 printk(KERN_DEBUG "SGI: Disabling VGA console\n");
285#ifdef CONFIG_DUMMY_CONSOLE
286 conswitchp = &dummy_con;
287#else
288 conswitchp = NULL;
289#endif /* CONFIG_DUMMY_CONSOLE */
290 }
291#endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
292
293 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
294
295 memset(physical_node_map, -1, sizeof(physical_node_map));
296 for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++)
297 if (pxm_to_nid_map[pxm] != -1)
298 physical_node_map[pxm_to_nasid(pxm)] =
299 pxm_to_nid_map[pxm];
300
301 /*
302 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
303 * support here so we don't have to listen to failed keyboard probe
304 * messages.
305 */
306 if ((major < 2 || (major == 2 && minor <= 9)) &&
307 acpi_kbd_controller_present) {
308 printk(KERN_INFO "Disabling legacy keyboard support as prom "
309 "is too old and doesn't provide FADT\n");
310 acpi_kbd_controller_present = 0;
311 }
312
313 printk("SGI SAL version %x.%02x\n", major, minor);
314
315 /*
316 * Confirm the SAL we're running on is recent enough...
317 */
318 if ((major < SN_SAL_MIN_MAJOR) || (major == SN_SAL_MIN_MAJOR &&
319 minor < SN_SAL_MIN_MINOR)) {
320 printk(KERN_ERR "This kernel needs SGI SAL version >= "
321 "%x.%02x\n", SN_SAL_MIN_MAJOR, SN_SAL_MIN_MINOR);
322 panic("PROM version too old\n");
323 }
324
325 master_nasid = boot_get_nasid();
326
327 status =
328 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
329 &drift);
330 if (status != 0 || ticks_per_sec < 100000) {
331 printk(KERN_WARNING
332 "unable to determine platform RTC clock frequency, guessing.\n");
333 /* PROM gives wrong value for clock freq. so guess */
334 sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
335 } else
336 sn_rtc_cycles_per_second = ticks_per_sec;
337
338 platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
339
340 /*
341 * we set the default root device to /dev/hda
342 * to make simulation easy
343 */
344 ROOT_DEV = Root_HDA1;
345
346 /*
347 * Create the PDAs and NODEPDAs for all the cpus.
348 */
349 sn_init_pdas(cmdline_p);
350
351 ia64_mark_idle = &snidle;
352
353 /*
354 * For the bootcpu, we do this here. All other cpus will make the
355 * call as part of cpu_init in slave cpu initialization.
356 */
357 sn_cpu_init();
358
359#ifdef CONFIG_SMP
360 init_smp_config();
361#endif
362 screen_info = sn_screen_info;
363
364 sn_timer_init();
c1298c5c
AY
365
366 /*
367 * set pm_power_off to a SAL call to allow
368 * sn machines to power off. The SAL call can be replaced
369 * by an ACPI interface call when ACPI is fully implemented
370 * for sn.
371 */
372 pm_power_off = ia64_sn_power_down;
1da177e4
LT
373}
374
375/**
376 * sn_init_pdas - setup node data areas
377 *
378 * One time setup for Node Data Area. Called by sn_setup().
379 */
380static void __init sn_init_pdas(char **cmdline_p)
381{
382 cnodeid_t cnode;
383
2e34f07f
DN
384 memset(sn_cnodeid_to_nasid, -1,
385 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
1da177e4 386 for_each_online_node(cnode)
2e34f07f
DN
387 sn_cnodeid_to_nasid[cnode] =
388 pxm_to_nasid(nid_to_pxm_map[cnode]);
1da177e4
LT
389
390 numionodes = num_online_nodes();
391 scan_for_ionodes();
392
393 /*
394 * Allocate & initalize the nodepda for each node.
395 */
396 for_each_online_node(cnode) {
397 nodepdaindr[cnode] =
398 alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
399 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
400 memset(nodepdaindr[cnode]->phys_cpuid, -1,
401 sizeof(nodepdaindr[cnode]->phys_cpuid));
402 }
403
404 /*
405 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
406 */
407 for (cnode = num_online_nodes(); cnode < numionodes; cnode++) {
408 nodepdaindr[cnode] =
409 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
410 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
411 }
412
413 /*
414 * Now copy the array of nodepda pointers to each nodepda.
415 */
416 for (cnode = 0; cnode < numionodes; cnode++)
417 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
418 sizeof(nodepdaindr));
419
420 /*
421 * Set up IO related platform-dependent nodepda fields.
422 * The following routine actually sets up the hubinfo struct
423 * in nodepda.
424 */
425 for_each_online_node(cnode) {
426 bte_init_node(nodepdaindr[cnode], cnode);
427 }
428
429 /*
430 * Initialize the per node hubdev. This includes IO Nodes and
431 * headless/memless nodes.
432 */
433 for (cnode = 0; cnode < numionodes; cnode++) {
434 hubdev_init_node(nodepdaindr[cnode], cnode);
435 }
436}
437
438/**
439 * sn_cpu_init - initialize per-cpu data areas
440 * @cpuid: cpuid of the caller
441 *
442 * Called during cpu initialization on each cpu as it starts.
443 * Currently, initializes the per-cpu data area for SNIA.
444 * Also sets up a few fields in the nodepda. Also known as
445 * platform_cpu_init() by the ia64 machvec code.
446 */
447void __init sn_cpu_init(void)
448{
449 int cpuid;
450 int cpuphyid;
451 int nasid;
452 int subnode;
453 int slice;
454 int cnode;
455 int i;
456 static int wars_have_been_checked;
457
458 memset(pda, 0, sizeof(pda));
459 if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,
460 &sn_system_size, &sn_sharing_domain_size, &sn_partition_id,
461 &sn_coherency_id, &sn_region_size))
462 BUG();
463 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
464
465 /*
466 * The boot cpu makes this call again after platform initialization is
467 * complete.
468 */
469 if (nodepdaindr[0] == NULL)
470 return;
471
472 cpuid = smp_processor_id();
473 cpuphyid = get_sapicid();
474
475 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
476 BUG();
477
478 for (i=0; i < MAX_NUMNODES; i++) {
479 if (nodepdaindr[i]) {
480 nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
481 nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
482 nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
483 }
484 }
485
486 cnode = nasid_to_cnodeid(nasid);
487
9b48b466
DN
488 sn_nodepda = nodepdaindr[cnode];
489
1da177e4
LT
490 pda->led_address =
491 (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
492 pda->led_state = LED_ALWAYS_SET;
493 pda->hb_count = HZ / 2;
494 pda->hb_state = 0;
495 pda->idle_flag = 0;
496
497 if (cpuid != 0) {
2e34f07f
DN
498 /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
499 memcpy(sn_cnodeid_to_nasid,
500 (&per_cpu(__sn_cnodeid_to_nasid, 0)),
501 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
1da177e4
LT
502 }
503
504 /*
505 * Check for WARs.
506 * Only needs to be done once, on BSP.
2e34f07f
DN
507 * Has to be done after loop above, because it uses this cpu's
508 * sn_cnodeid_to_nasid table which was just initialized if this
509 * isn't cpu 0.
1da177e4
LT
510 * Has to be done before assignment below.
511 */
512 if (!wars_have_been_checked) {
513 sn_check_for_wars();
514 wars_have_been_checked = 1;
515 }
516 sn_hub_info->shub_1_1_found = shub_1_1_found;
517
518 /*
519 * Set up addresses of PIO/MEM write status registers.
520 */
521 {
522 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
523 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1,
524 SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};
525 u64 *pio;
526 pio = is_shub1() ? pio1 : pio2;
527 pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
528 pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
529 }
530
531 /*
532 * WAR addresses for SHUB 1.x.
533 */
534 if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
535 int buddy_nasid;
536 buddy_nasid =
537 cnodeid_to_nasid(numa_node_id() ==
538 num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
539 pda->pio_shub_war_cam_addr =
540 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
541 SH1_PI_CAM_CONTROL);
542 }
543}
544
545/*
546 * Scan klconfig for ionodes. Add the nasids to the
547 * physical_node_map and the pda and increment numionodes.
548 */
549
550static void __init scan_for_ionodes(void)
551{
552 int nasid = 0;
553 lboard_t *brd;
554
555 /* Setup ionodes with memory */
556 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
557 char *klgraph_header;
558 cnodeid_t cnodeid;
559
560 if (physical_node_map[nasid] == -1)
561 continue;
562
563 cnodeid = -1;
564 klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid));
565 if (!klgraph_header) {
566 if (IS_RUNNING_ON_SIMULATOR())
567 continue;
568 BUG(); /* All nodes must have klconfig tables! */
569 }
570 cnodeid = nasid_to_cnodeid(nasid);
571 root_lboard[cnodeid] = (lboard_t *)
572 NODE_OFFSET_TO_LBOARD((nasid),
573 ((kl_config_hdr_t
574 *) (klgraph_header))->
575 ch_board_info);
576 }
577
578 /* Scan headless/memless IO Nodes. */
579 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
580 /* if there's no nasid, don't try to read the klconfig on the node */
581 if (physical_node_map[nasid] == -1)
582 continue;
583 brd = find_lboard_any((lboard_t *)
584 root_lboard[nasid_to_cnodeid(nasid)],
585 KLTYPE_SNIA);
586 if (brd) {
587 brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
588 if (!brd)
589 continue;
590 }
591
592 brd = find_lboard_any(brd, KLTYPE_SNIA);
593
594 while (brd) {
2e34f07f 595 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
1da177e4
LT
596 physical_node_map[brd->brd_nasid] = numionodes;
597 root_lboard[numionodes] = brd;
598 numionodes++;
599 brd = KLCF_NEXT_ANY(brd);
600 if (!brd)
601 break;
602
603 brd = find_lboard_any(brd, KLTYPE_SNIA);
604 }
605 }
606
607 /* Scan for TIO nodes. */
608 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
609 /* if there's no nasid, don't try to read the klconfig on the node */
610 if (physical_node_map[nasid] == -1)
611 continue;
612 brd = find_lboard_any((lboard_t *)
613 root_lboard[nasid_to_cnodeid(nasid)],
614 KLTYPE_TIO);
615 while (brd) {
2e34f07f 616 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
1da177e4
LT
617 physical_node_map[brd->brd_nasid] = numionodes;
618 root_lboard[numionodes] = brd;
619 numionodes++;
620 brd = KLCF_NEXT_ANY(brd);
621 if (!brd)
622 break;
623
624 brd = find_lboard_any(brd, KLTYPE_TIO);
625 }
626 }
1da177e4
LT
627}
628
629int
630nasid_slice_to_cpuid(int nasid, int slice)
631{
632 long cpu;
633
634 for (cpu=0; cpu < NR_CPUS; cpu++)
9b48b466
DN
635 if (cpuid_to_nasid(cpu) == nasid &&
636 cpuid_to_slice(cpu) == slice)
1da177e4
LT
637 return cpu;
638
639 return -1;
640}